JPH045043Y2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a tape recorder, and more particularly, to a tape recorder whose various operations are controlled by a microcomputer.

2. Description of the Related Art There is a tape recorder in which a microcomputer controls the operation of storing information such as a tape count value and tape position in a memory. In this case, special circuits were provided to control the microcomputer into a sleep state, a wake-up state, etc., respectively.

Problems that the invention aims to solve: Conventional systems had a special circuit to control the starting and stopping of the microcomputer;
The circuit configuration was complicated and there was a problem that it could not be miniaturized.

This invention uses the output of the bias oscillation circuit to start and stop the microcomputer.
It is an object of the present invention to provide a tape recorder whose circuit can be easily configured and miniaturized.

Means for Solving the Problem In Fig. 1, the voltage terminal 10 ₁ of the CPU, the sleep latch terminal 10 ₄ , and the transistors Q ₁ and Q ₃ control the bias oscillation circuit 1 into the operating state and non-operating state according to the operation of the power switch SW. Switch means for putting into operation, detection circuit 2, transistor Q ₂ , inverter 3, sleep latch terminal 10 ₄ , transistors Q ₁ , Q ₂ ,
Q ₃ , the bias oscillation circuit 1 is a control means for placing the microcomputer in a wake-up state and a sleep state.

Function: The above-mentioned switch means puts the bias oscillation circuit 1 into the operating state or non-operation state according to the operation of the power switch SW, and the above-mentioned control means puts the microcomputer into the wake-up state or sleep state according to the state of the bias oscillation circuit 1. state.

Embodiment FIG. 1 shows a circuit diagram of an embodiment of the tape recorder according to the present invention. In the figure, the CPU is a control device composed of, for example, a microcomputer, and is configured to operate according to the flowcharts shown in FIGS. 2 and 3. In FIG. 1, when the non-locking power switch (key enable switch) SW is in the off state, the transistor _Q1 is turned on by applying the CPU voltage through the resistor _R1 and the terminal ₁₀₁ . As a result, the input of the bias oscillation circuit 1 that supplies the bias current or erase current is grounded and is in a stopped state.

Here, when the power switch SW is turned on (Fig. 4A), the voltage terminal ₁₀₁ of the CPU is grounded, the transistor _Q1 is turned off, and the oscillation circuit 1 has its input set to H level and enters the operating state. For example, a 32kHz signal b is extracted (B in the same figure). The signal b is detected by the detection circuit 2, and the transistor
Q ₂ is turned on by increasing its base potential.
As a result, the output of the inverter 3 (sleep/wake-up terminal 10 ₂ of the CPU) is set to the H level (C in the figure), and the CPU is placed in a wake-up state (startable state).

At the same time, the H level output of the inverter 3 is differentiated by the differentiating circuit 4, and then converted into a reset signal d (D in the figure) by the Schmitt circuit 5, which is supplied to the reset terminal ₁₀₃ of the CPU to reset the CPU. . The CPU is activated by the wakeup state transition and reset described above.

When the CPU is started, sleep latch terminal 10 ₄
The output e (E in the figure) is set to H level and is supplied to the transistor _Q3 via the resistor _R2 to turn it on. As a result, the base of the transistor _Q1 is set to the L level, and even if the power switch SW is turned off, the terminal ₁₀₁ of the CPU is grounded, and the oscillation circuit 1 continues to be in an operating state and an oscillation output is taken out.

Here, when the power switch SW is turned on, the terminal ₁₀₁ is set to L level (Fig. 5A), this is detected by the switch detection circuit 6 (step 20 in Fig. 2), and the mechanism control circuit 7 fast-forwards. , the mechanism for rewinding, etc. is brought to a halt (step 21 in FIG. 2, C in FIG. 5).

When the power switch SW is turned off, the terminal ₁₀₁ becomes H level (A in the same figure), and the switch detection circuit 6
This is detected by the output control circuit 8 (step 22 in FIG. 2), and the sleep latch output e' from the terminal ₁₀₄ is set to L level (step 22 in FIG. 2).
23, Figure 5 D). As a result, the transistor _Q3 is turned off, and since the power switch SW is turned off at this time, the voltage at the terminal ₁₀₁ turns on the transistor _Q1 , and the oscillation circuit 1 changes its input to L.
level and stops the oscillation operation (Fig. 5B).

When the oscillation operation of the oscillation circuit 1 stops, the transistor _Q2 is turned off, the output c' of the inverter 3 is set to L level (FIG. 5E), and the CPU is put into a sleep state.

On the other hand, when the stop state or recording pause state is entered, the state detection circuit 9 detects this (step 24 in FIG. 3), and the time circuit 11 detects that, for example, 5 minutes have elapsed since the above detection (step 25 in the same figure). ). As a result, the sleep latch output e' of the terminal ₁₀₄ is set to L level (step 26), and the following steps are taken.
The CPU is put into a sleep state in the same way as in the above case.

Effects of the invention The tape recorder of the invention has a circuit that turns the bias oscillation circuit into an active state and a non-active state according to the operation of a power switch, and a circuit that puts the microcomputer into a wake-up state when the bias oscillation circuit is in an active state. On the other hand, since a circuit that puts the microcomputer into sleep state when the bias oscillation circuit is in an inactive state is provided, the microcomputer can be switched between the wake-up state and the sleep state by the output of the bias oscillation circuit, and these states of the microcomputer can be switched. Compared to conventional circuits in which special circuits are provided to control the respective circuits, the circuits can be constructed more easily and in a smaller size.

[Brief explanation of the drawing]

Figure 1 is a circuit diagram of an embodiment of the tape recorder of the present invention, Figures 2 and 3 are flowcharts for explaining the operation of Figure 1, and Figures 4 and 5 are for explaining the operation of Figure 1. This is a timing chart. 1...Bias oscillation circuit, 2...Detection circuit, 3
... Inverter, 4 ... Differentiation circuit, 5 ... Schmitt circuit, 6 ... Switch detection circuit, 7 ... Mechanism control circuit, 8 ... Output control circuit, 9 ... State detection circuit, 10 ₁ to 10 ₄ ... ...CPU terminal, Q ₁ ~
Q ₃ ...transistor, SW...power switch.

Claims (1)

[Scope of utility model registration request] In a tape recorder having a structure in which various operations are controlled by a microcomputer, there is a circuit that turns a bias oscillation circuit into an operating state or a non-operating state according to the operation of a power switch, and when the bias oscillation circuit is in an operating state, the microcomputer controls the bias oscillation circuit. 1. A tape recorder comprising a circuit that wakes up a computer and puts the microcomputer into a sleep state when the bias oscillation circuit is inactive.