JPH0450933U - - Google Patents

Info

Publication number
JPH0450933U
JPH0450933U JP9289190U JP9289190U JPH0450933U JP H0450933 U JPH0450933 U JP H0450933U JP 9289190 U JP9289190 U JP 9289190U JP 9289190 U JP9289190 U JP 9289190U JP H0450933 U JPH0450933 U JP H0450933U
Authority
JP
Japan
Prior art keywords
receiving side
signal transmission
signal
output buffer
suppression circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9289190U
Other languages
English (en)
Other versions
JPH083069Y2 (ja
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990092891U priority Critical patent/JPH083069Y2/ja
Publication of JPH0450933U publication Critical patent/JPH0450933U/ja
Application granted granted Critical
Publication of JPH083069Y2 publication Critical patent/JPH083069Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Landscapes

  • Logic Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案の一実施例の構成図、第２図は
第１図の回路の動作説明図、第３図はバツクプレ
ーンを用いた通信システムの従来例の構成図であ
る。 １……送信側、１１……パルス発生器、１２…
…信号伝送用出力バツフア、２……受信側、３１
……バツクプレーン、Ｃ……コンデンサ。

Claims (1)

  1. 【実用新案登録請求の範囲】 伝送路を通つて送信側から受信側へ送られたパ
    ルスが、受信側で反射し、同じ伝送路を通つて戻
    つてくることを抑制する信号の反射抑制回路にお
    いて、 前記送信側の信号伝送用出力バツフアの出力端
    とグランド電位点の間に挿入されていて、自己の
    静電容量と信号伝送用出力バツフアの内部インピ
    ーダンスで与えられる時定数により、パルスの立
    上がり時間ｔｒを次式を満たす値に設定するコン
    デンサを具備したことを特徴とする信号の反射抑
    制回路。 ｔｒ≧２Ｔ Ｔ：送信側から受信側までの信号伝送時間。
JP1990092891U 1990-09-04 1990-09-04 信号の反射抑制回路 Expired - Lifetime JPH083069Y2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990092891U JPH083069Y2 (ja) 1990-09-04 1990-09-04 信号の反射抑制回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990092891U JPH083069Y2 (ja) 1990-09-04 1990-09-04 信号の反射抑制回路

Publications (2)

Publication Number Publication Date
JPH0450933U true JPH0450933U (ja) 1992-04-28
JPH083069Y2 JPH083069Y2 (ja) 1996-01-29

Family

ID=31829691

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990092891U Expired - Lifetime JPH083069Y2 (ja) 1990-09-04 1990-09-04 信号の反射抑制回路

Country Status (1)

Country Link
JP (1) JPH083069Y2 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012008920A (ja) * 2010-06-28 2012-01-12 Renesas Electronics Corp 電子機器

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49130164A (ja) * 1973-04-13 1974-12-13

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS49130164A (ja) * 1973-04-13 1974-12-13

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012008920A (ja) * 2010-06-28 2012-01-12 Renesas Electronics Corp 電子機器

Also Published As

Publication number Publication date
JPH083069Y2 (ja) 1996-01-29

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