JPH0452648B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention comprises two differential amplifier sections configured using bipolar transistors and in a complementary relationship to which a common input signal is fed, The present invention relates to a transistor amplifier circuit in which each differential amplifier section is provided with an output signal derivation section formed by a current mirror circuit.

BACKGROUND TECHNOLOGY AND PROBLEMS Various types of transistor amplifier circuits that are configured using hyperpolar transistors and function as operational amplifier circuits have been proposed based on the development of integrated circuits. Such a transistor amplifier circuit usually
It is said to have a configuration that includes a differential amplifier section in the input stage, but conventionally known devices have extremely complex overall configurations and usually require a high power supply voltage. . In addition, in order to put the differential amplifier section in the input stage into operation, it is necessary to flow the base current of the pair of transistors forming the differential amplifier section as an input bias current, but this has a negative effect on the output characteristics. In many cases, the difference in input bias current for both transistors, that is, the input offset current, is relatively large. Furthermore, by forming the output signal deriving section that derives the output signal from the differential amplifier section with a current mirror circuit, the gain can be increased, and even under a relatively low power supply voltage, the following can be achieved. Although these devices are designed to provide output signals with extremely large amplitudes, they also have problems such as poor output distortion characteristics, poor high frequency characteristics, and insufficient compensation for temperature changes. All of them cause various inconveniences when used.

Purpose of the Invention In view of the above, the present invention includes an input-stage differential amplification section and an output signal derivation section formed of a current mirror circuit connected to the differential amplification section. Since the bias current is extremely small, the adverse effects of the input bias current and input offset current are significantly reduced, and even under relatively low power supply voltage, the output signal from the differential amplifier and current mirror circuit is To provide a transistor amplifier circuit having a novel configuration in which a derivation part operates with good directness, characteristics are sufficiently compensated for temperature changes, and a high quality output signal without distortion is obtained. With the goal.

Summary of the Invention A transistor amplifier circuit according to the present invention includes a first differential amplifier section formed including first and second transistors whose bases are supplied with an input signal, and a first differential amplifier section whose bases are supplied with first and second transistors. A second differential amplifier unit is provided with a common input signal to the transistor and includes third and fourth transistors that are complementary to the first and second transistors, respectively;
a first current mirror circuit including a diode-connected fifth transistor connected to the output section of the first differential amplifier section and a sixth transistor whose base is commonly connected to the fifth transistor; a second current mirror circuit including a diode-connected seventh transistor connected to the output section of the second differential amplifier section and an eighth transistor whose bases are commonly connected to the seventh transistor; , a ninth transistor connected in cascode to the sixth transistor, and a tenth transistor connected in cascode to the eighth transistor are provided. Furthermore, in the transistor amplifier circuit according to the present invention, each of the transistor amplifier circuits is formed to include an element that generates a PN junction forward voltage, and each
The first and second transistors apply a bias voltage to the base of the transistor and the base of the tenth transistor.
bias circuits, each of which also includes an element that generates a PN junction forward voltage, and each of which has a first
and third and fourth bias circuits that supply a bias voltage that sets the collector-emitter voltage of the second transistor to a predetermined value and a bias voltage that sets the collector-emitter voltage of the third and fourth transistors to a predetermined value. A first constant current source that flows a common constant current to the first and fourth bias circuits, and a second constant current source that flows a common constant current to the second and third bias circuits. is disposed, and a common output terminal portion is provided at the output portions of the ninth and tenth transistors described above. With this configuration, the base currents of the transistors forming the first and second differential amplifier sections are in opposite directions, and the input bias current becomes zero or extremely small. In addition, each current mirror circuit forming the first and second differential amplifier sections and the output signal deriving section connected thereto operates with good linearity. , a high-quality amplified output without distortion can be obtained.

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings.

The figure shows an example of a transistor amplifier circuit according to the present invention. Here, the NPN transistors 1 and 2 form a first differential amplification section, the emitters of these transistors 1 and 2 are commonly connected, and the bases of each are connected to a pair of transistors to which differential input signals are supplied. Connected to input terminals 3 and 4. Commonly connected emitters of transistors 1 and 2 and negative power supply -
The NPN transistor 5 connected between
A diode-connected NPN connected to its base
Constant current 2I _p defined by transistor 6
It forms a constant current source that flows. transistor 6
, the PNP transistors 7 and 8 are connected between the positive power supply +V and the installed potential part, the emitters are connected to the positive power supply +V via the resistor 9, the base is connected to the base of the transistor 7, and the collector is connected to the transistor 6. A constant current 2I _p is supplied to the collectors of the transistors from constant current sources formed by the connected PNP transistors 10, respectively. Resistors 11 and 12 between the emitters of transistors 5 and 6 and the negative power supply -V have mutually similar resistance values _R1 .

Moreover, the PNP transistors 13 and 14 are the second transistors.
The emitters of these transistors 13 and 14 are connected in common, and their bases are connected to the input terminals 3 and 4 together with the bases of the transistors 1 and 2 described above. Ru. A PNP transistor 15, connected between the commonly connected emitters of transistors 13 and 14 and the positive power supply +V, has its base connected to the base of transistor 7 together with the base of transistor 10, and carries a constant current 2I _p It forms a constant current source that flows. Here, a resistor 1 is connected between the emitter of this transistor 15 and the positive power supply +V.
6 has a resistance value R ₂ equal to that of the resistor 9 connected to the transistor 10 .

In this way, transistors 1 and 2 and transistors 13 and 14, which are in a complementary relationship, form two differential amplifier sections that are connected in parallel to the input terminals 3 and 4 and are complementary to each other. It is.

The respective emitters of NPN transistors 17 and 18 whose bases are grounded are connected to the respective collectors of transistors 1 and 2 forming the first differential amplification section. 2 and 18 form a cascode connection, respectively. and the collector of transistor 17, that is, transistors 1 and 2.
PNP transistors 19, 20 and 21 are connected to one of the output parts of the first differential amplification part formed including
The output signal derivation section thus formed is connected.
Transistors 19 and 20 form a current mirror circuit, with the collector of diode-connected transistor 19 forming one current path being connected to the collector of transistor 17, and forming the other current path. transistor 2
0 has a transistor 21 on its collector that forms a cascode connection with this transistor 20.
The emitters are connected. These transistors 1
The respective emitters of 9 and 20 are connected to the positive power supply +V via resistors 22 and 23 having the same resistance value _R3 . And transistor 21
The collector of is connected to the output terminal 24.

Further, a current mirror circuit corresponding to the above-mentioned transistors 19, 20, and 21 is connected to the collector of the transistor 18, that is, the other output part of the first differential amplifier section formed including the transistors 1 and 2. An output signal derivation section formed by PNP transistors 25 and 26 and a PNP transistor 27 is connected. transistor 2
Resistors 28 and 29 with a resistance value R ₃ correspond to the resistors 22 and 23 on the emitters 5 and 26.
are connected to each other, and the collector of the transistor 27 is connected to the output terminal 30.

The bases of transistors 17 and 18 are connected in common, and between these bases and the commonly connected emitters of transistors 1 and 2 are two transistors formed by NPN transistors 31 and 32.
A bias circuit formed by an element that generates an NPN junction forward voltage, a PNP transistor 33, and a buffer resistor 34 connected to its base is connected. This bias circuit consists of transistor 3
When current flows through transistors 1, 32, and 33, the PN junction forward voltage (base-emitter voltage) between the bases of transistors 17 and 18 and the emitters of transistors 1 and 2, ), the sum of the base-emitter voltage of transistor 32 and the base-emitter voltage of transistor 33 is applied.
(However, the voltage drop across the buffer resistor 34 due to the base current of the transistor 33 is ignored.)
The base of the transistor 10 is connected to the commonly connected collectors of the transistors 31 and 32.
and 15, it is connected to the base of the transistor 7, and the emitter is connected to the positive power supply +V through the resistor 35.
is connected to the collector of a PNP transistor 36 forming a constant current source. Here, the resistor 35 is assumed to have a resistance value 2R ₂ that is twice the resistance value R ₂ of the resistors 9 and 16, and therefore, the transistor 36 is connected to the composite circuit of the transistors 31 and 32 and the transistor 33. and a current 1/2 of the current 2I _p supplied by 15,
That is, a constant current I _p is caused to flow.

On the other hand, the respective emitters of PNP transistors 37 and 38 whose bases are grounded are connected to the respective collectors of transistors 13 and 14 forming the second differential amplification section. With transistors 14 and 38,
A cascode connection is formed in each case. An output signal derivation section formed by NPN transistors 39, 40, and 41 is connected to the collector of the transistor 37, that is, to one of the output sections of the second differential amplification section formed including the transistors 13 and 14. is connected. Transistors 39 and 40
form a current mirror circuit, in which the collector of a diode-connected transistor 39 forming one current path is connected to the collector of transistor 37, and the collector of transistor 40 forming the other current path. The emitter of a transistor 41 forming a cascode connection with this transistor 40 is connected to.
The emitters of these transistors 39 and 40 are connected to a resistor 42 having the same resistance value _R3 .
and 43 to the negative voltage -V. The collector of the transistor 41 is connected to the output terminal 24 together with the collector of the transistor 21 described above.
It is connected to the.

Further, the collector of the transistor 38, that is, the second transistor formed including the transistors 13 and 14
An NPN transistor 4 forming a current mirror circuit corresponding to the above-mentioned transistors 39, 40 and 41 is also connected to the other output section of the differential amplification section.
4 and 45, and an output signal derivation section formed by the NPN transistor 46 are connected. Resistors 47 and 48 having a resistance value R ₃ and corresponding to the resistors 42 and 43 are connected to the emitters of the transistors 44 and 45, respectively, and the collector of the transistor 46 is connected to the output terminal 30 together with the collector of the above-mentioned transistor 27. Connected.

The bases of transistors 37 and 38 are connected in common, and between these bases and the commonly connected emitters of transistors 13 and 14,
2 formed by PNP transistors 49 and 50
An element that generates two PN junction forward voltages, and an NPN
A bias circuit formed by a transistor 51 and a buffer resistor 52 connected to its base is connected. This bias circuit consists of transistor 5
When current flows through transistors 1, 50 and 59, the emitters of transistors 13 and 14 and transistor 37
A voltage equal to the sum of the base-emitter voltage of transistor 51, the base-emitter voltage of transistor 50, and the base-emitter voltage of transistor 49 is applied between the bases of transistor 38 and 38.
(However, the voltage drop across the buffer resistor 52 due to the base current of the transistor 51 is ignored.)
The commonly connected collectors of the transistors 49 and 50 have their bases connected to the base of the transistor 6 as well as the transistor 5, and their emitters connected to the negative power supply -V through the resistor 53, and are connected to a constant current source. NPN transistor 54 forming
collectors are connected. Here, the resistor 53 is
It is assumed that the resistance value 2R 1 is twice the resistance value R ₁ of the resistor 11, and therefore, the transistor 54 has a resistance value 2R ₁ which is twice the resistance value R 1 of the resistor 11. Therefore, the transistor 54 supplies the current 2
A current 1/2 of I _p , that is, a constant current I _p is passed.

In addition, PNP transistors 56 and 57 are diode-connected to a resistor 55 having a resistance value R ₃ and are used as elements that generate a PN junction forward voltage.
A bias is provided, one end of which is connected to the collector of the transistor 51 described above.
Therefore, in this bias circuit, a constant current I _p flows through the composite circuit of the transistor 51 and the transistors 49 and 50 by the transistor 54 forming a constant current source. That is, the constant current source formed by the transistor 54 supplies a common constant current _{I p} to the bias circuit formed including the transistors 56 and 57 and the bias circuit formed including the transistors 49, 50 and 51. -ing The base connected to the collector of transistor 57 is transistor 2.
1 and 27, and a predetermined bias voltage is applied to the bases of transistors 21 and 27.

Furthermore, similar to the bias circuit formed including the transistors 56 and 57 described above, the resistance value
A resistor 58 with R ₃ and diode connected,
PN junction is used as an element that generates forward voltage.
A bias circuit formed by NPN transistors 59 and 60 is provided, one end of which is connected to the collector of transistor 33 described above. Therefore, this bias circuit includes a constant current source that flows through the composite circuit of transistors 31 and 32 and the transistor 33 by the transistor 36 forming the constant current source.
I _p will flow. That is, the transistor 36
The constant current source formed by the transistor 59
A common constant current I _p is passed through the bias circuit formed including the transistors 31, 32, and 60 and the bias circuit formed including the transistors 31, 32, and 33. The base connected to the collector of transistor 60 is connected to transistors 41 and 46.
are connected to the bases of transistors 41 and 4
A predetermined bias voltage is applied to the base of 6.

In the above configuration, input terminals 3 and 4
When no input signal is supplied to the transistors 1 and 2, that is, when there is no signal, the first and second differential amplifiers are in a balanced state, and the transistors 1 and 2 have
A constant idling current having a current value of approximately I _p flows through transistors 19 and 17 and transistors 25 and 18, respectively, and a transistor 37 flows through transistors 13 and 14, respectively.
A constant idling current having a current value of approximately I _p flows through the transistors 39 and 39 and the transistors 38 and 44 . At this time, the current flows from the base of the transistor 1 through the input terminal 3 to the emitter.
The base current of the transistor 13 and the ace current from the emitter to the base of the transistor 13 are in opposite directions,
If the characteristics of transistors 1 and 13 are completely equal, both base currents will be equal, and at input terminal 3, both base currents will cancel each other out and become zero. Although their respective characteristics are said to be approximately equal, they are not completely equal, so there is a slight difference between the two base currents, and a minute current corresponding to the difference between the two base currents flows through the input terminal 3. The same applies to the base current from the base to the emitter of the transistor 2 flowing through the input terminal 4 and the base current from the emitter to the base of the transistor 14, and a minute current corresponding to the difference between the two base currents flows through the input terminal 4. Become. Therefore, the input bias current flowing through the input terminals 3 and 4 to the first and second differential amplifiers is extremely small, and the input offset current, which is the difference between these two input bias currents, is extremely small. The current also becomes zero or extremely small. Therefore, the adverse effects of input bias current and input offset current are effectively suppressed.

When a differential input signal is supplied to input terminals 3 and 4, an operating current that changes according to the differential input signal flows through transistors 1 and 2, and transistors 13 and 14 also have an operating current flowing through transistors 1 and 2. A differential current flows which varies in a complementary manner to the operating current flowing through 1 and 2.

The differential current flowing through transistors 1 and 2 is
The current flows through transistors 19 and 17 and transistors 25 and 18, respectively, and transistors 19 and 20 and transistors 25 and 26 form a current mirror circuit, respectively, and output terminals 24 and 30 are connected to the load of the next stage circuit, etc. are connected, ideally the same current flows through transistors 20 and 26 as the current flowing through transistors 19 and 25, respectively.
1 and transistors 26 and 27 will carry the same output current as the differential current flowing through transistors 1 and 2. In addition, transistors 13 and 14
The differential current flowing through transistors 39 and 37,
and flows through transistors 44 and 38, and based on this, transistor 40 flows in the same manner as described above.
The same output current as the differential current flowing through transistors 13 and 14 flows through transistors 13 and 41 and transistors 45 and 46 as well. As a result, transistors 21 and 4 have complementary output currents flowing through them.
The amplified output signal is supplied to an output terminal 24 commonly connected to the respective collectors of the transistors 1 and 30 commonly connected to the respective collectors of the transistors 27 and 46 through which output currents having a complementary relationship also flow. You can get it. In this case, the positive power supply +V
Even if the voltage value of the negative power supply -V is relatively low, the voltage can be used effectively and the amplitude of the output signal can be sufficiently large.

Now, considering the output signal deriving section connected to the transistor 17 forming the output section of the first differential amplifier section, when there is no signal, the transistors 19 and 20 forming a current mirror circuit,
A constant idling current I _p flows through each of the resistors 22 and 23 and the transistor 21. The collector voltage V _c1 of the transistor 19 forming this current mirror circuit is the value obtained by subtracting the voltage V _r1 across the resistor 22 and the base-emitter voltage V _BE1 of the transistor 19 from the voltage V V of the positive power supply + _V . That is, V _c1 = V _V − (V _r1 + V _BE1 ). On the other hand, since the base of the transistor 57 is connected to the base of the transistor 21 and a bias voltage is applied, the collector voltage V _c2 of the other transistor 20 forming the current mirror circuit is from the voltage V V of the positive power supply + _V . Subtract the voltage V _r2 across the resistor 55 from the base-emitter voltages V _BE2 and V _BE3 of the transistors 56 and 57, and then subtract the base-emitter voltage V BE3 of the transistor 27.
The value is the sum of V _BE4 . That is, V _c2 = V _V - (V _r2 + V _BE2 + V _BE3 ) + V _BE4 . Here, the resistance values of the resistors 22 and 55 are both _R3 , and the current I _p flows through these as well as the transistors 19, 21, 56, and 57, and V _r1 and V _r2 are equal. , this is set as V _r , and since V _BE1 , V _BE2 , V _BE3 and V _BE4 are equal to each other, when this is set as V _BE , V _c2 = V _c2 = V _V − (V _r + V _BE ) becomes. That is, the collector voltage of transistor 19 and the collector voltage of transistor 20 are made equal. Also, the resistance value of resistor 23 is
Since R ₃ , the voltage across the resistor 23 is also V _r
The collector-emitter voltage of transistor 19 and the collector-emitter voltage of transistor 20 are made equal.

Therefore, transistor 19 and transistor 2
0 means that both have the same collector voltage and are operated with both collector-emitter voltages being equal, so their operating characteristics match, and the The current mirror circuit performs accurate current mirror operation and has excellent linearity. Furthermore, connecting the transistor 21 to the collector of the transistor 20 to form a cascode connection means that the collector of the transistor 20 is not affected by voltage changes at the output terminal 24, which is good from this point of view. A current mirror operation will be performed.

Also, in the output signal deriving section connected to the transistor 18, this is connected to the above-mentioned transistor 1.
As is clear from the fact that the output signal derivation section connected to
This means that the collector voltages of both devices are made equal, and both devices are operated with their collector-emitter voltages being made equal, so that their operating characteristics are matched. Further, the effect of the transistor 27 is similar to that of the transistor 21.

Next, considering the output signal deriving section connected to the transistor 37 forming the output section of the second differential amplifier section, when there is no signal, the transistors 39 and 40 and the resistors 42 and 43 forming a current mirror circuit A constant idling current I _p flows through each of the transistors 41 and 41 . And the collector voltage V _c3 of the transistor 39 is
Voltage of negative power supply -V -V Voltage across resistor 42 from _V
The value is the sum of V _r3 and the base-emitter voltage V _BE5 of the transistor 39. That is, V _c3 =-V _V +V _r3 +V _BE5 . On the other hand, the collector voltage of the transistor 40
Since the base of the transistor ₆₀ is connected to the base of the transistor 41 and a bias voltage is applied to the voltage V c4 , the voltage across the resistor 48 V r4 and the voltage V _r4 of the negative power supply _−V and the transistors 59 and 60
The value is obtained by adding the respective base-emitter voltages V _BE6 and V _BE7 of the transistor 41 and subtracting the base-emitter voltage V _BE8 of the transistor 41. That is, V _c4 = -V _V + V _r4 + V _BE6 + V _BE7 - V _BE8 . Here, the resistance values of the resistors 42 and 48 are both R ₃ , and a current I _p flows through these as well as the transistors 39, 41, 59, and 60, and V _r3 and V _r4 have the same value V _r , and since V _BE5 , V _BE6 , V _BE7 and V _BE8 are equal to each other, if this is V _BE , then V _c3 = V _c4 = -V _V + V _r + V _BE . That is, the collector voltage of transistor 39 and the collector voltage of transistor 40 are made equal. Also, the resistance value of resistor 43 is
Since R ₃ , the voltage across the resistor 43 is also V _r
Therefore, the voltage between the collector and emitter of the transistor 39 and the voltage between the collector and emitter of the transistor 40 are made equal.

Therefore, transistor 39 and transistor 4
0 means that both have the same collector voltage and are operated with both collector-emitter voltages being equal, so their operating characteristics match, and the The current mirror circuit performs accurate current mirror operation and has excellent linearity. Furthermore, connecting the transistor 41 to the collector of the transistor 40 to form a cascode connection means that the collector of the transistor 40 is not affected by voltage changes at the output terminal 24, which is good from this point of view. A current mirror operation will be performed.

Also, in the output signal deriving section connected to the transistor 38, this
As is clear from the fact that the output signal derivation unit connected to
This means that the collector voltages of both devices are made equal, and both devices are operated with their collector-emitter voltages being made equal, so that their operating characteristics are matched. Further, the effect of the transistor 46 is similar to that of the transistor 41.

As described above, from the output terminals 24 and 30, effective use of voltage is achieved, and an amplified output without distortion that faithfully corresponds to the input signal is derived.

Note that when the voltages of the positive power supply +V and the negative power supply -V are relatively low, transistors 1 and 2 and transistors 13 and 14 operate with small collector-emitter voltages, respectively. . For this reason, for example, the differential input signals supplied to input terminals 3 and 4 include a common-mode component, and as a result, the emitter potentials of transistors 1 and 2 and transistors 13 and 14 vary, and as a result, If their collector-emitter voltages change, the output characteristics of transistors 1 and 2 and transistors 13 and 14 will vary, resulting in output distortion. However, in this example, a bias circuit formed including transistors 31, 32 and 33, and transistors 49, 50 and 51 are
Due to the existence of a bias circuit formed including
The voltage between the commonly connected bases of transistors 17 and 18 and the commonly connected emitters of transistors 1 and 2 is also the voltage between the bases and emitters of transistors 31, 32 and 33 through which constant current I _p flows. The voltage between the commonly connected bases of transistors 37 and 38 and the commonly connected emitters of transistors 13 and 14 is fixed at a constant value, and the voltage between the commonly connected bases of transistors 37 and 38 and the commonly connected emitters of transistors 13 and 14 is fixed at a constant _value . is fixed at a constant value based on the base-emitter voltage of each. As a result, the collector-emitter voltage of each of transistors 1 and 2 takes a constant value from the above-mentioned constant value and the value obtained by subtracting the base-emitter voltage of transistor 17, which takes a constant value from the above-mentioned constant value. The voltage between the base and emitter of the transistor 18 is set to a value less than the voltage between the base and the emitter of the transistor 18.
and the collector-emitter voltage of each of the 14 is,
Transistor 3 that takes a constant value from the above-mentioned constant value
It is set to a value obtained by subtracting the base-emitter voltage of transistor 38, which takes a constant value from the above-mentioned constant value. Therefore, for example, even if the differential input signal includes a common-mode component and the emitter potentials of transistors 1 and 2 and transistors 13 and 14 fluctuate, their collector-emitter voltages do not change. Transistors 1 and 2 and transistors 13 and 14 perform an amplification operation with good linearity and do not produce output distortion.

Furthermore, in this example, transistors 17 and 18 with grounded bases are connected to transistors 1 and 2, respectively, and transistors 13 and 14 are connected to transistors 1 and 2, respectively.
Since the base-grounded transistors 37 and 38 are respectively connected to form a cascode connection, the voltage feedback factor is reduced and even high-frequency signals can be amplified, realizing broadband amplification.

Furthermore, a constant current I _p is caused to flow by a constant current source formed by transistor 5, which is connected to the commonly connected emitters of transistors 1 and 2, respectively, and to transistors 13 and 14, respectively. A constant current I _p is caused to flow by a constant current source formed by the transistor 15 connected to the emitter of the transistor, a bias circuit including transistors 31, 32, and 33, and a transistor 59.
and 60, the transistor 3
6, a bias _circuit including transistors 56 and 57, and a bias circuit including transistors 49, 50, and 51.
The constant current I _p that is commonly passed by the constant current sources formed by Variations in the voltage between the base and emitter of each transistor through which the current flows are prevented, and the characteristics of the circuit due to temperature changes are sufficiently compensated.

Application Example The transistor amplifier circuit according to the present invention can be applied to various uses as a general-purpose operational amplifier circuit, and is suitable for configuring, for example, the first stage amplifier section of a power amplifier circuit system for audio signals.

Effects of the Invention As is clear from the above description, in the transistor amplifier circuit according to the present invention, the input bias current to the differential amplifier section at the input section is extremely small.
While operating as an operational amplifier circuit, the adverse effects of input bias current and input offset current are reduced, and excellent output characteristics can be obtained. In addition, the output signal deriving section formed by including the differential amplifier section and the current mirror circuit connected to its output section operates at a relatively low power supply voltage due to the function of a predetermined bias circuit provided for the differential amplifier section and the current mirror circuit connected to its output section. It is said that it operates with good linearity even under conditions of Furthermore, since a constant current related to the idling current in the differential amplifier section and whose temperature characteristics match each other is passed through each of the bias circuits, the differential amplifier section and the output signal derivation section are formed. This prevents variations in the base-emitter voltages of each transistor forming each bias circuit and each transistor forming each bias circuit, thereby stabilizing the voltage setting of each part.

[Brief explanation of drawings]

The figure is a connection diagram showing an example of a transistor amplifier circuit according to the present invention. In the figure, 1 and 2 form the first differential amplification section.
NPN transistors, 3 and 4 are input terminals, 5 and 54 are NPN transistors each forming a constant current source, 13 and 14 are PNP transistors forming a second differential amplifier section, 15 and 36 are each forming a constant current source Forming PNP transistors, 19 and 2
0, 25 and 26 are PNP transistors forming a current mirror circuit, 21 and 2, respectively.
7 is a PNP transistor forming a cascode connection with transistors 20 and 26, respectively;
4 and 30 are output terminals, 31, 32, 59 and 6
0 are NPN transistors 39 and 40 as elements that generate PN junction forward voltage, and
44 and 45 are NPN transistors forming a current mirror circuit, 41 and 46 are NPN transistors forming a cascode connection with transistors 40 and 45, respectively; 49, 50,
56 and 57 are PNP transistors each serving as an element that generates a PN junction forward voltage.

Claims (1)

[Claims] 1. A first and a second base to which an input signal is supplied.
a first differential amplification section formed including a transistor, a base of which is supplied with a common input signal to the first and second transistors, respectively;
a second differential amplification section formed including third and fourth transistors complementary to the transistor; a diode-connected fifth transistor; and a base commonly connected to the fifth transistor; a first current mirror section including a sixth transistor, the fifth transistor being connected to the output section of the first differential amplifier section; a diode-connected seventh transistor; a second current mirror section including an eighth transistor whose base is commonly connected to the seventh transistor, and formed by connecting the seventh transistor to the output section of the second differential amplifier section; , a ninth transistor connected in cascode to the sixth transistor, a tenth transistor connected in cascode to the eighth transistor, and an element that generates a PN junction forward voltage; a first bias circuit section that supplies a base bias voltage to the transistor No. 9; and a second bias circuit section that includes an element that generates a PN junction forward voltage and supplies a base bias voltage to the tenth transistor. a third bias circuit formed including a bias circuit section and an element that generates a PN junction forward voltage, and supplies a bias voltage that sets the collector-emitter voltage of each of the first and second transistors to a predetermined value; a fourth bias circuit that is formed to include a circuit section and an element that generates a PN junction forward voltage, and supplies a bias voltage that sets the collector-emitter voltage of each of the third and fourth transistors to a predetermined value; A first constant current source section that supplies a common constant current to the first and fourth bias circuit sections, and a second constant current source section that supplies a common constant current to the second and third bias circuit sections. A transistor amplifier circuit comprising: a current source section; and an output terminal section commonly provided to the output sections of the ninth and tenth transistors.