JPH0452906A - Programmable controller system - Google Patents

Abstract

PURPOSE:To avoid erasing of data by always storing data, which is subjected to prescribed processing by a special I/O unit, in a register of a programmable controller backed up with a battery. CONSTITUTION:A special I/O unit 21 which subjects data to prescribed processing and a programmable controller 22 which stores data of the special I/O unit 21 in the register to subject it to various processings and backs up data in the register by the battery are provided. Data subjected to prescribed processing by the special I/O unit 21 is always stored in the register of the programmable controller 22. Consequently, the programmable controller 22 can back up data through the power source of a programmable controller system is turned off. Thus, erasing of data is avoided.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention is a programmable device that performs various types of processing on the data of the special I/O unit according to instructions from the special I/O unit and the special I/O unit. The present invention relates to a programmable controller system including a controller.

[Conventional technology]

Traditionally, programmable controller systems (
A programmable controller (hereinafter referred to as a PC) is connected to a special , various processes within the PC system are performed.

For example, as shown in FIG. 4, the special 1/O unit 51 equipped with the A-D converter 36 selects any input from among the input sections 31 and 32 using the multiplexer 33, and then selects an input from the amplifier 34. By amplifying the input voltage (current),
Through the sample and hold circuit 35, the A-D converter 36
Accordingly, A-reconversion is performed.

Further, the data converted from A to D as described above is sent to a CPU (Central P
processing unit) 38.

The data input to the CPU 3 B is subjected to digital gain and digital offset processing, and then stored in the RAM 42.

When the PO 52 performs various processing on the data in the special I/O unit 51, the data is read out by the PO 52, and the data is transferred to the PO 52 (not shown) via the interface 40 of the special I/O unit 51. The data is temporarily stored in a register, and then various processing is performed on the data.

[Problem to be solved by the invention]

However, in the above conventional configuration, the special I/O unit 5
The data that has been subjected to the predetermined processing in step 1 is always stored in the RAM 42 of the special I/O unit 51, except when various processing is performed in the PO 52. For this reason, when the power of the PC system is turned off, the data stored in the RAM 42 is erased, resulting in a problem that the data must be readjusted. On the other hand, similarly to the register of PO52, if the special I/O unit 51 is provided with a battery for backing up the data in the RAM42, or if an EEFROM is used and the data is stored in this EEFROM, the PC
Although it is possible to avoid erasing data when the system power is turned off, if a battery is installed, and if the EEPR
In either case, when using OM, there is a problem of increased costs.

[Means to solve the problem]

The programmable controller system according to the present invention includes:
In order to solve the above problems, we have a special I/O unit that performs predetermined processing on data, and the data of the special I/O unit is stored in a register and subjected to various processing, and the data in the register is stored in a battery. In a programmable controller system equipped with a backup programmable controller, the following measures are taken.

That is, data subjected to predetermined processing by the special I/O unit is always stored in the register of the programmable controller.

[For production]

According to the above configuration, data subjected to predetermined processing by the special I/O unit is always stored in the register of the programmable controller in a battery-backed state.

Therefore, even if the power of the programmable controller system is turned off, the programmable controller back-ampls the data, so erasure of data can be avoided.

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS. 1 to 3.

As shown in FIG. 1, the PC system according to the present invention includes a special I/O unit 21 and a special I/O unit 21.
The PO 22 performs various processing on the data of the special I/O unit 21 according to instructions from the I/O unit 21.

The special I/O unit 21 is equipped with two input sections 1 and 2, and these input sections 1 and 2 include voltage sections 1a and 2a, current sections 1b and 2b, and common sections 1c and 2.
C are provided individually. The voltage sections 1a and 2a are individually connected to the multiplexer 3 via resistors R1° and Rts, and the current sections 1b and 2b are individually connected to the common section IC and the multiplexer 3 via resistors R1b and Rlb, respectively. 2C at connection point A-B. And the above connection point A-
B are individually connected to multiplexer 3 via resistor RIC'R1C.

The output section of the multiplexer 3 is connected to the input section of the A-D converter 6 via the amplifier 4 and the sample-and-hold circuit 5, and the output section of the A-D converter 6 is connected to the input section of the A-D converter 6.
It is connected to the input section of the CPU 8 via a photocoupler 7. The output part of the CPtJ8 is the photocoupler 9.
It is connected to the A-D converter 6 and the multiplexer 3 via.

Further, the CPU 8 has a special I/O unit 21 and a P
It is connected to the interface /O for exchanging data with O22, and the interface /O
A RAM 12 and a ROM 1.3 are connected to the transmission line 11 between the CPU 8 and the CPU 8, respectively.

Further, within the special I/O unit 21, a DC-DC converter 23 is provided. The DC-DC converter 23 inputs a voltage of 0■~→~5■, converts this voltage into a predetermined analog power supply voltage, and converts it to other components in the special I/O unit 2). It is designed to supply power.

The interface /O of the special I/O unit 21 and the PO 22 are connected by a transmission line 24, and a signal set to 0 is transmitted from the special I/O unit 21 to the PO 22. Then, the PO 22 determines that the request is from the special r/O unit 21 for parameter processing. Furthermore, data that has been subjected to predetermined processing by the special I/O unit 21 is stored in a register (not shown) in the PO 22 by setting a check byte to DD. According to instructions from Unit 21, BC is added to the data.
When performing C calculations, 55 cents are calculated for Chie Tsukubaite.

The PC 22 is equipped with a battery (not shown) to back up data stored in the register.

In the above configuration, the special I/O unit 21 selects any input section from among the input sections 1 and 2 using the multiplexer 3 and outputs the input voltage (IIT flow) to the amplifier 4. After amplifying the voltage (current) input to the amplifier 4, the voltage (current) is passed through the sample hold circuit 5.
The signal is input to a converter 6 and subjected to A-D conversion. Then, the converted data is input to the CPU 8 via the photocoupler 7, subjected to fine adjustment processing of digital gain and digital offset, and stored in the RAM 12.

On the other hand, PO22 reads out the parameters of the special I/O unit 2 and sets the digital gain and digital gain.
The data that has been subjected to offset fine adjustment processing is stored in a register, and BCC calculation is performed on the data according to instructions from the special I/O unit 2 engineer.

In addition, the operation flow of the special I/O unit 2 is as shown in Figure 2 (a). First, it is determined whether or not the digital gain and digital offset are being adjusted for the data. (Sl).

And if you are adjusting the data, you can add digital data to the data.
The gain and digital offset are finely adjusted (S2), and then the check byte is set to DD, the signal is set to O (33), and the parameters are transferred back to PO22 (33). S4).

When the parameters are transferred back to PO22 as described above, it is next checked whether to keep the power ON or to turn it OFF, as in the case where the determination in Sl is not during data adjustment. (S5). When turning off the power, next, it is checked whether or not the input mode has been changed (S6
), if there is no change in the input mode, return to Sl again. On the other hand, if there is a change in the input mode, the check byte is set to 55 (S7), and then the signal is set to 0 (S8), and the PO22 request parameters.

When parameters are requested from the PO 22 as described above, it is then determined whether data has been received from the PO 22 (S9). If no data is received, the process returns to Sl again, while if data is received, the data received from PO22 is stored in RAM (SIO), and then BCC calculation is performed accurately on the data. (Sll). If the BCC calculation has not been performed accurately on the data, error handling should be performed on the parameters.
2), After that, process S7 and S8 again to request parameters from PO22, while adding BC to the data.
If the C calculation has been performed correctly, the process returns to Sl again, processes in S2 and S3 are performed, and the parameters are transferred back to the PO 22 (S4).

Further, in the operation flow of the PO 22, as shown in FIG. 2(b), it is first determined whether the signal is 0 or not (S21).

〃If the signal is not 0, repeat S21 again, 〃If the signal is 0, then check byte is 5.
5 or not (S22), and if the check byte is 55, BCC calculation is performed on the data (323).
, data is transferred from the register of the PC 22 to the special I/O unit 21 (324). And again, S21
Return to

On the other hand, if the check byte is not 55 in the determination in S22, then it is determined whether the check byte is DD (3
25). If the check bite is not DD, try 3 again.
On the other hand, if the check bite is DD,
Read the parameters of the special I/O unit 21 and
The data is stored in the register of C22 (326).

Next, regarding data exchange between the special I/O unit 21 and the PC 22, the special I/O unit 21 shown in FIG.
The operation flow of the unit 21 and the operation flow of the PC 22 shown in FIG. 2(b) will be explained below.

First, a case will be described in which data subjected to fine adjustment processing of digital gain and digital offset by the special I/O unit 21 is stored in a register of the PC 22.

The special I/O unit 21 first determines whether or not the digital gain and digital offset are being adjusted for the data (Sl). At this time, since it is assumed that the data will be subjected to adjustment processing, the data is being adjusted, and the data is subjected to fine adjustment processing of digital gain and digital offset (S2). Thereafter, the check byte is set in DD and the ``signal'' is set to 0 (S3).

On the other hand, the PC 22 cannot determine that the signal is O.
21), and when it is determined that the check byte is not 55 (522), and when it is determined that the check byte is DD (326), the parameters of the special I/O unit 21 are read. The /O unit 21 inputs the parameters to the PC 22 as shown in ■.
26 (S4), and the PC 22 stores this parameter in a register (S26).

Next, according to instructions from the special I/O unit 21, the PC
The case where 22 performs BCC calculation on data will be explained.

First, when the special I/O unit 21 confirms that the power is kept on (S5), the check byte is set to 55 (S7), and then the 〃 signal is set to 0 (S8).

On the other hand, the PC 22 cannot determine that the signal is 0.
21), and when it is determined that the check byte is 55 (S22), BCC calculation is performed on the data (S
23), this data is transferred from the register of the PC 22 to the special I/O unit 21 as shown in (324).
).

Next, when the special I/O unit 21 determines that data has been received (S9), it stores the received data in the RAM (SIO), and then checks whether the BCC has been accurately applied to the data. It is determined whether or not (Sll). If the BCC calculation has not been performed accurately on the data, error processing is performed on the parameters (512), and then S7 is performed again.
Then, the process of S8 is performed to request parameters from the PC 22. On the other hand, if the BCC calculation has been performed accurately on the data, return to Sl, perform fine adjustment processing of digital gain and digital offset on the data (S2
), store this data in the register of the PC 22 (32
6).

In this embodiment, data exchange between a special I/O unit 21 equipped with an A-D converter 6 and a PC 22 in a PC system is explained.
The unit 21 is not particularly limited to one equipped with an A-D converter 6; for example, as shown in FIG.
- A special I/O unit 81 equipped with an A converter 66, and a P
It is also possible to exchange data with the C22.

〔Effect of the invention〕

The programmable controller system according to the present invention includes:
As described above, the configuration is such that data subjected to predetermined processing by the special I/O unit is always stored in the register of the programmable controller.

As a result, the data processed by the special I/O unit is always stored in the register of the programmable controller with battery backup, and the power supply of the programmable controller system is turned off. Even when the power is turned off, the programmable controller backs up the data, making it possible to avoid erasing the data. Also, special T/O
The unit may be equipped with a battery for data backup,
Alternatively, by using an expensive EEPROM, the power supply can be switched off.
Compared to the case of avoiding data erasure at F time, it is possible to reduce costs, and furthermore, since there is no need for a peripheral circuit for data backup, space can be improved, and the size of the programmable controller system can be reduced. This has the effect that it can be easily achieved.

[Brief explanation of drawings]

1 to 3 show one embodiment of the present invention. FIG. 1 is a schematic configuration diagram showing a programmable controller system. FIG. 2(a) is a flowchart showing the operation flow of the special I/O unit. FIG. 2(b) is a flowchart showing the operation flow of the PC. Figure 3 shows a special I/O unit equipped with a D-A converter,
FIG. 2 is a schematic configuration diagram showing a PC. FIG. 4 is a schematic diagram of a conventional programmable controller system. 21 is a special I/O unit, and 22 is a programmable controller.

Claims (1)

[Claims] 1. A special I/O unit that performs predetermined processing on data;
In a programmable controller system that stores the data of a special I/O unit in a register and performs various processing, and also includes a programmable controller that backs up the data in the register with a battery, the special I/O unit performs predetermined processing. A programmable controller system characterized in that data subjected to the above processing is always stored in a register of the programmable controller.