JPH0453066Y2 - - Google Patents

Description

[Detailed explanation of the idea]

The present invention relates to a circuit for driving an FET (field effect transistor) used in a DC-DC converter, for example, which repeatedly opens and closes a DC power supply to apply it to a load, and particularly relates to a circuit that can increase the switching speed of this FET. Note that in the following figures, the same reference numerals indicate the same or corresponding parts.

2. Description of the Related Art FIG. 3 shows an example of this type of circuit. In the same figure, V _Dc is a DC power supply, and Q1 is a P channel type power supply.
FET, its source S is connected to the DC power supply V _DC , and its drain D is connected to the load RL, and this FET Q1 repeatedly opens and closes the DC power supply V _DC to load the load.
For example, a predetermined voltage lower than the voltage of the power supply V _DC is supplied to RL. SW is a switch whose one end is connected to the negative pole of the DC power supply V _DC .
In this case, SW is repeatedly opened and closed at high speed to drive the gate G of FETQ1 through resistor R1, and
1 is opened and closed as described above. Furthermore, this switch
SW may be composed of an auxiliary transistor not shown. R2 is a resistor that short-circuits the gate G and source S of FETQ1 to turn off FETQ1 when the switch SW is turned off. C is a speed-up capacitor, which temporarily shorts the resistor R1 when the switch SW changes to open or close, and has the role of making the potential change of the gate G steeper and increasing the opening and closing speed of the FET Q1. In this way, as a conventional FET drive circuit,
In order to operate the FET at high speed, many circuits simply added a speed-up capacitor as shown in Figure 3c to the gate circuit.

[Problems to be solved by the invention] However, when the voltage of the DC power supply V _DC decreases, or when even higher speed operation is required, it is only necessary to provide a speed-up capacitor C in the gate circuit as shown in Figure 3. In this method, FETQ1
There is a problem in that the switching speed, especially when FETQ1 is turned off, is insufficient. The purpose of this invention is to connect the source S and gate G of the FET.
The purpose of the present invention is to enable faster operation of the FET by providing an FET drive circuit that further includes a reactor between them.

[Means to solve the problem]

In order to solve the above problems, the circuit of the present invention is a ``FET (Q) having a source, gate, and drain.
1 etc.) and a drive circuit that drives the FET,
Connect the source and drain of the FET in series between a DC power supply (such as V _DC ) and a load (such as RL),
In the circuit that operates the FET by the drive circuit to open and close the current supplied to the load, the drive circuit includes a first resistor (R
1 etc.) and a switch (SW etc.) are connected in series,
A speed-up capacitor (such as C) is connected in parallel to the first resistor, and a reactor (such as L) is connected to the second resistor.
resistor (such as R2) and Zener diode (ZD
etc.) connected in series in this order, one end of the reactor is connected to the source of the FET, and the first
The connection point between the second resistor and the switch and the connection point between the second resistor and the Zener diode are connected.

[Effect]

This idea inserts a reactor between the source and gate of the FET, and when the FET is turned off, the stored energy of this reactor is used to rapidly discharge the junction capacitance between the FET's gate and source. This increases the switching speed.

[Example of idea]

Embodiments of the present invention will be described below based on FIGS. 1 and 2. FIG. 1 is a circuit diagram as an embodiment of the present invention, and corresponds to FIG. 3. Further, FIG. 2 is a diagram showing the timing and waveforms of the operations of each part in FIG. 1. In the gate circuit of FETQ1 in Figure 1, a switch SW that opens and closes at high speed is connected in series from the gate G of FETQ1 through a resistor R1, as in Figure 3, and a speed-up capacitor C is connected in parallel to the resistor R1. It is connected. In addition, a reactor L, a resistor R2, and a Zener diode ZD are newly connected in series from the source S of FETQ1, and the other end of the Zener diode ZD is a DC power supply.
Connected to the negative side of V _DC . Further, the cathode K side of the Zener diode ZD and the intersection of the switch SW on the resistor R1 side are connected. Next, in Figure 2, 1 and 3 are switches respectively.
The timing of the ON/OFF operation of SW and FETQ1 is shown, and FIG. 2 shows the waveform of the voltage across the reactor L (reactor voltage). Next, the operation shown in FIG. 1 will be explained with reference to FIG. 2. First, if the switch SW is turned on, the DC power supply is turned on.
V _Dc causes a current i3 to flow from the source S of FET Q1 to the gate G side, thereby rapidly charging the gate-source junction capacitance of FET Q1, and this gate G.
FETQ1 to provide bias voltage between source S
is turned on. At the moment when FETQ1 is turned on, current i3 mainly flows through speed-up capacitor C, and resistor R
1 is temporarily shorted, and capacitor C
This increases the turn-on speed of FETQ1. Also, at the same time as the switch SW is turned on, the DC power supply V _{DC is} turned on.
A current i1 also flows through the reactor L, and energy is stored in the reactor L. Next, when the switch SW is turned off, the current i1 becomes i2 due to the accumulated energy of the reactor L, and the reactor L → capacitor C → gate G of FET Q1.
flows through the path of the source-S circuit, rapidly discharging the gate G-source S junction capacitance of FETQ1, and causing the FETQ
It works to increase the speed of 1. Also, at this time, the generated voltage of reactor L (reactor L voltage)
If E rises above a predetermined value, there is a risk of destroying FETQ1, etc., so a bypass current is passed from reactor L to Zener diode ZD to protect the circuit, and the reactor voltage E is connected to this Zener diode.
I try not to exceed the ZD zener voltage. In the above embodiment, an example was explained in which a P-channel type FET was used as FETQ1, but if an N-channel type FET was used instead, the DC power supply V _Dc
Also, the polarity of the Zener diode ZD may be reversed to that in FIG.

[Effect of the invention] According to this invention, a speed-up capacitor is installed in the circuit that drives the FET, which repeatedly opens and closes the DC power supply and applies it to the load, to achieve high-speed operation.
Since we decided to insert a reactor between the gate and source of the FET, we can use the energy stored in this reactor to rapidly discharge the junction capacitance between the gate and source of this FET when the FET is off. switching speed can be increased.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram as an embodiment of the present invention, Fig. 2 is a diagram showing timing and waveforms to explain the operation of Fig. 1, and Fig. 3 is a conventional circuit diagram corresponding to Fig. 1. It is. V _Dc ...DC power supply, Q1...FET, RL...Load, SW...Switch, L...Reactor, R
1, R2...Resistor, C...Speed up capacitor, ZD...Zena diode.

Claims (1)

[Scope of utility model registration request] A FET having a source, a gate, and a drain, and a drive circuit for driving the FET, the source and drain of the FET are connected in series between a DC power supply and a load, and the FET is operated by the drive circuit. In the circuit that opens and closes the current supplied to the load, the drive circuit includes a first circuit connected to the gate of the FET.
A resistor and a switch are connected in series, a speed up capacitor is connected in parallel to the first resistor, a reactor, a second resistor and a Zener diode are connected in series in this order.One end of the reactor is connected to the source of the FET. 1. A FET drive circuit characterized in that a connection point between a first resistor and a switch and a connection point between a second resistor and a Zener diode are connected.