JPH0453253B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application of the Invention] The present invention relates to a method and apparatus for inspecting defects in patterns, particularly for inspecting circuit patterns such as reticles, masks or printed circuit boards for IC (integrated circuit) manufacturing and masks for manufacturing the same. The present invention relates to an inspection method and apparatus.

[Background of the invention]

As shown in FIG. 11, if there is a chipped pattern 1a at position A, a protrusion 1b of the pattern at position B, and isolated defects 1c and 1d at positions C and D in a part of the IC manufacturing mask 1, this The conventional method for inspecting defects in mask patterns is to simultaneously image two chip patterns having the same pattern on a mask to be inspected, and use one pattern as a model pattern and the other pattern as a pattern to be inspected. A method has been implemented in which the two are compared and a portion where there is a difference between the two is determined to be defective.

However, with the above method, the mask may be damaged due to pattern defects or foreign matter on the reticle (on which a pattern for one IC chip is formed), which is the original plate for repeatedly printing the IC chip pattern onto the mask. It is not possible to detect defects common to each chip that occur in the pattern printed on the chip. In addition, even if it is determined that there is a defect because there is a difference between the model pattern and the pattern to be inspected, in order to determine whether the defect is in the model pattern or the pattern to be inspected, it is necessary to Furthermore, it is necessary to prepare another pattern and perform defect inspection by comparing this pattern with the above-mentioned model pattern and pattern to be inspected.

In addition, as another method of conventional defect inspection, instead of comparing patterns obtained by imaging, for example, a design pattern used in reticle manufacturing is used as a model pattern for the pattern to be inspected. A method has been put into practical use that compares the pattern with the pattern to be inspected.

This method involves, for example, sampling the pattern to be inspected captured by a photoelectric conversion element such as a television camera or a solid-state image sensor into the smallest unit called a pixel (if a solid-state image sensor is used as the photoelectric conversion element), (The output is sampled according to the size of the light-receiving surface of the element.) There is a method in which each pixel is binarized using a certain threshold and then compared with a model pattern. The situation of comparison between the pattern to be inspected and the model pattern in this method is as shown in Fig. 12, where figure a shows pattern 2 to be inspected which has a defect 2a in part A, which is originally a straight line, and pattern b to be inspected.
The figure shows a pattern 2' to be inspected which has been imaged and sampled from the pattern 2 to be inspected shown in figure a and then binarized.

In addition, figure c is a sample pattern 3 that forms a perfect mask without defects, and figure D is a comparison between the binarized inspection pattern 2' shown in figure b above and model pattern 3 shown in figure c above. Indicates that there is a difference in the hatched area between the two. Note that the grid Z shown in Figure b above represents sampling pixels. As is clear from the above figure b, when the inspected pattern shown in figure a is binarized, due to the quantization error caused by sampling and binarization, the outline of the binarized inspected pattern 2' is not shown in figure a. Inspection pattern 2 shown
Unevenness 2b', 2c' with a height of 1 pixel, which does not originally exist, is generated.

Therefore, when comparing the binary inspected pattern 2' shown in figure b with the model pattern 3 shown in figure c, the hatched portion shown in figure d is inspected as a difference between the two patterns. That is, the hatched portion shown in figure d is the defect 2a of the pattern to be inspected shown in figure a.
Defect 2a' after binarization, and pseudo defect 2b' caused by quantization error due to sampling and binarization.
2c' is included.

As a method for removing these pseudo defects 2b' and 2c', there is a conventional method described in, for example, Japanese Patent Publication No. 37475/1983. This method compares two patterns to be inspected that have the same pattern, and for convenience of explanation, a comparison between an example pattern and a pattern to be inspected will be explained with reference to FIG. 13 as an example. In the figure, figure a is the same as figure 12 a,
Pattern 2 to be inspected which has a defect 2a in portion A which is originally a straight line, Figure b is the pattern 2 to be inspected shown in Figure A.
The pattern to be inspected 2' which has been imaged and sampled has been binarized. In addition, when comparing the model pattern 3 shown in figure c with the binary inspected pattern 2' shown in figure b and the model pattern 3 shown in figure c, figure c shows the model pattern 3 that forms a perfect mask with no defects, and figure d shows the pattern 3 that forms a perfect mask without defects. Indicates when there is a difference between In figure e, the respective outlines shown by hatching in figures b and c are extracted from the binarized inspected pattern 2' and model pattern 3, and their common parts are hatched. Of the mismatched parts shown in the figure, parts that do not belong to the common part shown in figure e are hatched. Therefore, the method described in Japanese Patent Publication No. 54-37475 extracts the difference between pattern 2 to be inspected and model pattern 3 as shown in figure d, and at the same time extracts the difference between pattern 2 to be inspected and model pattern 3 as shown in figures b and c of both patterns by hatching. The respective contour parts are extracted as follows, and the common parts are extracted as shown by hatching in figure e. Then, among the mismatched portions between the inspected pattern 2' shown in Fig. d and the model pattern 3, only the part 2a' that does not belong to the common contour shown in Fig. e is extracted as shown in Fig. F, and this is identified as a true defect. It is detected as 2a.

However, in the above method, when the inspected pattern 2' is binarized, the pseudo defects 2b' and 2c' generated due to sampling and quantization errors are removed, as shown in Figure b, and only the true defects are detected. Although it may be possible to detect, it is difficult to detect minute defects (chips or protrusions in the pattern) that are around 1 to 2 pixels in size and exist at the border of the pattern because they are covered by the common outline. become. Furthermore, if the pixel size for sampling is reduced in order to detect such minute defects, the inspection speed will slow down, resulting in a reduction in the throughput of the apparatus.

SUMMARY OF THE INVENTION An object of the present invention is to provide a pattern defect inspection method and apparatus that eliminates the above-mentioned conventional drawbacks and enables inspection of even minute defects occurring in a pattern to be inspected at high speed.

In order to achieve the above object, the present invention does not set the detection sensitivity to zero (or decrease) in all areas where pseudo-defects may occur, that is, the boundaries of the pattern, but instead This method is characterized by distinguishing between minute true defects and pseudo defects occurring at pattern boundaries among mismatched portions of inspection patterns.

1 to 8 showing embodiments of the present invention will be described below.

Fig. 1 is a diagram of the principle of the present invention, in which Fig. a shows a pattern to be inspected 4 surrounded by straight lines without defects, and Fig. B shows an image of the pattern to be inspected 4 shown in Fig. A and is obtained by sampling. Among the detection signals, the detection signal level at each point p ₁ , p ₂ , p ₃ on the pattern boundary e 1 is expressed for several pixels _in the direction perpendicular to the pattern boundary e ₁ , and figure c is figure a The detection signal level of each pixel on the boundary _e1 of the pattern to be inspected 4 shown in
Figure d shows the relationship between the detection signal level of each pixel on the boundary _e2 of the pattern to be inspected 4 shown in Figure A and the binarization threshold. As shown in the figure, among the detection signals obtained by imaging and sampling the pattern to be inspected 4 surrounded by the straight line shown in figure a, each point p ₁ , p ₂ , p ₃ on the pattern boundary e ₁ When the detection signal level at ₁ is expressed for several pixels in the direction perpendicular to the pattern boundary portion e1, it is as shown in Figure b. Note that in FIG. b, the detection signal level inside the pattern is low, and the detection signal level outside the pattern is high. That is, as shown in figure b, the detection signal level of each pixel on the pattern boundary e ₁ differs slightly at each point p ₁ , p ₂ , and p ₃ . In this case, for convenience of explanation, the pattern boundary
It is assumed that the detected signal level at all points on _e1 becomes one of the values in the hatched areas A, B, and C shown in figure c. When this pattern detection signal is binarized using, for example, a threshold Th1, among the pixels having the detection signal level in the hatched part shown in Figure c, the pixels with a value higher than the threshold Th1 are set to "1",
Since the pixel having a lower value becomes "0", the pattern boundary part _e1 after binarization will not be a straight line, but will have one pixel unevenness. For this, the threshold
When binarization is performed using Th2, all pixels with the detection signal level of the hatched part shown by A become "1", and all pixels with the detection signal level of the hatched part shown by B and C become "0". The pattern boundary portion _e1 after binarization becomes a straight line. On the other hand, when binarization is performed using the threshold value Th2, not all boundaries of the pattern to be inspected become straight lines without producing unevenness of one pixel. For example, assume that another pattern boundary _e2 in figure a has the detection signal level shown in figure d. In this case, contrary to the pattern boundary portion _e1 , the boundary after binarization becomes a straight line with the threshold value Th1, whereas an unevenness of one pixel occurs with the threshold value Th2. From this, it is clear that when the threshold value is changed, the location where the unevenness of one pixel at the pattern boundary, which causes pseudo defects, occurs also changes. Therefore, the inspected pattern is binarized using two or more different threshold values, and in the binarized pattern for any threshold value, the uneven part is a true defect and the threshold value is changed. A portion where no unevenness occurs can be determined to be a pseudo defect.

Next, FIGS. 2 and 3 are a block diagram and an operational diagram showing a pattern defect inspection apparatus according to the present invention. In FIG. 2, 7a and 7b are two binarization circuits that sample the pattern to be inspected 4 and then binarize it using two different thresholds Th1 and Th2. 8a and 8b are two defect candidate detectors, and as shown in FIG.
Detect differences between the two. Reference numeral 9 denotes a defect determination device, and the two defect candidate detectors 8a,
The difference between the binarized inspection pattern from 8b and the model pattern 5 is compared, and only common defect candidates are output as true defects. Next, in FIG. 3, FIG.
The pattern to be inspected 4', which was sampled and then binarized with a certain threshold Th1, Figure d is the pattern to be inspected 4'', which was binarized with a threshold Th2 after sampling the above pattern to be inspected, Figures e and d. Figure f shows the binarized inspected pattern 4' shown in Figures c and d above.
4'' and the above-mentioned model pattern 5, hatching shows the parts 6a, 6b, and 6c that are different, and Fig. g shows the common part 6 in Fig. 4'' and Fig.
It is a diagram in which a' is hatched. As shown in the figure, the inspected patterns 4' and 4'', which were sampled from the inspected pattern 4 having a minute defect 6a and then binarized with certain threshold values Th1 and Th2, and the sample pattern 5 shown in the above figure b are Compare these difference parts 6a′,
Among 6b' and 6c', the common portion 6a' becomes the defect 6a shown in Figure A. In this way, even if the defect is as small as one or two pixels, only the true defect 6a can be detected without generating pseudo defects.

In principle, the defect candidate detectors 8a and 8b described above overlap the binarized inspection pattern 4' or 4'' with the model pattern 5, and detect mismatched portions for each pixel. However, in reality, there is a difference between true defects and pseudo defects that occur due to other causes than those that can be removed by the above method (sampling, unevenness of one pixel due to quantum error). may also be detected.

Possible reasons for this are as follows.

(1) When the photoelectric conversion element images the pattern 4 to be inspected, graphic distortion occurs in the optical system.

(2) Due to sampling and quantization errors, the pattern to be inspected 4 is detected to be slightly larger or smaller than it actually is.

(3) When printing a reticle (mask) from design data, the pattern may be intentionally made thicker or thinner.

For these reasons, the above model pattern 5 and
The pattern to be inspected 4 does not necessarily match perfectly even if the two are perfectly aligned. Therefore, the defect candidate detectors 8a and 8b
It is necessary to compare the two patterns 4 and 5, which are slightly different in size, and detect only the true defects and the above-mentioned removable pseudo defects.

Hereinafter, a defect candidate detector according to the present invention will be explained.

FIG. 4 is an explanatory diagram showing the operation of one embodiment of the defect candidate detector according to the present invention, in which the pattern to be inspected is divided into several regions, and the above-mentioned This is a method of aligning the pattern to be inspected and the model pattern and detecting mismatched pixels at the same time.

In the same figure, figure a is the pattern 4 to be inspected which has a defect 6 at position B, and as shown in figure b, the pattern 4' which is the binarized pattern 4 to be inspected is slightly smaller than the model pattern 5 shown by the dotted line. This shows the case where it is formed. When a mismatching portion between this binarized test pattern 4' and the model pattern 5 is detected, c
Output 6' as shown by hatching in the figure is obtained, but
This also applies to binarization patterns with different thresholds.
Since similar outputs are obtained, it is impossible to separate only the true defect 6 from the defect candidate 6' shown in Figure c.

Therefore, as shown in Figure d, the binarized inspected pattern 4' is divided into small regions 14a to 14d,
For each region, alignment is performed with the above-mentioned model pattern 5 as shown in FIGS. e to h, and at the same time, mismatched pixels 6a to 6c shown by hatching are detected for each region. As a result, the detection result includes only the true defect 6a and the removable pseudo defects 6b and 6c, as shown in Figure i.

FIG. 5 shows the configuration of an embodiment of the defect candidate detector whose operation is explained using FIG. 4. The pattern to be inspected 4' binarized by the binarization circuit is transferred to a delay line 10 of 1H for one scanning line and a shift register 1.
A two-dimensional image 14 of 5×5 pixels is created using multiple sets of 1 and 1.
shall be. This corresponds to the size of the divided small area for alignment described above. Similarly, the model pattern 5 is also a two-dimensional image, but the image 14' is larger by the extent of the alignment correction range with the pattern to be inspected. In the figure, the model pattern 5 is developed into an image 14' of 9×9 pixels in order to have an alignment correction range of ±2 pixels in both the X and Y directions. Next, the two two-dimensional images 14, 14' are input to the matching circuit 12, and the two images 14, 14' are aligned. This alignment by the matching circuit 12 is performed using a model pattern 5 developed into 9×9 pixels.
Further, 25 5 x 5 pixel images centered around the pixels indicated by hatching in the figure are cut out, and these 25 5 x 5 pixel model patterns 5 are created.
Comparing with the inspected pattern 4′ of 5×5 pixels,
The number of mismatched pixels is counted, and the model pattern of 5×5 pixels with the least number of mismatched pixels is outputted from the matching circuit 12 as an image aligned with the pattern to be inspected 4'. The exclusive logic circuit 13 calculates a mismatched portion from the 5×5 pixel model pattern output from the matching circuit 12 and the 5×5 pixel pattern to be inspected, and the result is output as a defect candidate image.

Another example of a defect candidate detector that compares two patterns of different sizes is a method based on feature comparison. This feature comparison involves extracting pixels with certain characteristics from both the inspected pattern and the model pattern, such as horizontal boundaries, vertical boundaries, or small horizontal areas. If a pixel with a characteristic exists near corresponding pixels in the model pattern and the pattern to be inspected, for example within ±2 pixels in each of the X and Y directions, it is determined to be normal with no defects, and only one of the patterns is , is a method of determining that there is a defect candidate when no pixel having that characteristic exists.

In this method, as shown in FIG. 6, several types of feature extractors 15, 15' are used, and the feature extractor 15 or 15' which compares the outputs of the feature extractors for each feature to detect defect candidates. It is composed of the same number of defect candidate determiners 16 and a logical sum 17 that combines the outputs from each defect candidate determiner 16 and outputs a detected defect candidate signal.

Note that 4' in the figure represents a binarized pattern to be inspected, and 5 represents a model pattern. In this method, several types of feature extractors 15 extract pixels having features such as horizontal boundaries, vertical boundaries, or small horizontal areas from the binarized inspection pattern 4'. Similarly, the feature extractor 15' extracts pixels having various features from the model pattern 5. and feature extractors 15 and 15'
Defect candidates are determined by a plurality of defect candidate determiners 16 from the outputs of , and the outputs of the respective defect candidate determiners 16 are combined using a logical sum 17 to output a detected defect candidate signal.

The principle of defect candidate detection using the feature comparison method is as shown in FIG. 7, for example. Figures a and b shown in the same figure are similar to figures a and b in FIG.
A case is shown in which the valued inspected pattern 4' is slightly smaller than the model pattern 5 indicated by the dotted line. Figure c shows feature extractors 15a and 15b, which extract horizontal pattern boundaries and vertical pattern boundaries, respectively. For example, in the feature extractor 15a, the pixel of interest _a1 has the value "0", and its adjacent pixel _a2 has the value "1".
In this case, and when the pixel of interest a ₁ has a value of "1" and its adjacent pixel a ₂ has a value of "0", it is determined that the pixel of interest a ₁ is a pattern boundary in the horizontal direction. d
The figure shows the features extracted from the model pattern 5 by the feature extractor 15a, the figure e shows the features extracted by the feature extractor 15a from the binarized test pattern 4', and the figures f and g show the features extracted from the model pattern 5. 5 and the binary inspected pattern 4' by the feature extractor 15b. Diagram h is a composite of the features that remain after removing features in the vicinity of the corresponding pixels from diagrams d and e, and the features that remain after the same operation from diagrams f and g. Defect candidates including pseudo defects 6b and 6c are shown.

FIG. 8 shows the feature extractor 15a shown in FIG. 7 above.
FIG. A signal obtained by delaying the image signal of the model pattern 5 or the binarized pattern to be inspected 4' by one horizontal line (1H) by the delay line 10, and the model pattern 5 or the binarized pattern to be inspected This can be realized by calculating exclusive OR 13 between 4' and a signal that is not directly delayed. Similarly, the feature extractor 15b shown in FIG. 7 performs an exclusive OR operation between a signal obtained by delaying the image signal of the model pattern 5 or the binarized test pattern 4' by one pixel and a signal not delayed. This can be achieved by calculating. Further, FIG. 9 is a circuit diagram showing the configuration of the defect candidate determiner 16 shown in FIG. 6 above. As shown in the figure, a delay line 1 outputs a signal obtained by delaying the feature signal 24' of the binarized inspected pattern 4' by two scanning lines (2H) in the horizontal direction.
0, a shift register 11 that further delays the output from this delay line 10 by two pixels, and a delay that outputs a signal obtained by delaying the characteristic signal 25 of the model pattern 5 by one scanning line (1H) in the horizontal direction. line 10'
, a so-called non-delayed feature signal directly input from the feature signal 25 of the model pattern, and a feature signal sequentially delayed by one scanning line (1H) by the delay line 10' are transferred to a plurality of shift registers 1.
A NOR 18 inputs and calculates the feature signal inputted through 1', and a NOR 18 inputs and calculates the output from this NOR 18 and the shift register 11,
A logical product 19 that outputs a defect candidate signal is provided. With the above configuration, when the binarized inspected pattern 4' has a certain feature, the vicinity (±2 pixels) of the corresponding pixel on the model pattern 5 is inspected, so that the feature of the model pattern 5 is inspected. Signal 25 is
A two-dimensional image is created by using a 1H delay line 10' and several shift registers 11'. Note that the binarized test pattern 4' is delayed by two pixels in the horizontal and vertical directions by the delay line 10 and the shift register 11, and the sample pattern characteristic signal 25 is delayed by two pixels in the horizontal and vertical directions.
is associated with the center pixel of the two-dimensional image.

Next, a defect determination device that distinguishes between true defects and pseudo defects using defect candidates detected by the above-described method from binary inspected patterns using two different threshold values will be described.

The simplest configuration of a defect determiner is to calculate a logical product for each defect candidate (hereinafter, defect candidates have a logical value of "1"), and only common defect candidates are considered to be true. One possible method is to mark it as a defect. However, the defect candidate points for the true defect are 2
Due to quantization errors caused by value conversion, if a defect does not exist in a corresponding pixel on different candidate images, but exists in a slightly distant pixel, in the above method,
You will miss the real flaws. Therefore, in order to prevent true defects from being overlooked, instead of treating only common defect candidates as true defects, when a defect candidate point exists in one defect candidate image, it is necessary to It is necessary to inspect not only the image but also its vicinity, and if a defect candidate exists in the vicinity, determine that candidate point as a true defect.

FIG. 10 shows an embodiment of the defect determination device. In this embodiment, a 3×3 window is used in which ±1 pixel is considered in each of the X and Y directions as the vicinity of the corresponding pixel. In FIG. 10, for a certain pixel 21a of one defect candidate image 20a, a 3×3 region of surrounding pixels including the corresponding pixel 21b is cut out from the other defect candidate image 20b, and the logical sum 17 of the nine pixels is calculated. calculate. If a defect candidate exists within this neighborhood area, the value of the logical sum 17 will be "1". Then, by calculating the logical sum 17 and the logical product 19 of the pixel 21a, it is determined that the pixel 21a of the defect candidate image 20a is a defect candidate point, and the defect candidate image 2
In 0b, pixel 21b corresponding to pixel 21a
Output 19 only when there is a defect candidate near
becomes "1", making it possible to separate and detect only true defects.

In the embodiment described above, two defect candidate images are created using two threshold values for the pattern to be inspected, and only true defects are detected from the two defect candidate images. N binarization thresholds (N=
2, 3, ...), detect each defect candidate from the resulting N binarized images, and detect the detected N
A true defect may be extracted from two defect candidate images. In this way, even if a pseudo defect that occurs due to quantization error due to sampling and binarization occurs at the same position on two defect candidate images, it will be able to appear at the same position on another defect candidate image. If no pseudo defects have occurred, the pseudo defects can be removed and the reliability of inspection can be improved.

In addition, in this implementation, the case where a design pattern etc. at the time of reticle manufacturing is used as a model pattern for comparative inspection is taken as an example, but a pattern having the same shape as the pattern to be inspected is imaged, this is sampled, A similar effect can be obtained by using a pattern that has been binarized using a certain threshold value as a model pattern.

As described above, according to this embodiment, even if the size of the pattern to be inspected is slightly different from the model pattern, small defects can be detected with high reliability without generating false defects. becomes possible. In addition, according to this embodiment, it is possible to detect minute defects with the same size as the pixel size for sampling, so it is possible to image the pattern to be inspected at high speed, which significantly reduces inspection time. It is effective in shortening the length.

〔Effect of the invention〕

As described above in detail, according to the present invention, it is possible to realize a high-speed and highly reliable pattern defect inspection device, which improves the efficiency of the pattern inspection process for, for example, masks for manufacturing integrated circuits, and Significant effects can be obtained in improving the reliability of products such as ICs and reducing costs.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the principle of pattern defect inspection according to the present invention, FIG. 2 is a block diagram showing a pattern defect inspection apparatus based on the principle of FIG. 1, FIG. 3 is an explanatory diagram showing its operation, and FIG. The figure is a block diagram showing one example of the configuration of the defect candidate detector, FIG. 5 is an explanatory diagram showing its operation, and FIG. 6 is another example of the configuration of the defect candidate detector in the pattern defect inspection apparatus. A block diagram, FIG. 7 is an explanatory diagram showing its operation,
FIG. 8 is a horizontal boundary extraction circuit diagram shown in FIG. 7,
FIG. 9 is a circuit diagram showing the defect candidate detector shown in FIG. 6, FIG. 10 is an explanatory diagram showing an example of a defect determiner,
FIG. 11 is a diagram showing an enlarged image of a conventional defective pattern, FIG. 12 is an explanatory diagram showing the concept of defect inspection by pattern comparison, and FIG. 13 is an explanatory diagram showing the inspection method. 1... Mask for IC manufacturing, 2, 4... Pattern to be inspected, 3, 5... Model pattern, 7a, 7b...
...binarization circuit, 8a, 8b...defect candidate detector,
10...Delay line, 11...Shift register, 12
...Matching circuit, 4'... Binarized pattern to be inspected, 15, 15', 15a, 15b... Feature extractor, 17... Logical OR.

Claims (1)

[Scope of Claims] 1. A pattern obtained by imaging a pattern to be inspected using a photoelectric conversion element, etc.;
In a pattern defect inspection method for detecting defects in the pattern to be inspected by comparing the pattern with a model pattern corresponding to the pattern, the pattern to be inspected is obtained by imaging the pattern to be inspected using a photoelectric conversion element or the like. 2 or more 2 with different patterns
Binarize using a valorization threshold, compare the resulting plurality of binarized patterns with the model pattern, and consider the mismatched portions as defect candidate patterns corresponding to the plurality of binarized patterns. Seize it,
A pattern defect inspection method characterized in that when the mismatched portion exists in each of the plurality of defect candidate patterns in the vicinity of corresponding positions, it is determined that a defect exists on the pattern to be inspected. 2. A pattern obtained by imaging the pattern to be inspected with a photoelectric conversion element, etc. and a model pattern corresponding to the pattern are compared to detect defects in the pattern to be inspected. In the pattern defect inspection apparatus, two different patterns are obtained by imaging the pattern to be inspected using a photoelectric conversion element or the like.
A binarization circuit having at least two binarization circuits that perform binarization using a digitization threshold value, and an output from the binarization circuit and the model pattern are each compared, and when there is a mismatch between the two, A defect candidate detector having the same quantity as the binarization circuit that detects this as a defect candidate and outputs from each defect candidate detector are input, and the defect candidate is detected near the corresponding position in these outputs. A pattern defect inspection apparatus comprising: a defect determiner that outputs a defect signal indicating that a defect exists on the pattern to be inspected when the defect exists.