JPH045350B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention provides a synchronization detection circuit for determining the synchronization state between two alternating current voltages, for example, the voltages of an uninterruptible power supply (hereinafter referred to as CVCF) and a commercial power source. It is related to.

[Conventional technology]

Conventionally, there is a synchronization detection circuit of this type as shown in Fig. 3, in which 1 is an inverter used as a CVCV, 2 is a commercial power supply, and 3 is a circuit that amplifies the voltage difference between the inverter 1 and the commercial power supply 2. A differential amplifier consisting of resistors 4a, 4b, 4c and an operational amplifier 5. Further, 6a and 6b are comparators for comparing the reference signal Vf that determines the detection level and the output signal of the differential amplifier 5, and 7 is an AND circuit for taking an AND condition between the output signals of the comparators 6a and 6b. .

Next, the operation will be explained. The voltages of the inverter 1 and the commercial power supply 2 have sinusoidal waveforms, and are input to the differential amplifier 3 to detect the voltage difference between them. When the inverter 1 and the commercial power supply 2 are synchronized, the amplitude and phase of each voltage are equal, so the level of the output signal of the differential amplifier 3 is approximately 0V.
becomes. On the other hand, when the inverter 1 and the commercial power supply 2 are not synchronized with each other, the output signal of the differential amplifier 3 will not be 0V, but will be ± several volts. The output signal of the differential amplifier 3 and the reference signal Vf for providing a detection margin are connected to the comparator 6a,
6b, and when the former becomes greater than or equal to Vf or less than Vf, the outputs of the comparators 6a and 6b no longer become low, and the output of the AND circuit 7 becomes low. The fact that the output of the AND circuit 7 is low indicates that the inverter 1 and the commercial power supply 2 are asynchronous.

[Problems that the invention attempts to solve]

Conventional synchronization detection circuits are configured as described above, so when switching from commercial power to CVCF, it is usually necessary to advance the voltage phase on the CVCF side by several degrees because the power supply impedance on the CVCF side is larger than that of commercial power. Even if it is necessary to assume that such a state is a synchronized state, there is a problem in that it is not possible to independently set different synchronization detection margins for each state.

This invention was made in order to solve the problems of the conventional ones as described above.
The purpose of this invention is to obtain a synchronization detection circuit that can independently and arbitrarily set a synchronization detection margin for CVCF.

[Means for solving problems]

The synchronization detection circuit according to the present invention converts two alternating current voltages for examining the synchronization relationship into rectangular wave pulses, triggers each pair of one-shot multivibrators with these pulses, and
The outputs of these one-shot multivibrators are logically ANDed, and the establishment of this logical product indicates synchronization of the AC power source.

[Effect]

In this invention, each one-shot multivibrator, which is triggered by a pulse obtained by converting the voltage of an AC power source, can be arbitrarily set to a pulse width corresponding to the synchronization detection margin width. Even if the phase of each AC voltage changes within the range, a synchronization signal is output indicating that the synchronization state is maintained.

〔Example〕

FIG. 1 is a block diagram showing an embodiment of the present invention, in which 8a and 8b detect the zero-crossing points of two alternating current voltages (sine waves), that is, the inverter 1 and the commercial power supply 2, to examine the synchronization relationship, respectively. A pair of comparators that output signals (rectangular waves) of different logic levels (high or low) at the time when the zero crossing point is detected, and 9a and 9b indicate changes in the logic level of the signals output from each comparator 8a and 8b. (in this example, it is triggered when the logic level changes from high to low), outputs pulses with pulse widths T _fa and T _fb set in consideration of the phase margin of synchronization detection, respectively. a pair of one-shot multivibrators (first one-shot multivibrator), 10
are each one-shot multivibrator 9a, 9b
11 is a one-shot multiplier that continuously outputs a synchronization signal to indicate that the inverter 1 and the commercial power supply 2 are synchronized when triggered by the output of the AND circuit 10. Vibrator (second multivibrator)
It is.

Next, the operation of the above embodiment will be explained with reference to FIG. The voltage of the inverter 1 and the commercial power supply 2 (Fig. 2 a, b) is determined by the comparators 8a, 8
These voltages result in the output of square wave pulses that change logic levels to high or low at the zero crossing point (Fig. 2c, d). The one-shot multivibrators 9a, 9b are triggered only when the outputs of the comparators 8a, 8b change from high to low, and generate pulses with pulse widths T _fa and T _fb . Therefore, if the phase of the voltage on the inverter 1 side is taken as a reference, even if the phase on the commercial power supply 2 side is delayed within the range of the pulse width T _fa , the output of the AND circuit 10 remains high and performs one-shot multi. The vibrator 11 is triggered and its output is set high to indicate that the inverter 1 and the commercial power source 2 are synchronized. Conversely, if the phase of the voltage of the commercial power supply 2 is taken as a reference, the phase of the voltage of the inverter 1 is equal to the pulse width T _fb
Even if there is a delay within this time, the one-shot multivibrator 11 is triggered in the same way, indicating that synchronization is achieved. In addition, in order to detect synchronization within the range where the inverter 1 side leads the pulse width T _fa or lags the pulse width T _fb with respect to the commercial power supply 2, the synchronization detection margin is changed by changing the pulse width on the leading side and the lagging side respectively. Width can be changed.

In addition, in the above embodiment, the synchronization detection between the CVCF and the commercial power source is different depending on whether it is advanced or delayed, but the one-shot multivibrators 6a and 6b
By making the pulse widths the same, it can also be applied to synchronized detection of the common bus voltage and the output voltage of each CVCF in parallel operation of multiple CVCFs, where the synchronization detection margin is the same for lag and lead.

〔Effect of the invention〕

As described above, according to the present invention, when triggered by a change in the logic level of the signal output from each comparator, a pair of Since the first one-shot multivibrator is installed, it is possible to take into account the phase margin for synchronization detection, that is, the phase shift, for the two AC voltages whose synchronization relationship is being investigated, even when the phases of the two AC voltages differ by several degrees. This makes it possible to detect synchronization and provides effects such as highly accurate synchronization detection.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of a synchronization detection circuit according to an embodiment of the present invention, FIG. 2 is a waveform diagram of the operation of the synchronization detection circuit shown in FIG. 1, and FIG. 3 is a circuit diagram of a conventional synchronization detection circuit. . 8a, 8b are comparators, 9a, 9b, 11
is a one-shot multivibrator, and 10 is an AND circuit. Note that the same reference numerals in the figures indicate the same parts.

Claims (1)

[Claims] 1 A pair of comparators that detect the zero-crossing points of two alternating current voltages to examine the synchronization relationship, and output signals with different logic levels based on the time when the zero-crossing points are detected, and the logic of the signals output from each of the above comparators. A pair of first one-shot multivibrators each outputting a pulse with a pulse width set in consideration of the phase margin of synchronization detection when triggered by a change in level, and each of the above-mentioned first one-shot multivibrators. and an AND circuit that ANDs the outputs of , and when triggered by the output of the AND circuit,
A synchronization detection circuit comprising a second one-shot multivibrator that outputs an output indicating synchronization to indicate that two alternating current voltages are synchronized.