JPH0454211B2 - - Google Patents

Description

[Detailed description of the invention]

INDUSTRIAL APPLICATION FIELD The present invention relates to a camera to which a camera accessory (for example, an interchangeable lens, an electronic flash device, etc.) having a function of serially outputting multiple types of data is detachably attached. Conventional technology In the past, when performing a predetermined exposure calculation, the data required was input in parallel each time (for example,
6541, Japanese Patent Application Laid-open No. 52-58591), and it is common practice to input all the data of an interchangeable lens in series at a predetermined timing (for example, Japanese Patent Application Laid-open No. 108628-1982). Problems to be Solved by the Invention When communicating data between a camera and a camera accessory, it is preferable to communicate data serially with the latter rather than with the former in order to reduce the number of terminals between the two. is desirable. However, serial communication takes time equal to the number of bits of data, which is disadvantageous when performing a predetermined calculation based on a plurality of data. By the way, if it is necessary to control the camera according to changes in the status of accessories, data indicating the status from the accessory (variable data)
All you have to do is input the data and control the camera operation based on that data. Here, in order to promptly respond to changes in the status of accessories, it is necessary to repeatedly input data. On the other hand, fixed data that is constant regardless of the state of the accessory does not need to be input afterward once it is input and stored. In this way, there are two types of input data: variable data that needs to be input repeatedly and fixed data that only needs to be input once. , and the time required to input fixed data is wasted. SUMMARY OF THE INVENTION It is an object of the present invention to provide a camera that eliminates the above-mentioned disadvantages and allows efficient data communication. Means for Solving the Problems In order to solve the above problems, the present invention provides a function for serially outputting multiple types of data including fixed data unique to the device itself and variable data that changes depending on the state of the device itself. A camera to which an accessory is removably attached has a data communication terminal section that is electrically connected to the accessory and performs data communication in series with the accessory; a data input means for inputting the data in series through the data input means; a storage means for storing the data input by the data input means; The present invention is characterized by comprising: a control means for operating the input means; and an input control means for controlling the data input means so that fixed data once input is not input thereafter. Effects According to the above configuration, data input from the accessory is repeated during a period when a signal for causing the camera to perform a predetermined operation is being output. At this time, the fixed data that has been input once will not be input again. Embodiment FIG. 1 is a block diagram showing an entire photographic system using the present invention. Reference numeral 1 denotes a camera body, and a central control circuit 10 is provided inside the camera body for outputting address data to accessories attached to or connected to the camera body and for inputting data from the accessories. Reference numeral 2 denotes an electrically conductive drive accessory (motor drive), in which a data output device 20 for outputting data specific to the motor drive is provided. Reference numeral 3 denotes an accessory (strobe) for flash photography, and a data output device 30 for outputting data specific to the strobe is provided inside the accessory. Reference numeral 4 indicates lens accessories such as an intermediate ring and bellows, and inside this is a data output device 4 that outputs data specific to lens accessories.
0 is set. Reference numeral 5 denotes an interchangeable lens, and a data output device 50 for outputting data specific to the interchangeable lens is provided inside the interchangeable lens. The camera body 1 and each of the accessories 2, 3, and 4 and the accessories 4 and 5 are electrically connected through terminals a to f, respectively. As will be described later, power, reference clock pulses, address data, and reset signals are supplied from the camera body 1 to the data output devices of each accessory via terminals a, b, c, and d, respectively. Further, data unique to each accessory is supplied to the camera body 1 from the data output device of each accessory via the terminal e. Terminal f is a ground terminal. FIG. 2 is a block diagram of the central control circuit 10 of the camera body 1. Reference numeral 11 denotes a power control circuit, which supplies power from a terminal a to a data output device 50 of an accessory, such as an interchangeable lens 5. SW1 is a switch that is closed when the lens 5 is attached to the camera body 1. SW2 is a release switch for starting exposure control operation, and SW3 is a side light switch for starting side light operation. For example, when the release button is pressed in the first step, side light switch SW3 is activated, and in the second step, the release button is released. -Switch SW2 is closed. The side light switch SW3 may close in response to a change in resistance of the pressure sensitive element caused by the current flowing through the user's finger or the pressure of the finger when the user's finger touches the release button. Reference numeral 12 denotes a timing circuit, which applies timing signals to the address output device 13 and data input device 14 based on the closing signals of the switches SW1, SW2, and SW3, and controls the timing of address data output and data capture, respectively. At the same time, a reference clock pulse is supplied to terminal b, and a reset signal is supplied to terminal d. The address output device 13 includes a timing circuit 1
2 to send address data to terminal c
Each bit is sequentially output in series. The data input device 14 reads data unique to each accessory that is serially input bit by bit from the terminal e, converts it into parallel data, and sends it to the arithmetic circuit 15. The arithmetic circuit 15 calculates data for exposure control and the like based on the above data, and sends the data to the aperture control device 16, shutter control device 17, and display device 18, respectively. Table 1 is a table showing an example of the contents of a ROM that is provided for each data output device of each accessory and stores data specific to each accessory.
Table 2 is a table showing the relationship between the above data output from the ROM and the meaning of the data. Table 1
, the upper two bits of address data a6,
a5 is data indicating which accessory, that is, which ROM to select, and is "10" if the selected accessory is an interchangeable lens, "01" if it is a strobe, and "11" if it is a lens accessory. Although it is not shown in Table 1, it is "00" if it is a motor drive. The lower five bits a4 to a0 of the address data specify the address of the ROM. Next, input data when various accessories are installed will be explained based on Tables 1 and 2. Focal length 50mm, maximum aperture
A case will be explained in which a lens capable of outputting distance information corresponding to the amount of lens extension is attached in addition to F1.4 and a minimum aperture value of F16. First, as mentioned above, data unique to the lens is output from the lens when the upper two bits a6 and a5 of the address data are "10".
It's time. When the lower five bits a4 to a0 become "00000", the interchangeable lens outputs data of a check code "11100" indicating that the lens is attached to the camera body 1. Therefore, the address data “1000000” from the camera body
If the data “11100” is input to the camera body 1 when specifying , it can be confirmed that an interchangeable lens is attached. Similarly, as shown in Table 1, if data of "11100" is input to the camera body when "0100000" is specified, it means that a strobe is attached; If the data “11100” is input into the camera body, it means that the lens accessory is attached. Next, when the address “1000001” is specified,
This means that the address of the ROM where the data for the aperture Avo is stored is specified, and the data for F1.4 "00010" is sent to the camera body. Next, when the address “1000010” is specified, the minimum aperture
Avmax, for example, F16 data “01111” is sent. This data corresponds to F16 as shown in Table 2. When the address "1000011" is specified, a signal indicating whether the attached lens is configured to output distance information is output. For example, in Table 1
In the case of a 50mmF1.4 lens, since it is a lens that outputs distance information, data of “00000” is output, while
In the case of a 28mmF2 lens, no distance information is output, so data of "00001" is output. Next, when the address "1000100" is specified, it means that the address of the ROM where the focal length data is recorded is specified.For a 50mmF1.4 lens, the focal length is 50mm, so the range is 40 to 60mm. Data “00110” indicating that the focal length is within
is output. Further, data on the amount of lens protrusion, which will be described later, is used as address data in the ROM of the lens, and the distance information is output based on this address data. If the extension amount data is "10000", the address "1010000" is specified and the data "11111" corresponding to the distance ∞ is output, and if the extension amount data is "11111", the address "1011111" is specified. Then, data “00111” corresponding to a distance of 1.4m is output. Next, if a strobe is attached, as with the lens, when the address "0100000" is specified, a check code "11100" is entered into the camera body, confirming that the strobe is attached. Ru. Next, the address “0100001” is specified. This address stores the minimum guide number data, for example guide number 1.4.
Data “00010” is output. next,
When the address "0100010" is specified, data of the maximum guide number is stored in this address, and for example, data "10010" for guide number 28 is output. Next, when the address “0100011” is specified, the light distribution characteristic data is stored at this address, and in this example, it is “00001”.
data is output. This data is 45° vertically,
It shows that the horizontal direction is 60°. If lens accessories are attached,
“11100” when the address “1100000” is specified
When the check code is entered into the camera body, it is confirmed that the lens accessory is attached, and the address "1100001" is specified,
If the data “00011” is input, it is confirmed that the teleconverter is installed. Furthermore, Table 2
As shown in the figure, if the data is "00001", it is confirmed that the bellows is installed, if the data is "00010", it is confirmed that the reverse adapter is installed, and if the data is "00100", it is confirmed that the intermediate ring is installed. Although not illustrated in Table 1, when a winder (motor drive) is installed, if the upper two bits a6 and a5 of the winder are "00", data fixed to the winder is input to the camera body. and,
As with other accessories, if the address "0000000" is specified, the check code "11100" will be input into the camera body, and if the address "0000001" is specified, the number of pictures that can be taken per second (frame speed) will be input.
data is input. As shown in Table 2, if the data is "00000", it is 1 frame/second, and if the data is "01100", it is 7 frames/second. FIG. 3 is a circuit diagram showing specific examples of a partial circuit of the address output device 13 on the camera body 1 side, a partial circuit of the data input device 14, and a data output device on each accessory side. Note that an interchangeable lens is shown as an example of an accessory. Moreover, FIG. 4 is a time chart of FIG. 3. In Figure 3
OSC is a reference clock pulse output circuit. The clock pulse CP in FIG. 4 from this circuit OSC is also sent to the lens 5 via terminal b. CNT1
is a counter that counts clock pulses CP, and DEC1 is the output CB0 of counter CNT1,
This is a decoder that decodes the data of CB1 and CB2, and the output of this decoder is TB0~TB0 in Figure 4.
This is the timing signal shown in TB7. In addition, the counter CNT2 and decoder DEC2 provided on the lens 5 side are the counters on the camera body 1 side.
CNT1 and decoder DEC1 have the same configuration, and the outputs of decoder DEC2 are timing signals shown at TL0 to TL7 in FIG. 4. The outputs of the two decoders DEC1 and DEC2 are the same clock pulse
Since the outputs of the counters CNT1 and CNT2 that count CP are decoded, the same timing signal is output, and the circuits on the camera body 1 side and the lens 5 side are synchronized. Table 3 shows counter CNT
1. The relationship between CNT2 and the outputs of decoders DEC1 and DEC2 is shown below. When a reading start signal is output from the camera body, flip-flop F1 is set (see Fig. 4).
Q) The reset state of counter CNT1 is released. As a result, the counter CNT1 starts counting clock pulses, and the decoder DEC1 starts outputting timing signals TB0 to TB7.
Note that the output of counters CNT1 and CNT2 is “000”
AND circuit of decoders DEC1 and DEC2 when
Since the outputs to AN2 and AN6 are “High”, AND circuits AN2 and AN6 operate as counters.
Only after CNT1 and CNT2 start counting, the “High” level timing signals TB0 and TL
It is provided so that 0 is output. First, in step S0 in FIG. 4 (from when the read start signal is output to when the first TB7 timing signal is output), address data “1000000” is stored in register REG1 at the timing when TB1 rises to “High”. ” is latched and further TB7
The timing signal is output and the AND circuit
This data is latched into the shift register SR1 at the timing when the output of AN11 falls to "Low". During the period of step S0, the Q output of flip-flop F2 (F2Q in FIG. 4) is "Low", so other circuits do not operate. From S0
When moving to step S1, that is, when the 9th clock pulse CP is counted, the counter
The output CB3 of CNT1 rises to “High” (the fourth
As a result, the D input of flip-flop F2 is taken in, and its Q output becomes "High" (FIG. 4 F2Q). By this, the AND circuit AN
Gate 1 is opened and a clock pulse is supplied to the shift register, and the reset state of the circuit on the lens 5 side is released via terminal d. The shift register SR1 serially outputs the latched address data "1000000" bit by bit from the terminal C in synchronization with the rising edge of the clock pulse. This output data is sequentially fetched into the shift register SR3 on the interchangeable lens 5 side in synchronization with the falling edge of the clock pulse, and is sent to terminals La0 to SR3.
It is output to La4 (Fig. 4 La0 to La4)).
Then, at the timing when terminal TL5 becomes "High", the outputs of terminals La4 and La3 become "10",
The output of the AND circuit AN5 becomes “High” and the flip-flop F3 receives this output at its D input.
The Q output of becomes “High” (FIG. 4, F3Q). At the timing when the terminal TL7 of the decoder DEC2 on the lens 5 side rises, the data at the output terminals La4 to La0 of the shift register SR3 is the lower 5 bits of the address data (in the case of step S1, it is "00000", and the ROM51 The address “00000” is specified.This address specification
The data of the aforementioned check code "11100" is output from the ROM 51. The above data from this ROM51 is at terminal TL7.
At the rising edge of , it is latched into shift register SR4. Since the Q output of flip-flop F3 is "High" at the time of timing pulse TL5, flip-flop F4 picks up the Q output of flip-flop F3 when the next timing pulse TL0 rises to "High". and sets the Q output to "High" (F4Q in Fig. 4). This results in
The switch circuit GS is conductive and the above data is “11100”
can be output to terminal e. The data taken into the shift register SR4 is output in the order of "11100" to the terminal e via the switch circuit GS in synchronization with the clock pulse, and on the camera body 1 side, this data is transferred to the shift register SR2 in synchronization with the falling edge of the clock pulse. is taken in (Bb0 to Bb4 in FIG. 4). At this time, the flip
Since the Q output of flip-flop F2 is "High", when the next timing pulse TB0 rises to "High" (S2
TB0 rises at step) Its Q output is “High”. Therefore, the AND circuit AN
3. The gate of AN4 is open after the S2 step. Then, at the rising edge of timing pulse TB5, the output of shift register SR2 changes to register REG.
It is latched at 2. In the S2 step, the above-mentioned data "11100" is taken in, and the next address data "1000001" is transferred to the lens 5, and in the S3 step, the lens data "00010" specified by this address is transferred to the camera body. At the same time, the lens 5 with the next address data “1000010”
Addresses and data are transferred in the same manner. As shown in Table 1, the upper address of the lens is "10", so this is determined by the data output device 50 of the lens 5 and the switch circuit GS is made conductive. For other accessories such as
As shown in FIG. 5, the input voltage level of the input terminal of the AND circuit AN5 is changed corresponding to each accessory. That is, in the case of a strobe, the upper address data is "01", so when this signal is input, the output of the AND circuit AN5-1 becomes "High",
In the case of a lens accessory, the output is "11", so the AND circuit AN5-2 is "High", and in the case of a motor drive, it is "00", so the circuit is configured so that the output of the AND circuit AN5-3 is "High". The other circuit configurations in these accessories are similar to the circuit configuration inside the lens 5. In the circuit shown in FIG. 3, it is needless to say that the camera body 1 needs to be reset by a power-on reset signal when the power is turned on.
Furthermore, a power-on reset signal generation circuit is provided in each accessory so that a power-on reset signal is generated when the accessory is connected to the camera body 1 and power supply starts to the data output device of the accessory. It is also necessary to reset the internal circuitry. In addition, in the case of accessories such as lens accessories, which have only a small number of types of data to be fixedly stored and which are produced in small numbers, the internal ROM should be a programmable ROM, fuse ROM, etc., which are suitable for small-volume production. It's okay.
Alternatively, the wiring may be performed using a wiring pattern on a printed circuit board, wiring by soldering, or the like. FIG. 6 is a circuit diagram of a portion of the address output device 13 that sends address data to the register REG1 of FIG. 3, and a portion of the data input device 14 that reads data from the register REG2. When the photometric switch SW3 is closed, the power supply transistor BT1 becomes conductive, and the capacitor C1
A reset signal (power-on reset signal POR) is output from the power-on reset circuit consisting of
41, F42, F43 and counter CNT5 are reset. Also, when the side light switch SW3 is closed, the output of the inverter IN1 becomes “High”.
, the gate of the AND circuit AN40 is opened, and the clock pulse CP is input to the frequency divider DI.
The frequency divider DI outputs a constant period pulse obtained by dividing the above clock pulse, and the one shot circuit
A read start signal is output from the OS 1 at regular intervals. Therefore, in this embodiment, while the side light switch is closed, data from the accessory is automatically read periodically.
There is no need for a switch such as switch S1 in FIG. 2 to detect that an accessory is attached. First, the operation of sending address data to register REG1 in response to a read start signal will be described.
When the read start signal is output, flip-flops F40 and F41 are set and the AND circuit AN
41 and AN42 are opened, and counters CNT6, CNT7, and CNT8 are reset. Then, in the S0 step, the output of counter CNT5 becomes “01” with the timing pulse of TB0.
The flip-flop F40 is reset at the falling edge of the timing pulse TB0, and the timing pulse TB0 is no longer input to the counter CNT5. Then, as mentioned above, at the rising edge of timing pulse TB1, register REG1
latches the outputs of counter CNT5 and multiplexer MP2 as address data, but at this time, the output of counter CNT5 is "01" and the output of multiplexer MP2 is "00000", so the address data latched in register REG1 is " 1000000”, which is the first address of the lens. Note that the output of the counter CNT5 is input to the register REG1 with the output bits reversed. Here, multiplexer MP2
is configured to output input data a to the multiplexer MP2 when the counter CNT5 is "01", β when it is "10", and r when it is "11". At the rising edge of TB2, the counter CNT6 counts up by one via the AND circuit AN42 and becomes "001". Then, in the next step S1, address data "1000001" is latched in register REG1 at the rising edge of TB1, and TB1 is
At the rising edge of 2, the output of the counter CNT6 becomes "010". Below, repeat the same operation and register
Lens address data is sequentially incorporated into REG1. Then, in step S4, TB1
Address data “1000100” (final address of lens) is registered at the rising edge of
It is latched to REG1, and the counter starts at the rising edge of TB2.
When the output of CNT6 becomes “101”, the AND circuit
The output of AN56 rises to "High" and a pulse is output from the one shot circuit OS2. This pulse resets the flip-flop F41 via the OR circuit OR6, and the OR circuit
Flip-flop F40 is set via OR5, and flip-flop F42 is also set directly. At the S5 step, the counter starts at the rising edge of TB0.
The output of CNT5 becomes “10” and the multiplexer
β data is output from MP2. Therefore,
At the next rising edge of TB1, the address data latched into register REG1 becomes "0100000", which becomes the strobe's start address. Then, the timing pulse of TB2 is sent to the counter CNT7 via the AND circuit AN43, and its output becomes "001". Thereafter, the same operation is repeated, and at step S8, the address data "0100011" (the final address of the strobe) is latched in the register REG1 at the rising edge of TB1, and the most significant output bit of the counter CNT7 is latched at the next rising edge of TB2. When becomes "High" (output is "100"), a "High" pulse is output from the one shot circuit OS3. This pulse resets flip-flop F42 via OR circuit OR7, sets flip-flop F40 via OR circuit OR5, and directly sets flip-flop F43. By this, the AND circuit
The gate of AN43 is closed and the AND circuit AN41,
The gate of AN44 is opened. At step S9, the output of counter CNT5 becomes "11" at the rising edge of TB0, γ data is output from multiplexer MP2, and the address data "1100000" (the first address of the lens accessory) is output at the rising edge of TB1. ) is latched into register REG1. Then, at the rising edge of TB2, the output of counter CNT8 becomes “01”,
At step S10, address data of “1100001” is transferred to register REG1 at the rising edge of TB1.
is latched to. Then, when the upper bit of the counter CNT8 becomes "High" at the rising edge of TB2 (output is "10"), a "High" pulse is output from the one-shot circuit OS3. This pulse resets the flip-flop F43 to close the gate of the AND circuit AN44, and further sets the flip-flop F40 via the OR circuit OR5 to open the gate of the AND circuit AN40. Then, in step S11,
At the timing pulse TB0, the output of the counter CNT5 changes from "11" to "00", and at the falling edge of the timing pulse TB0, the output of the counter CNT5 changes from "11" to "00".
is reset and the gate of AND circuit AN40 is closed. With the above operation, the operation of outputting the address data is completed, and the state waits for the next read start signal to be output from the one-shot circuit OS1. Next, the operation of reading the data read into register REG2 into registers REG3 to REG13 will be explained. The counter CNT9 receives a timing pulse TB2 reset by the read start signal.
count. Then, the output of the counter CNT9 is input to the decoder DEC3, where it is converted into outputs d0 to d10 as shown in Table 4, and the output is sent to the decoder DEC3.
Output from DEC3. As mentioned above, in steps S0 and S1, data from the accessory has not yet been read into the register REG2 (Fig. 4), so all outputs of the decoder DEC3 are "Low". Therefore, the gates of the AND circuits AN45 to AN55 are closed and no data is taken into the registers REG3 to REG13. In step S2, the first data is taken into register REG2 at the rising edge of TB5. Here, terminal d0
is set to “High”, the AND circuit AN
The gate of 45 is opened, and the data latched in register REG2 is latched in register REG3 at the next rising edge of TB6. Similarly, the registers REG are sequentially connected to the register REG at the rising edge of the timing pulse TB6 via the AND circuits AN46 to AN55.
Data from register REG2 is taken into registers 4 to REG13. Then, when the last data is latched in the register REG13 by the timing pulse of TB6 via the AND circuit AN55 in step S12, the read operation is completed.
Timing pulse from this AND circuit AN55
TB6 is simultaneously sent to the circuit of FIG. 3 as a read end signal to complete the read operation. this register
Various data from accessories latched to REG3 to REG13 are used for exposure control operations and the like. FIG. 7 shows a circuit configuration of an address output device and a data input device when only data from an interchangeable lens is read, and is also a circuit diagram of the camera body 1 side in which distance information is also read from the interchangeable lens. . When lens 5 is attached, press the attachment switch.
When SW1 is closed, the output of the delay circuit DL becomes "High" after a certain period of time. This delay time is set to the time required for the signal pin contact portion between the lens and the camera body, which will be described later, to stop chattering and become stable. Then, when the photometry switch SW3 is closed and the output of the AND circuit AN61 becomes "High" via the inverter IN5, a read start signal is output from the one shot circuit OS5 via the OR circuit OR11, and the read operation is started. Ru. Also, when the AND circuit AN61 becomes “High”, the AND circuit
The gate of AN60 is opened and the clock pulse CP is input to the frequency divider DI, and the pulse with a constant period is passed through the frequency divider.
Output from DI. Therefore, similar to Figure 6,
Pulses for starting reading are outputted at a constant cycle based on the pulses from the frequency divider DI via the one-shot circuit OS1 and the OR circuit OR11. Photometering switch SW3 is closed and capacitor C
1. When a power-on reset signal POR is output from a power-on reset circuit composed of a resistor R1, flip-flops F50 and F51 are reset. The multiplexer MP3 is designed to output data from X when the input to the SE terminal is "Low", and output data from Y when the input is "High", so the photometric switch SW3 is closed and the reading operation starts. When started, the Q output of D flip-flop F50 was “Low”,
Data from X is output. At the S0 step, the Q output of the D flip-flop F2 in FIG. 3 remains "Low", so the counter CNT11
remains in reset state and its output is “000”
It's getting old. Therefore, multiplexer MP3 outputs data “1000000” and the register
This data is latched into REG1 as address data at the rising edge of timing pulse TB1.
This data is the leading address of the interchangeable lens 5. At the S1 step, the D flip shown in Figure 3
The Q output of the flop F2 becomes "High", the reset state of the counter CNT11 is released, the count is incremented by one at the timing pulse TB0, and "001" is output, and "1000001" is output from the multiplexer MP3. This data is TB1
It is latched into register REG1 at the rising edge of . S2
When the step is reached, the output of counter CNT11 becomes “010”, and as shown in Table 5, decoder DEC
The output terminal e0 of No. 5 becomes "High". Furthermore, Table 5
shows the input/output relationship of the decoder DEC5 that decodes the count contents of the counter CNT11. Then, at the rising edge of TB1, data "1000010" is latched into register REG as an address. On the other hand, the first data “11100” (check code) is input to register REG2 (Figure 3), and the timing pulse of TB6 is input to the AND circuit.
Output from AN63, this data is registered
Latched to REG15. In the S3 step, TB
At the rising edge of 0, the output of counter CNT11 is ““011”
Therefore, the terminal e1 of the decoder DEC5 becomes “High”
As a result, the gate of AND circuit AN64 is opened. Then, at the rising edge of TB1, "1000011" is latched into the register REG1 as address data, and at the rising edge of TB6, the data of the open aperture value Avo is latched into the register REG16 via the register REG2. At step S4, the counter starts at the rising edge of TB0.
The output of CNT11 becomes “100” and the register
At the rising edge of TB1, data "1000100" is latched into REG1 as address data. and
At the rising edge of TB2, the Q output of the D flip-flop F50 becomes "High", and the multiplexer MP3 starts outputting Y data from then on. This Y data indicates the amount of extension of the interchangeable lens 5, and the amount of extension is detected on the camera body 1 side by a mechanism described later. Here, taking advantage of the fact that the relationship between the amount of extension of each interchangeable lens 5 and the focus adjusted distance is constant for each interchangeable lens,
As shown in Table 1, distance data is fixedly stored in the ROM so as to correspond to the above-mentioned feeding amount data. Therefore, if the data on the amount of extension detected on the camera body 1 side is designated as the address of the ROM 51 in the interchangeable lens 5, the distance data stored at that address will be imported into the camera body 1 side. It is now possible to obtain distance data. Reference numeral 55 denotes a member provided on the side of the interchangeable lens 5, which moves in the left-right direction in the figure in conjunction with a focus adjustment member (not shown, for example, a distance ring) of the interchangeable lens 5. 7
0 is provided on the side of the camera body 1 and is brought into contact with the member 55 by the spring force of the spring 71.
It moves left and right as it moves. This member 70 on the side of the camera body 1 is supported by guide pins 72 and 73, and has a brush 74 and a brush 74 as electrical contacts.
75, 76, 77, and 78 are provided, and all the contacts are electrically connected. Reference numeral 80 denotes a code board, the blacked-out portions serve as electrodes, electrode 81 is connected to ground, and 82, 83, 84, and 85 are each connected to a power source (+E) via a resistor. Contact points 74, 75, 7 provided on member 70
If 6, 77, and 78 are at the position g, for example, the outputs of the terminals f3 to f0 will be "0001" and the output of the multiplexer will be "1010001". Therefore, if the attached interchangeable lens is the 50mmF1.4 lens in Table 1, the data “01101” for 4m is
For a 135mmF3.5 lens, the data “10110” for 19m will be output from the interchangeable lens. Furthermore, when the contacts 74 to 78 come to the position h, "1001" is detected through the terminals f3 to f0, and the address of "1011001" is output from the multiplexer MP3. 00010”
If the data is 135mmF3.5, it is 2.5m “01010”
data will be output. In the S4 step, the terminal e2 of the decoder DEC5 becomes "High" and the timing pulse of TB6 is an AND circuit.
The minimum aperture data Avm output from the AN65 is latched into the register REG17. In the following S5 step, the lens type data is stored in the register REG.
At step S6, focal length data is latched to register REG19.
At step S7, the output of the counter CNT11 becomes "111", the output of the AND circuit AN62 rises to "High", and the flip-flop F5
1 is set, the gate of the AND circuit AN68 is opened, and at the rising edge of TB6, the distance data is latched into the register REG20, and at the same time, the pulse of TB6 from the AND circuit AN68 is sent to the circuit of FIG. 3 as a read end signal. Sent. If the photometric switch SW3 remains closed even after the reading is completed, the next reading start signal is output from the one-shot circuit OS1 after a certain period.
At this time, the Q outputs of flip-flops F50 and F51 remain "High", so only the data according to the payout amount is output from multiplexer MP3 to register REG1 in step S0, and the distance data is latched in register REG20 in step S2. The reading operation ends. That is, the photometric switch
When SW3 continues to be closed, only the distance information is repeatedly read. Therefore, in the case of this embodiment, fixed information such as the minimum aperture of the interchangeable lens is read only once, and variable information such as distance information (in addition, for example, focal length information of a zoom lens, setting aperture information) is read repeatedly. It's starting to become easier. In FIG. 3, the shift register SR1 for outputting address data and the shift register SR4 for outputting accessory data are configured as 7-bit or 8-bit input shift registers. These shift registers are, for example, 8
In the case of bit input, read the data input in parallel at the rising edge of timing TB7 and TL7, and then read the data input in parallel at timings TB0 to TB7 and TL0 to
At the rising edge of TL7, data is output in series to the output terminal (OUT) starting from the most significant bit. A shift register that performs such an operation has the following circuit configuration. First, eight flip-flops are provided for each bit, into which the data of each bit input in parallel is preset. The output terminal of the flip-flop corresponding to the lower bit is connected to the input terminal of the flip-flop corresponding to the bit immediately above the lower bit. By doing this, the data preset in each flip-flop is sequentially transferred from the lower bits to the upper bits in synchronization with the clock pulse.
Furthermore, the output terminal of the flip-flop into which the data of the most significant bit among the eight flip-flops is preset is connected to the input terminal of another ninth flip-flop. The output terminal of this ninth flip-flop is used as the output terminal of the shift register. By doing this, the ninth flip-flop becomes a flip-flop whose most significant bit data is preset in synchronization with the clock pulse.
By taking in the output of the flop, data is output with a delay of exactly the clock pulse. Effects According to the present invention, data input from the accessory is repeated during a period when a signal for causing the camera to perform a predetermined operation is being output. At this time,
Fixed data that has been entered once will not be entered again. Therefore, the data input time is reduced by the time required to input fixed data, compared to the case where all data is always input.

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【table】 [Brief explanation of the drawing]

Figure 1 is a block diagram showing the principle of the present invention, Figure 2 is a block diagram showing the principle of the present invention.
The figure is a block diagram showing the circuit configuration on the camera body side, Figure 3 is a circuit diagram showing a part of the data input/output section on the camera body side and the data output device on the accessory side, and Figure 4 is the operation. 5 is a circuit connection diagram showing an example of connection to other accessories, FIG. 6 is a circuit diagram showing the circuit of the other part of the data input/output section on the camera body side of FIG. 3,
FIG. 7 is a circuit diagram showing another embodiment of FIG. 6. 1... Camera body, 2, 3, 4, 5... Accessories, a to e... Terminal section, SW3... Manual operation member, 14... Data input means, DI, OS1,
OR5...control means, F50, F51...change means.

Claims (1)

[Scope of Claims] 1. A camera to which an accessory is removably attached, which has a function of outputting multiple types of data in series, including fixed data unique to the camera itself and variable data that changes depending on the camera's status. , a data communication terminal section that is electrically connected to the accessory and performs data communication with the accessory in series; a data input means that inputs the plurality of types of data in series via the terminal section; a storage means for storing data input by the data input means; a control means for repeatedly operating the data input means during a period when a signal for causing the camera to perform a predetermined operation is being output; A camera having a data communication function, comprising: input control means for controlling the data input means so as not to input fixed data thereafter. 2. The input control means controls the data input means so that all of the plurality of data types are input during the first input, and only variable data among the plurality of data types are input during the second and subsequent inputs. A camera having a data communication function characterized by: