JPH0454460A - Detection circuit for power failure - Google Patents
Detection circuit for power failureInfo
- Publication number
- JPH0454460A JPH0454460A JP16430090A JP16430090A JPH0454460A JP H0454460 A JPH0454460 A JP H0454460A JP 16430090 A JP16430090 A JP 16430090A JP 16430090 A JP16430090 A JP 16430090A JP H0454460 A JPH0454460 A JP H0454460A
- Authority
- JP
- Japan
- Prior art keywords
- capacitor
- voltage
- circuit
- power failure
- power
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Measurement Of Current Or Voltage (AREA)
- Emergency Protection Circuit Devices (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、交流電源の停電を迅速に検出する停電検出回
路に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a power outage detection circuit that quickly detects a power outage of an AC power supply.
交流電源から各種の負荷へ直接的或いは整流して供給す
るものであり、交流電源の電圧低下や停電を検出し、そ
の検出信号により負荷の異常動作を防止する構成が採用
されている。従って、交流電源の停電を迅速に検出する
ことが要望されている。AC power is supplied directly or after rectification to various loads from an AC power source, and a configuration is adopted in which a voltage drop or power outage of the AC power source is detected and the detection signal is used to prevent abnormal operation of the load. Therefore, it is desired to quickly detect a power outage of an AC power supply.
従来例の停電検出回路は、例えば、第３図に示す構成を
有するものであり、１１は１００Ｖ等の商用交流電源、
１２はコンデンサＣ１ｌ〜Ｃ１３とインダクタンスＬｌ
ｌとからなる入力フィルタ、１３は電子回路等の各種の
負荷、１５はダイオードＤＩｌ〜Ｄ１４からなる全波整
流回路、１６はシャントレギュレータ等の構成の比較回
路、ＰＣｌｌはホトカプラ、Ｃ１４はコンデンサ、Ｒ１
１〜Ｒ１Ｂは抵抗、１９は比較回路である。A conventional power failure detection circuit has, for example, the configuration shown in FIG. 3, where 11 is a commercial AC power source such as 100V;
12 are capacitors C1l to C13 and inductance Ll
13 is various loads such as electronic circuits, 15 is a full-wave rectifier circuit consisting of diodes DIl to D14, 16 is a comparison circuit such as a shunt regulator, PCll is a photocoupler, C14 is a capacitor, R1
1 to R1B are resistors, and 19 is a comparison circuit.
入力フィルタ１２は、負荷１３が例えばスイッチングレ
ギュレータ等の場合に、交流電源１１と負荷１３との間
にスイッチングノイズの伝搬を防止する為に接続される
ものであり、負荷１３側のコンデンサＣ１ｌは例えば１
μＦ程度の静電容量を有するものである。The input filter 12 is connected to prevent the propagation of switching noise between the AC power supply 11 and the load 13 when the load 13 is, for example, a switching regulator. 1
It has a capacitance of about μF.
この入力フィルタ１２を介して交流電源１１から加えら
れた交流電圧は、全波整流回路１５により全波整流され
、その脈流出力電圧は、ホトカプラＰＣＩＩのホトダイ
オードと抵抗Ｒ１４とを介して比較回路１６に加えられ
る。比較回路１６はシャントレギュレータのように、抵
抗Ｒ１２，Ｒ１３による分圧電圧を基準電圧とし、抵抗
Ｒ１４とホトカプラＰＣＩＩのホトダイオードとを介し
て加えられる脈流出力電圧と比較して、ホトダイオード
を駆動するものであり、脈流出力電圧に同期してホトダ
イオードに駆動電流が流れ、ホトトランジスタのオン、
オフが制御される。The AC voltage applied from the AC power supply 11 through the input filter 12 is full-wave rectified by the full-wave rectifier circuit 15, and the pulsating output voltage is passed through the comparison circuit 16 through the photodiode of the photocoupler PCII and the resistor R14. added to. The comparator circuit 16, like a shunt regulator, uses the voltage divided by the resistors R12 and R13 as a reference voltage, and compares it with the pulsating output voltage applied via the resistor R14 and the photodiode of the photocoupler PCII to drive the photodiode. A drive current flows through the photodiode in synchronization with the pulsating output voltage, turning on the phototransistor.
Off is controlled.
このホトカプラＰＣＩＩのホトトランジスタがオフの時
に、コンデンサＣ１４は抵抗Ｒ１６を介して電圧■。、
により充電され、又ホトカプラＰＣ１１のホトトランジ
スタがオンの時に、コンデンサＣ１４は抵抗Ｒ１５を介
して放電される。従って、コンデンサＣ１４は脈流出力
電圧に同期して充放電が繰り返される。そのコンデンサ
Ｃ１４の端子電圧は、抵抗Ｒ１７，ＲｌＢにより分圧さ
れた電圧を基準電圧として比較回路１９により比較され
る。When the phototransistor of this photocoupler PCII is off, the capacitor C14 has a voltage of 1 through the resistor R16. ,
When the phototransistor of the photocoupler PC11 is on, the capacitor C14 is discharged via the resistor R15. Therefore, the capacitor C14 is repeatedly charged and discharged in synchronization with the pulsating output voltage. The terminal voltage of the capacitor C14 is compared by a comparison circuit 19 using the voltage divided by the resistors R17 and RlB as a reference voltage.
交流電源１１が停電すると、全波整流回路１５の出力電
圧は、入力フィルタ１２のコンデンサＣ１１の端子電圧
に対応して次第に低下する。そして、比較回路１６の出
力信号がほぼ零となってホトカプラＰＣＩＩのオフが継
続すると、コンデンサＣ１４の充電が継続して行われ、
その端子電圧が上昇して基準電圧以上となる。その時に
比較回路１９から停電検出信号が出力される。When the AC power supply 11 loses power, the output voltage of the full-wave rectifier circuit 15 gradually decreases in response to the terminal voltage of the capacitor C11 of the input filter 12. Then, when the output signal of the comparator circuit 16 becomes almost zero and the photocoupler PCII remains off, the capacitor C14 continues to be charged.
The terminal voltage increases and becomes equal to or higher than the reference voltage. At that time, the comparison circuit 19 outputs a power failure detection signal.
この停電検出信号は、負荷１３が無停電で動作させる必
要がある場合には、予備電源に切替える切替装置等に加
えられ、又コンピュータ等の場合には、コンピュータ等
へ加えられて内部記憶内容の退避処理等が行われる。When the load 13 needs to operate without interruption, this power failure detection signal is applied to a switching device that switches to a standby power source, and in the case of a computer, it is applied to the computer etc. to change the internal memory contents. Evacuation processing etc. are performed.
第４図は従来例の動作説明図であり、（ａ）は入力フィ
ルタ１２を介して負荷１３に加えられる交流電圧（コン
デンサＣ１ｌの端子電圧）、う）は全波整流回路１５の
脈流出力電圧、（Ｃ）は比較回路１６の出力信号（ホト
カプラＰＣＩＩのオン、オフ動作） 、（ｄ）はコンデ
ンサＣ１４の端子電圧、（ｅ）は比較回路工９の出力信
号の一例を示す。FIG. 4 is an explanatory diagram of the operation of the conventional example, in which (a) is the AC voltage (terminal voltage of capacitor C1l) applied to the load 13 via the input filter 12, and (c) is the pulsating output of the full-wave rectifier circuit 15. (C) shows the output signal of the comparison circuit 16 (on/off operation of the photocoupler PCII), (d) shows the terminal voltage of the capacitor C14, and (e) shows an example of the output signal of the comparison circuit 9.
比較回路１６は、（ロ）に示す全波整流回路１５の脈流
出力電圧が基準電圧Ｖｒｌ以下となると、（Ｃ）に示す
ように、“ｌ”の出力信号となり、ホトカプラＰＣＩＩ
はオフ状態となり、脈流出力電圧が基準電圧Ｖｒｌを超
えると、°“０”の出力信号となり、ホトカプラＰＣＩ
Ｉはオン状態となる。このホトカプラＰＣＩＩがオン状
態となると、抵抗Ｒ１５を介してコンデンサＣ１４は放
電され、ホトカプラＰＣＩＩがオフ状態となると抵抗Ｒ
１６を介してコンデンサＣ１４は充電される。従って、
コンデンサＣ１４の端子電圧は脈流出力電圧に同期して
充放電が繰り返され、（ｄ）に示すように、端子電圧は
基準電圧Ｖｒ２以下となるので、比較回路１９の出力信
号は（ｅ）に示すように“°０″となる。When the pulsating output voltage of the full-wave rectifier circuit 15 shown in (B) becomes equal to or lower than the reference voltage Vrl, the comparison circuit 16 becomes an output signal of "1" as shown in (C), and the photocoupler PCII
turns off, and when the pulsating output voltage exceeds the reference voltage Vrl, the output signal becomes “0” and the photocoupler PCI
I is turned on. When this photocoupler PCII is turned on, the capacitor C14 is discharged through the resistor R15, and when the photocoupler PCII is turned off, the resistor R
Capacitor C14 is charged via C16. Therefore,
The terminal voltage of the capacitor C14 is repeatedly charged and discharged in synchronization with the pulsating output voltage, and as shown in (d), the terminal voltage becomes less than the reference voltage Vr2, so the output signal of the comparator circuit 19 becomes as shown in (e). As shown, it becomes "°0".
例えば、交流電圧のピーク時点の時刻ｔｌｌに交流電源
１１が停電したとすると、入力フィルタ１２のコンデン
サＣ１ｌの端子電圧は、負荷１３及び全波整流回路１５
を介して抵抗Ｒ１１を含む回路で放電されて低下する。For example, if the AC power supply 11 has a power outage at time tll at the peak of the AC voltage, the terminal voltage of the capacitor C1l of the input filter 12 will be
The voltage is discharged through the circuit including the resistor R11 and lowered.
コンデンサＣ１ｌの端子電圧が零近（まで低下する時刻
ｔ１２に於いてホトカプラＰＣＩＩはオフとなり、コン
デンサＣ１４は抵抗Ｒ１６を介して充電され、基準電圧
Ｖｒ２を超える時刻ｔ１３に於いて比較回路１９から“
１″′の停電検出信号が出力される。At time t12, when the terminal voltage of capacitor C1l drops to near zero, photocoupler PCII is turned off, capacitor C14 is charged via resistor R16, and at time t13, when the terminal voltage of capacitor C1l exceeds reference voltage Vr2, "
A power failure detection signal of 1'' is output.
前述のように、従来例の停電検出回路は、入力フィルタ
１２のコンデンサＣ１ｌの端子電圧がＯＶとなった時点
で停電した場合は、ホトカプラＰＣ１ｌは比較的短時間
でオフ状態となり、コンデンサＣ１４の充電が開始され
るから、比較的短時間で停電検出信号を出力することが
できるが、前述のように、コンデンサＣ１ｌの端子電圧
が交流電圧のピーク値となった時点で停電した場合は、
第４図の（Ｃ）に示すように、Ｔｌｌの時間を必要とす
ることになり、停電検出信号が出力するまでには、第４
図の（ｅ）に示すように、Ｔ１２の時間を必要とするこ
とになる。As described above, in the conventional power failure detection circuit, if a power failure occurs when the terminal voltage of the capacitor C1l of the input filter 12 reaches OV, the photocoupler PC1l is turned off in a relatively short period of time, and the capacitor C14 is not charged. starts, so a power outage detection signal can be output in a relatively short time. However, as mentioned above, if a power outage occurs when the terminal voltage of capacitor C1l reaches the peak value of AC voltage,
As shown in FIG. 4(C), the time Tll is required, and the fourth
As shown in (e) of the figure, a time of T12 is required.
そこで、入力フィルタ１２のコンデンサＣ１ｌの放電を
早くする為に、抵抗Ｒ１１を含む比較口Ｂ１６側の合成
抵抗を小さくすることが考えられるが、それらによる電
力損失が大きくなる欠点が住じる。Therefore, in order to speed up the discharge of the capacitor C1l of the input filter 12, it is conceivable to reduce the combined resistance on the side of the comparison port B16 including the resistor R11, but this has the drawback that the power loss due to this increases.
本発明は、簡単な構成により停電を迅速に検出すること
を目的とするものである。An object of the present invention is to quickly detect a power outage with a simple configuration.
本発明の停電検出回路は、入力フィルタからの交流骨の
みを全波整流することにより、入力フィルタのコンデン
サの端子電圧の影響を除くものであり、第１図を参照し
て説明する。The power failure detection circuit of the present invention eliminates the influence of the terminal voltage of the capacitor of the input filter by full-wave rectifying only the alternating current from the input filter, and will be explained with reference to FIG.
入力フィルタ２を介して各種の負荷３に電力を供給する
交流電源１の停電を検出する停電検出回路に於いて、入
力フィルタ２に・直流遮断用のコンデンサ４を介して接
続した全波整流回路５と、この全波整流回路５の脈流出
力電圧を基準電圧と比較する比較回路６と、この比較回
路６の出力信号に従ってコンデンサ７の充放電を抵抗Ｒ
５，Ｒ６を介して行わせる充放電回路８と、この充放電
回路８のコンデンサ７の端子電圧が基準電圧以上に上昇
した時に停電検出信号を出力する検出部９とを備えたも
のである。In a power outage detection circuit that detects a power outage in an AC power supply 1 that supplies power to various loads 3 via an input filter 2, a full-wave rectifier circuit is connected to the input filter 2 via a capacitor 4 for DC cutoff. 5, a comparator circuit 6 that compares the pulsating output voltage of the full-wave rectifier circuit 5 with a reference voltage, and a resistor R that controls charging and discharging of the capacitor 7 according to the output signal of the comparator circuit 6.
5 and R6, and a detecting section 9 that outputs a power failure detection signal when the terminal voltage of the capacitor 7 of the charging/discharging circuit 8 rises above a reference voltage.
正常時は、全波整流回路５の脈流出力電圧に同期してコ
ンデンサ７の充放電が行われ、そのコンデンサ７の充放
電時定数は、コンデンサ７の端子電圧が、抵抗Ｒ７，Ｒ
８等による基準電圧を超えない値を維持するように選定
されている。Under normal conditions, the capacitor 7 is charged and discharged in synchronization with the pulsating output voltage of the full-wave rectifier circuit 5, and the charging and discharging time constant of the capacitor 7 is such that the terminal voltage of the capacitor 7 is
The voltage is selected to maintain a value that does not exceed a reference voltage such as 8.
交流電源ｌが停電すると、入力フィルタ２のコンデンサ
Ｃ１の充電電圧は、負荷３側へのみ放電して徐々に低下
することになるが、その場合の充電電圧は直流分を示す
ことになるから、コンデンサ４により直流遮断された全
波整流回路５の脈流出力電圧は急激に低下することにな
る。従って、充放電回路８のコンデンサ７の充電が継続
され、その端子電圧が基準電圧以上となって、検出部９
から停電検出信号が出力される。When the AC power supply l has a power outage, the charging voltage of the capacitor C1 of the input filter 2 will discharge only to the load 3 side and gradually decrease, but the charging voltage in that case will show the DC component. The pulsating output voltage of the full-wave rectifier circuit 5 whose direct current is cut off by the capacitor 4 will drop rapidly. Therefore, the capacitor 7 of the charging/discharging circuit 8 continues to be charged, and the terminal voltage becomes equal to or higher than the reference voltage, and the detection unit 9
A power outage detection signal is output from.
［実施例〕
以下図面を参照して本発明の実施例について詳細に説明
する。[Examples] Examples of the present invention will be described in detail below with reference to the drawings.
第１図は本発明の実施例の回路図であり、１は交流電源
、２は入力フィルタ、３は負荷、４は直流遮断用のコン
デンサ、５は全波整流回路、６は比較回路、８は充放電
回路、９は検出部である。FIG. 1 is a circuit diagram of an embodiment of the present invention, in which 1 is an AC power supply, 2 is an input filter, 3 is a load, 4 is a capacitor for DC cutoff, 5 is a full-wave rectifier circuit, 6 is a comparison circuit, 8 9 is a charging/discharging circuit, and 9 is a detection section.
入力フィルタ２は従来例と同様にコンデンサ０１〜Ｃ３
とインダクタンスＬとからなる場合を示し、又比較回路
６も従来例と同様にシャントレギュレータ等の構成を有
し、ホトカブラＰＣのホトダイオードを、全波整流回路
５の脈流出力電圧に同期して駆動するものである。Input filter 2 consists of capacitors 01 to C3 as in the conventional example.
and an inductance L, and the comparator circuit 6 also has a structure such as a shunt regulator as in the conventional example, and drives the photodiode of the photocoupler PC in synchronization with the pulsating output voltage of the full-wave rectifier circuit 5. It is something to do.
又充放電回路８は、ホトカブラＰＣがオフの時に、コン
デンサ７を抵抗Ｒ６を介して電圧ＶＣＣにより充電し、
ホトカブラＰＣがオンの時に、抵抗Ｒ５を介して放電し
、コンデンサ７の端子電圧を、抵抗Ｒ７，Ｒ８により分
圧した電圧と検出部９に於いて比較し、コンデンサ７の
端子電圧が、分圧電圧以上となると、停電検出信号を出
力するものである。Further, the charging/discharging circuit 8 charges the capacitor 7 with the voltage VCC via the resistor R6 when the photocoupler PC is off.
When the photocoupler PC is on, it is discharged through the resistor R5, and the terminal voltage of the capacitor 7 is compared with the voltage divided by the resistors R7 and R8 in the detection section 9, and the terminal voltage of the capacitor 7 is the divided voltage. When the voltage exceeds the voltage, a power failure detection signal is output.
第２図は本発明の実施例の動作説明図であり、（ａ）は
入力フィルタ２を介して負荷３に加えられる電圧（コン
デンサＣ１の端子電圧）、［有］）は全波整流回路５の
脈流出力電圧、（Ｃ）は比較回路６の出力信号（ホトカ
ブラＰＣのオン、オフ動作） 、（ｄ）はコンデンサ７
の端子電圧、（ｅ）は検出部９の停電検出信号の一例を
示す。FIG. 2 is an explanatory diagram of the operation of the embodiment of the present invention, in which (a) is the voltage applied to the load 3 via the input filter 2 (terminal voltage of capacitor C1); , (C) is the output signal of comparator circuit 6 (on/off operation of photocoupler PC), (d) is capacitor 7
, and (e) shows an example of the power failure detection signal of the detection unit 9.
正常時は、従来例と同様に、し）に示す全波整流回路５
の脈流出力電圧は、比較回路６に於いて基準電圧Ｖｒｌ
（抵抗Ｒ２，Ｒ３による分圧電圧）と比較され、（Ｃ）
に示す出力信号となり、“１パの出力信号の時にホトカ
ブラＰＣがオフ、“０″の出力信号の時にオンとなる。During normal operation, as in the conventional example, the full-wave rectifier circuit 5 shown in
The pulsating output voltage of
(divided voltage by resistors R2 and R3), (C)
When the output signal is "1", the photocoupler PC is turned off, and when the output signal is "0", the photocoupler PC is turned on.
従って、コンデンサ７は、ホトカブラＰＣがオフの時に
、抵抗Ｒ６を介して充電されて端子電圧が上昇し、ホト
カブラＰＣがオンの時に、抵抗Ｒ５を介して放電されて
端子電圧が低下する。コンデンサ７の充放電時定数が脈
流出力電圧の周期に対応して選定されているから、（ｄ
）に示すように、コンデンサ７の端子電圧は基準電圧■
ｒ２以下を継続し、検出部９の出力信号は０”となる。Therefore, when the photocoupler PC is off, the capacitor 7 is charged through the resistor R6 and the terminal voltage increases, and when the photocoupler PC is on, it is discharged through the resistor R5 and the terminal voltage decreases. Since the charging/discharging time constant of the capacitor 7 is selected corresponding to the period of the pulsating output voltage, (d
), the terminal voltage of capacitor 7 is the reference voltage ■
r2 or below continues, and the output signal of the detection unit 9 becomes 0''.
時刻ｔ１に於いて停電したとすると、全波整流回路５の
出力電圧は（′ｂ）に示すように急激に低下し、時間Ｔ
ｌ後の時刻ｔ２に於いてオドカブラＰＣがオフとなると
、コンデンサ７の充電が継続して行われるから、停電か
ら時間Ｔ２後の時刻ｔ３にコンデンサ７の端子電圧が基
準電圧Ｖｒ２を超えることになり、（ｅ）に示すように
パ１“の停電検出信号が検出部９から出力される。Assuming a power outage occurs at time t1, the output voltage of the full-wave rectifier circuit 5 drops rapidly as shown in ('b), and at time T1.
When the odocobra PC is turned off at time t2 after l, charging of the capacitor 7 continues, so that the terminal voltage of the capacitor 7 exceeds the reference voltage Vr2 at time t3, which is a time T2 after the power outage. , (e), a power outage detection signal of "P1" is output from the detection unit 9.
従って、入力フィルタ２のコンデンサＣＩの端子電圧が
ピーク値の時に停電したとしても、全波整流回路５の脈
流出力電圧は急激に低下し、それによりホトカプラＰＣ
はオフとなるから、コンデンサ７の充電が継続され、そ
の端子電圧の上昇により停電検出信号が検出部９から出
力され、従来例に比較して迅速に停電を検出することが
可能となる。Therefore, even if a power outage occurs when the terminal voltage of the capacitor CI of the input filter 2 is at its peak value, the pulsating output voltage of the full-wave rectifier circuit 5 will drop rapidly, and as a result, the photocoupler PC
Since the capacitor 7 is turned off, charging of the capacitor 7 continues, and as the terminal voltage increases, a power failure detection signal is output from the detection section 9, making it possible to detect a power failure more quickly than in the conventional example.
本発明は前述の実施例にのみ限定されるものではなく、
種々付加変更することができるものであり、例えば、前
述の実施例に於いて、ホトカプラＰＣを用いてコンデン
サ７の充放電を行わせるものであるが、ホトカプラＰＣ
の代わりに、トランスを介してトランジスタを駆動し、
そのトランジスタによりコンデンサ７の放電を行わせる
ことも可能である。又比較回路６に於ける基準電圧は、
抵抗Ｒ２，Ｒ３による分圧電圧以外に、他の電圧を用い
ることも可能である。同様に、検出部９に於ける基準電
圧も、抵抗Ｒ７，Ｒ８による分圧電圧以外の他の電圧を
用いることも可能である。The present invention is not limited only to the above-mentioned embodiments,
Various additions and changes can be made; for example, in the above embodiment, the capacitor 7 is charged and discharged using a photocoupler PC, but the photocoupler PC
Instead of driving the transistor through a transformer,
It is also possible to discharge the capacitor 7 by the transistor. Also, the reference voltage in the comparator circuit 6 is
It is also possible to use other voltages in addition to the voltage divided by the resistors R2 and R3. Similarly, for the reference voltage in the detection section 9, it is also possible to use a voltage other than the voltage divided by the resistors R7 and R8.
以上説明したように、本発明は、入力フィルタ２に直流
遮断用のコンデンサ４を介して全波整流回路５を接続し
たもので、交流電源１の停電時の入力フィルタ２のコン
デンサＣ１の端子電圧は、負荷３等により放電されて次
第に低下するが、殆ど直流分となるから、コンデンサ４
により遮断されて全波整流回路５に加えられなくなり、
従って、入力フィルタ２のコンデンサＣ１の放電を行わ
せる為の例えば従来例に於ける抵抗Ｒ１を省略しても、
迅速に停電を検出することが可能となり、且つ電力消費
を低減できる利点がある。As explained above, in the present invention, a full-wave rectifier circuit 5 is connected to the input filter 2 via the capacitor 4 for DC cutoff, and the terminal voltage of the capacitor C1 of the input filter 2 during a power outage of the AC power supply 1 is is discharged by the load 3 etc. and gradually decreases, but since it is mostly a direct current component, the capacitor 4
is blocked and cannot be added to the full-wave rectifier circuit 5,
Therefore, even if the resistor R1 in the conventional example for discharging the capacitor C1 of the input filter 2 is omitted,
This has the advantage of being able to quickly detect a power outage and reducing power consumption.
第１図は本発明の実施例の回路図、第２図は本発明の実
施例の動作説明図、第３図は従来例の回路図、第４図は
従来例の動作説明図である。
１は交流電源、２は入力フィルタ、３は負荷、４は直流
遮断用のコンデンサ、５は全波整流回路、６は比較回路
、７はコンデンサ、８は充放電回路、９は検出部、０１
〜Ｃ３はコンデンサ、Ｌはインダクタンス、Ｒ２−Ｒ８
は抵抗である。
特許出願人 富士通電装株式会社
代理人弁理士 相 谷 昭 司
代理人弁理士 渡 邊 弘 −
本発明の実施例の回路図
第１図
ｔｌ
ｔ２ ｔ３
本発明の実施例の動作説明図
第２図
従来例の回路図
第３図FIG. 1 is a circuit diagram of an embodiment of the present invention, FIG. 2 is an explanatory diagram of the operation of the embodiment of the invention, FIG. 3 is a circuit diagram of a conventional example, and FIG. 4 is an explanatory diagram of operation of the conventional example. 1 is an AC power supply, 2 is an input filter, 3 is a load, 4 is a capacitor for DC cutoff, 5 is a full-wave rectifier circuit, 6 is a comparison circuit, 7 is a capacitor, 8 is a charge/discharge circuit, 9 is a detection unit, 01
~C3 is a capacitor, L is an inductance, R2-R8
is resistance. Patent Applicant Fujitsu Denso Co., Ltd. Representative Patent Attorney Akira Aitani Representative Patent Attorney Hiroshi Watanabe - Circuit diagram of an embodiment of the present invention Fig. 1 tl t2 t3 Operation explanatory diagram of an embodiment of the present invention Fig. 2 Conventional Example circuit diagram Figure 3
Claims (1)
る交流電源（１）の停電を検出する停電検出回路に於い
て、 前記入力フィルタ（２）に直流遮断用のコンデンサ（４
）を介して接続した全波整流回路（５）と、 該全波整流回路（５）の脈流出力電圧を基準電圧と比較
する比較回路（６）と、 該比較回路（６）の出力信号に従ってコンデンサ（７）
の充放電を抵抗を介して行わせる充放電回路（８）と、 前記コンデンサ（７）の端子電圧が基準電圧以上に上昇
した時に停電検出信号を出力する検出部（９）と を備えたことを特徴とする停電検出回路。[Claims] In a power outage detection circuit that detects a power outage of an AC power source (1) that supplies power to a load (3) via an input filter (2), the input filter (2) is provided with a DC cutoff device. capacitor (4
), a comparator circuit (6) that compares the pulsating output voltage of the full-wave rectifier circuit (5) with a reference voltage, and an output signal of the comparator circuit (6). According to the capacitor (7)
A charging/discharging circuit (8) that performs charging and discharging through a resistor, and a detection section (9) that outputs a power failure detection signal when the terminal voltage of the capacitor (7) rises above a reference voltage. A power outage detection circuit featuring:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2164300A JP2592346B2 (en) | 1990-06-25 | 1990-06-25 | Power failure detection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2164300A JP2592346B2 (en) | 1990-06-25 | 1990-06-25 | Power failure detection circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0454460A true JPH0454460A (en) | 1992-02-21 |
| JP2592346B2 JP2592346B2 (en) | 1997-03-19 |
Family
ID=15790502
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2164300A Expired - Fee Related JP2592346B2 (en) | 1990-06-25 | 1990-06-25 | Power failure detection circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2592346B2 (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6162052A (en) * | 1997-01-31 | 2000-12-19 | J. Morita Manufacturing Corporation | Medical laser handpiece |
| WO2009122490A1 (en) * | 2008-03-31 | 2009-10-08 | パイオニア株式会社 | Power failure detection circuit and electrical equipment |
| CN104362608A (en) * | 2014-12-03 | 2015-02-18 | 中国兵器工业集团第二一四研究所苏州研发中心 | Overvoltage suppression and under-voltage surge detection circuit |
| US9233558B2 (en) | 2013-11-05 | 2016-01-12 | Canon Components, Inc. | Electrostatic adsorptive belt and method of manufacturing thereof, assembly, and conveyance system |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60120259A (en) * | 1983-12-05 | 1985-06-27 | Sanken Electric Co Ltd | Power failure detecting circuit |
-
1990
- 1990-06-25 JP JP2164300A patent/JP2592346B2/en not_active Expired - Fee Related
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60120259A (en) * | 1983-12-05 | 1985-06-27 | Sanken Electric Co Ltd | Power failure detecting circuit |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6162052A (en) * | 1997-01-31 | 2000-12-19 | J. Morita Manufacturing Corporation | Medical laser handpiece |
| WO2009122490A1 (en) * | 2008-03-31 | 2009-10-08 | パイオニア株式会社 | Power failure detection circuit and electrical equipment |
| WO2009123181A1 (en) * | 2008-03-31 | 2009-10-08 | パイオニア株式会社 | Outage detection circuit and electric device |
| US9233558B2 (en) | 2013-11-05 | 2016-01-12 | Canon Components, Inc. | Electrostatic adsorptive belt and method of manufacturing thereof, assembly, and conveyance system |
| US9487365B2 (en) | 2013-11-05 | 2016-11-08 | Canon Components, Inc. | Electrostatic adsorptive belt and method of manufacturing thereof, assembly, and conveyance system |
| CN104362608A (en) * | 2014-12-03 | 2015-02-18 | 中国兵器工业集团第二一四研究所苏州研发中心 | Overvoltage suppression and under-voltage surge detection circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2592346B2 (en) | 1997-03-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US10608525B2 (en) | Method and apparatus for implementing a power converter input terminal voltage discharge circuit | |
| US20220302846A1 (en) | Architecture for multi-port ac/dc switching mode power supply | |
| US8716996B2 (en) | Switching control circuit and AC/DC converter using the same | |
| JP2628642B2 (en) | Automatic voltage switching power supply | |
| US10511230B2 (en) | Adaptive wakeup time control in burst mode of a primary side regulated flyback converter | |
| US11621627B2 (en) | Switching mode power supply with zero voltage switching, the primary control circuit and the method thereof | |
| US11025158B2 (en) | Power supply apparatus capable to extend hold-up time length of output voltage | |
| US20040190313A1 (en) | Switched linear inductor circuit for switched power supply | |
| JPH0454460A (en) | Detection circuit for power failure | |
| TWI491160B (en) | Power supply without high-voltage electrolytic capacitor | |
| JPH077922A (en) | Capacitor life detection circuit and switching power supply using the same | |
| JPH07213066A (en) | High-power-factor switching power supply | |
| JPH05284748A (en) | Rectifier | |
| JP2004208462A (en) | Power supply | |
| CN118763889A (en) | A precharging circuit, a precharging method and a switching power supply | |
| JPH01238438A (en) | Uninterruptible power supply device | |
| JP3331973B2 (en) | Power factor improvement circuit | |
| JPH02220119A (en) | Reset signal generating circuit and power unit | |
| JPH01274664A (en) | Dc constant-voltage power source | |
| JPH0226264A (en) | Dc-dc converter | |
| JPH02273031A (en) | Dc power source device | |
| Herfurth et al. | Power factor and PWM controller TDA 16888 | |
| JPH03143224A (en) | Power device with inrush current limitor | |
| JPH04105522A (en) | Charging circuit | |
| JPH11332224A (en) | Power interruption detecting circuit for switching power supply |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |