JPH0454487A - digital clock - Google Patents

digital clock

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Publication number
JPH0454487A
JPH0454487A JP2165327A JP16532790A JPH0454487A JP H0454487 A JPH0454487 A JP H0454487A JP 2165327 A JP2165327 A JP 2165327A JP 16532790 A JP16532790 A JP 16532790A JP H0454487 A JPH0454487 A JP H0454487A
Authority
JP
Japan
Prior art keywords
signal
counter
time
circuit
microphone
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2165327A
Other languages
Japanese (ja)
Inventor
Hidetoshi Yoshitaki
吉瀧 英利
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2165327A priority Critical patent/JPH0454487A/en
Publication of JPH0454487A publication Critical patent/JPH0454487A/en
Pending legal-status Critical Current

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Abstract

PURPOSE:To automatically correct the time by taking in the time announcement of a TV, etc., through a microphone, discriminating whether the time announcement is by NHK (Nippon Hoso Kyokai) or commercial broadcasting station, judging whether the timepiece is fast or late in how many seconds and advancing the hand operation when the timepiece is late and stopping the hand operation when the timepiece is fast. CONSTITUTION:Every second signals 275 are taken into a counter A 271 of a deciding circuit 27. The counter A 271 is so preset as to be reset to 0 simultaneously when the count value attains 60. When a time announcement signal 261 is admitted from the microphone the signal is tuned to the frequency of the time announcement on the hour so as to turn the output signal 274 to an H. The pulse signal of an output section 274 and the 0 reset signal 276 of the counter A 271 are sent to a counter B 277. The signal inputted earlier of the time announcement 274 on the hour and the 0 reset signal of the counter A 271 is decided as a start signal and the time seconds before the other signal is inputted are counted. The count is sent to a control circuit 278. The display of a time display section 24 is changed by the output of the control circuit section 278.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は腕時計、置時計、壁掛は時計等の中小型時計の
時刻修正方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a time adjustment method for small and medium-sized timepieces such as wristwatches, table clocks, and wall clocks.

〔発明が解決しようとする課題〕[Problem to be solved by the invention]

従来例においては時刻修正の際には何らかの操作を必要
とする。最近の電子式時計は月差±20秒以内であり、
時刻修正は1〜2ケ月に1回程度で済む。しかし、一般
的に言って、時刻修正というのは習慣化しておらず、た
とえ月に一度であっても煩わしいもので、特に年配の人
々にとってはデジタル時計の操作ボタンを見ただけで抵
抗を感じる人もいる。また操作ボタンの存在は時計デザ
イン上のネックになっている。本発明の目的はかかる欠
点を除去し、正確で美しいデジタル時計を提供しようと
するものである。
In the conventional example, some kind of operation is required when adjusting the time. Recent electronic watches have a monthly difference of less than ±20 seconds,
You only need to adjust the time once every 1-2 months. However, generally speaking, adjusting the time is not a habit, and even if it is done once a month, it is a nuisance, and especially for elderly people, they feel resistance just by looking at the operation buttons on a digital watch. There are some people. The presence of operation buttons is also a bottleneck in watch design. The object of the present invention is to eliminate such drawbacks and provide an accurate and beautiful digital clock.

〔課題を解決するための手段〕[Means to solve the problem]

本発明のデジタル時計は1時計本体にマイクまたはライ
ンジャック端子を設け、該端子またはマイクより得られ
た信号を増幅する増幅回路と増幅回路より得られた信号
を同調判別させ、同調した場合には信号を発しうる同調
回路と同調回路より得られる信号を取り込むカウンタB
とカウンタBに0リセット信号を送るためのカウンタA
とからなる自動時刻修正装置を具備してなることを特徴
とする。
The digital watch of the present invention is provided with a microphone or line jack terminal on the main body of the watch, an amplifier circuit that amplifies the signal obtained from the terminal or the microphone, and a synchronization determination of the signal obtained from the amplification circuit. A tuned circuit that can emit a signal and a counter B that takes in the signal obtained from the tuned circuit.
and counter A to send a 0 reset signal to counter B.
It is characterized by being equipped with an automatic time adjustment device consisting of.

〔実施例〕〔Example〕

本発明の回路ブロック図を第1図に示す。 A circuit block diagram of the present invention is shown in FIG.

通常駆動の場合はブロック11の構成であり、高精度な
電子時計の源となる信号を発する発振部12、発振部1
2の信号を分周するための分周回路15、分周された信
号を用いて時計モータを駆動させるだめの駆動信号を成
形させる駆動パルス成形回路14、および時計モータ1
5かうなる。
In the case of normal drive, the configuration is of block 11;
a frequency dividing circuit 15 for dividing the frequency of the clock motor 1 signal, a drive pulse forming circuit 14 for shaping a drive signal for driving the clock motor using the frequency divided signal, and a clock motor 1.
5 growls.

時刻修正の場合はブロック16で信号制御を行ない、時
刻修正のための信号を時計表示部15に送って時刻修正
を行なう。
In the case of time adjustment, signal control is performed in block 16, and a signal for time adjustment is sent to clock display section 15 to perform time adjustment.

構成はTV等より送られてきた信号を受信する受信部1
7と時報判定のための判定回路18とからなる。
The configuration consists of a receiving unit 1 that receives signals sent from a TV, etc.
7 and a determination circuit 18 for time signal determination.

以下に各ブロックの具体例について説明する。Specific examples of each block will be explained below.

第2図は本発明の具体的実施例である。FIG. 2 shows a specific embodiment of the present invention.

本実施例では水晶振動子212とインバータ215によ
るインバータ発振回路21を用いている。
In this embodiment, an inverter oscillation circuit 21 including a crystal resonator 212 and an inverter 215 is used.

水晶振動子212の10は5Z768KH2であるが2
N)I ZでN≧8であれば周波数は自由に選択できる
。抵抗211は1MΩ程度、コンデンサ2i4,215
は15〜50PIF程度のものを用いればよい。周波数
は可変コンデンサ216により52.768KHzに合
わせ込む。
10 of the crystal oscillator 212 is 5Z768KH2, but 2
N) If N≧8 in IZ, the frequency can be freely selected. Resistor 211 is about 1MΩ, capacitor 2i4, 215
It is sufficient to use one having a value of about 15 to 50 PIF. The frequency is adjusted to 52.768 KHz by a variable capacitor 216.

発振回路21より得られた信号を分周回路22で分周し
所望の周波数の信号を得る。
The frequency of the signal obtained from the oscillation circuit 21 is divided by the frequency dividing circuit 22 to obtain a signal of a desired frequency.

本発明の実施例では通常駆動用としてQ+5(IHz 
)+時刻修正用としてQ、。(52nz)の′周波数信
号を用いている。
In the embodiment of the present invention, Q+5 (IHz
)+Q for time adjustment. (52 nz)' frequency signal is used.

分周回路22によって得られたデータ信号Q1゜。Data signal Q1° obtained by frequency dividing circuit 22.

QI5のいずれかの信号を駆動パルス成形回路26のア
ナログスイッチ251.252により選択(選択方法は
後述)し、OR回路233を介してv/D カウンタ2
34に送る。
One of the signals of QI5 is selected by the analog switches 251 and 252 of the drive pulse shaping circuit 26 (the selection method will be described later), and the signal is sent to the v/D counter 2 via the OR circuit 233.
Send to 34.

次に信号制御の方法について述べる。Next, the signal control method will be described.

TV等の時報信号をコンデンサマイクまたはラインジャ
ック端子25で受信し、Tr26で増幅した信号を時報
判定回路27に送る。周知の如(、NHKの時報は44
0HHの信号を3発出した後880Hzの信号を正時に
出す。また、民放は440Hzの信号を2発出した後、
880Hzの信号を出す。従って、予め何処の信号を用
いるが設定しておくか、2発の440H2の信号の後に
(る信号が880Hzなのが440Hzなのかを判別す
る必要がある。
A time signal from a TV or the like is received by a condenser microphone or line jack terminal 25, and the signal amplified by a Tr 26 is sent to a time signal determination circuit 27. As everyone knows (NHK's time signal is 44
After issuing three 0HH signals, an 880Hz signal is issued on the hour. In addition, after the commercial broadcaster issued two 440Hz signals,
Outputs an 880Hz signal. Therefore, it is necessary to set in advance which signal to use, and to determine whether the signal is 880 Hz or 440 Hz after the two 440H2 signals.

本実施例では2発の440H2の信号の1秒後に440
Hzの信号が米るか否かで判別することにする。
In this example, 440H2 signal is issued 1 second after two 440H2 signals
The determination will be based on whether the Hz signal is high or not.

判定回路27の詳細をM3図に示す。内部に設けたカラ
/りA271に毎秒信号275を取り込む。カウンタA
271は製品出荷時に秒針が12時の所に来たときにO
リセットする。秒針がない場合は標準時計を用いて合わ
せる。カウンタA271はカウント数が60になると同
時KOリセットが掛かるようにしておけば針の動きとカ
ウント数が一致するようになる。
Details of the determination circuit 27 are shown in diagram M3. A signal 275 is taken in every second into a color/receiver A271 provided inside. Counter A
271 is O when the second hand reaches the 12 o'clock position when the product is shipped.
Reset. If there is no second hand, use a standard clock to set it. If the counter A271 is set to be simultaneously KO reset when the count number reaches 60, the movement of the hand and the count number will match.

コンデンサマイク25より増1i1 T r 26を介
して判定回路27に時報信号261が入る。判定回路2
7に設けられた同調回路273において正時報周波数8
80Hzに同調させ、出力信号274がHになるように
する。時刻修正用の信号が第4図に示されているように
、NHKの場合はパルス信号51のように正時報(sa
oaz)の前に予備信号(440Hz)が3発、民放の
場合はパルス信号52のように2発大る。双方の諺合に
も880Hzで同調させれば正時に同時回路273の出
力部274よりパルス信号(51152)が出る。出力
部274のパルス信号と、カウンタA271のDリセッ
ト信号276をカウンタB277に送る。該正時報27
4が判定回路内部のカウンタA271の0リセット信号
より早い場合は時計が遅れていると判定する。どちらか
早(入力された信号をスタート信号として、他方の信号
が入力されるまで何秒かかったかをカウントし、制御回
路278へ送る。従って、第一に遅れているか進んでい
るかを判定し、次に正規の時報と差が何秒あるかをカウ
ントする。時計が進んでいる場合は差の分だけ制御回路
部278より、255を介して、第2図のv/D カウ
ンタ254に信号を送り、カウントダウンさせて時計表
示部24の表示を変更する。時刻を修正する場合は第2
図の判定回路27よりLの信号を出す。
A time signal 261 is input from the condenser microphone 25 to the determination circuit 27 via the amplifier 1i1Tr 26. Judgment circuit 2
In the tuning circuit 273 provided at 7, the hourly signal frequency 8
It is tuned to 80Hz so that the output signal 274 becomes H. As shown in FIG. 4, in the case of NHK, the signal for time adjustment is the hourly signal (SA
oaz), there are three preliminary signals (440Hz), and in the case of commercial broadcasting, there are two more like a pulse signal 52. If both signals are tuned at 880 Hz, a pulse signal (51152) will be output from the output section 274 of the simultaneous circuit 273 on the hour. The pulse signal of the output section 274 and the D reset signal 276 of the counter A271 are sent to the counter B277. The hourly signal 27
If 4 is earlier than the 0 reset signal of the counter A271 inside the determination circuit, it is determined that the clock is delayed. Whichever is earlier (using the input signal as a start signal, it counts how many seconds it took until the other signal is input and sends it to the control circuit 278. Therefore, first, it is determined whether it is behind or ahead; Next, count how many seconds there is a difference from the regular time signal.If the clock is ahead, the control circuit 278 sends a signal to the v/D counter 254 in FIG. 2 via 255 by the difference. the clock display section 24 by counting down.To adjust the time, press the second button.
The determination circuit 27 shown in the figure outputs an L signal.

アナログスイッチ251がH,アナログスイッチ232
がLとなるので分周回路22のQ□。の信号が出力され
、時刻修正が速やかにできる。正時報信号がカウンタ2
に入力された15秒後にリセット信号が入ったとすると
、15秒遅れていることになる。従って、分周回路22
のQl。の信号を15発v/D カウンタに送り修正終
了となる。
Analog switch 251 is H, analog switch 232
becomes L, so Q□ of the frequency dividing circuit 22. A signal is output, allowing you to quickly adjust the time. The hour signal is from counter 2
If the reset signal is input 15 seconds after it is input, there is a 15 second delay. Therefore, the frequency dividing circuit 22
Ql. The correction is completed by sending 15 signals to the v/D counter.

修正量が多く、修正に1秒以上かかる場合は補正量を加
えて修正する。本実施例の場合は51秒以上の修正の場
合は補正量1を加えて修正する。
If the amount of correction is large and it takes more than 1 second to correct, add the amount of correction and make the correction. In the case of this embodiment, when a correction is made for 51 seconds or more, a correction amount of 1 is added to the correction.

〔発明の効果〕〔Effect of the invention〕

本発明は以上のように、T 7等の時報をマイクを通し
て取り込み、増幅回路で増幅して、判定回路で時報がN
HKか民放かを判別するとともに時計が何秒進んでいる
かあるいは遅れているかを判断し、遅れている場合は運
針を早めて進んでいる場合は運針を止めて時刻修正を自
動的に行なうというものである。
As described above, the present invention takes in a time signal such as T7 through a microphone, amplifies it with an amplifier circuit, and determines whether the time signal is N.
In addition to determining whether the watch is broadcast from HK or a commercial station, it also determines how many seconds the clock is ahead or behind, and if it is behind, the hands will move forward, and if it is ahead, it will stop moving and automatically adjust the time. It is.

本発明により、ユーザーの手を煩わすことなく自動的に
時刻が修正され、ユーザーに正確時刻を提供することが
できる。また、本発明の方式では高精度を保つために特
殊で高価な水晶振動子を用いたり、回路上で特別な工夫
をする必要がないので安価で高精度な時計を提供できる
According to the present invention, the time can be automatically corrected without bothering the user, and accurate time can be provided to the user. In addition, the method of the present invention does not require the use of a special and expensive crystal oscillator or any special circuitry in order to maintain high accuracy, so it is possible to provide an inexpensive and highly accurate timepiece.

また、時刻修正用のリューズや操作ボタンが必要ないの
ですっきりした高級感のあるデザインの時計をユーザー
に提供できる。
Additionally, since there is no need for a crown or operation buttons for adjusting the time, it is possible to provide users with a watch that has a clean and luxurious design.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の回路ブロック図。 第2図は回路ブロック詳細図。 第3図は判定回路27の詳細図。 第4図は時報信号のタイミングチャート図。 図中、 11−・−一通常駆動の場合のブロック12−m−発振
回路 15−・・−・−分周回路 14−・・・・−駆動パルス成形回路 15−・−・−時計表示部 16−・−一時刻修正の場合のブロック17−−−・受
信部 18−−−一判定回路 21−−−−−インバータ発振回路 22−−−一分周回路 25−−・・−駆動パルス成形回路 24−・−・−・時計表示部 25−−−−コンデンサマイク 26−−−・−増幅用Tr 27−−−時報判定回路 5l−−−NHKのパルス信号 52−m−民放のパルス信号 以上
FIG. 1 is a circuit block diagram of the present invention. FIG. 2 is a detailed circuit block diagram. FIG. 3 is a detailed diagram of the determination circuit 27. FIG. 4 is a timing chart of the time signal. In the figure, 11-.--Blocks for normal drive 12-m-Oscillation circuit 15--Frequency dividing circuit 14--Drive pulse shaping circuit 15--Clock display section 16--Block for one-time adjustment 17--Receiving section 18--One judgment circuit 21--Inverter oscillation circuit 22--One frequency division circuit 25--Drive pulse Molding circuit 24 --- Clock display section 25 --- Condenser microphone 26 --- Amplifying transistor 27 --- Time signal determination circuit 5l --- NHK pulse signal 52 --- Commercial broadcast pulse More than a signal

Claims (1)

【特許請求の範囲】[Claims] 腕時計、置き時計等の中小型時計において、時計本体に
マイクまたはラインジャック端子を設け、該端子または
マイクより得られた信号を増幅する増幅回路と増幅回路
より得られた信号を同調判別する同調回路と、同調回路
より得られる信号を取り込むカウンタBと、カウンタB
にOリセット信号を送るためのカウンタAとからなる自
動時刻修正装置を具備してなることを特徴とするデジタ
ル時計。
In small and medium-sized watches such as wristwatches and table clocks, a microphone or line jack terminal is provided on the watch body, and an amplifier circuit that amplifies the signal obtained from the terminal or the microphone and a tuning circuit that determines the tuning of the signal obtained from the amplifier circuit. , a counter B that takes in the signal obtained from the tuned circuit, and a counter B
A digital timepiece characterized in that it is equipped with an automatic time adjustment device consisting of a counter A for sending an O reset signal to a counter A.
JP2165327A 1990-06-22 1990-06-22 digital clock Pending JPH0454487A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2165327A JPH0454487A (en) 1990-06-22 1990-06-22 digital clock

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2165327A JPH0454487A (en) 1990-06-22 1990-06-22 digital clock

Publications (1)

Publication Number Publication Date
JPH0454487A true JPH0454487A (en) 1992-02-21

Family

ID=15810228

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2165327A Pending JPH0454487A (en) 1990-06-22 1990-06-22 digital clock

Country Status (1)

Country Link
JP (1) JPH0454487A (en)

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