JPH0454554A - External storage controller for multiprocessor system - Google Patents

Abstract

PURPOSE:To carry on the due processing despite a disable state of an external storage contained in its own processor by sharing the file memories FM with each other among plural processors if the FM of its own processor cannot be hunted. CONSTITUTION:The program information and the system control information are updated, added and transferred in the main storages 12 and 22 via the external storages 13 and 23 contained in its own processor. When the control parts 50 and 60 of the processors 10 and 20 detect the inapplicable states of the idle areas 13a and 23a of both storages 13 and 23, both parts 50 and 60 store the information and/or the external information read out of the storages 12 and 22 in the areas 13a and 23a of the storages 13 and 23 of other processors. Thus the processing is always carried out, and the program information and the system control information can be effectively updated, added and transferred. As s result, the due processing can be carried out despite an inapplicable state of the FM of its own processor.

Description

Detailed Description of the Invention [tll Required] FM (File Mem) in a multiprocessor system consisting of a main processor and a plurality of call processors constituting a distributed control system.

ry (external storage device) Regarding the control device, in a multiprocessor system, the purpose of allowing processing to continue even if the external storage device within the own processor becomes unavailable, is to have multiple call processors that perform distributed control over the system. and a main processor that controls these call processors are interconnected, and each of these processors has a built-in main memory device and an external storage device, and program information and system control information are stored on the main memory device and external storage device. A multiprocessor system that operates the system by storing program information and system control information in the main memory.
When additions and transfers are performed via an external storage device provided in the own processor, if the control section in the processor detects that the free space in the external storage device is no longer available, the control sections mutually transfer data from other processors. By storing the information read from the main memory and/or external information in the free space of the external storage device, continuous processing can be maintained at all times, and program information and system control information can be updated, added, and transferred efficiently. Configure it as follows.

[Industrial Application Field] The present invention is directed to external storage (File MemorV) in a multiprocessor system consisting of a main processor and a plurality of call processors constituting a distributed control system.
) relating to a control device.

A plurality of call processors that perform distributed control of the system and a main processor that controls these call processors are interconnected, and each of these processors has a built-in main storage device and an external storage device. There are multiprocessor systems in which the system is operated by storing program information and system control information on the computer. In this type of system, when updating or transferring a large amount of data during continuous operation for maintenance, the system needs to efficiently utilize the free space of the FM.

[Prior Art] FIG. 4 is a block diagram showing an example of a conventional configuration of a multiprocessor system. 1 main processor (MPR)
10 and a plurality of call processors (CPRs) 20 are interconnected via buses and channel adapters (CCAs) 30. The figure shows an example in which two CPRs 20 are connected. Channel adapter 30 is MPRI
They exist on the O side and the CPR20 side, respectively. MPRIO always has a man-machine interface.

The main processor 10 includes a central processing unit (CC) 11,
Main memory (MM)12. External storage device (FM)13.
It consists of a channel-to-channel controller (CHC) 14 and a typewriter 15. The FMI 3 stores system control information and program information necessary for operating the system by IPL.

Similarly, the call processor 20 also has a central processing unit (CC) 2.
1. Main memory (MM) 22. External storage device (FM) 2
3. Channel-to-channel controller (CHC) 2
It is composed of 4.

The FM 23 stores system control information and program information necessary for operating the system by IPL. Here, the free area on FMI:3.23 will be called a buffer.

The system shown in the figure has two stages, and the flow of processing for storing information in the buffer is shown in stage
The flow of processing for transferring the information stored in the buffer to the main memory (MM) is referred to as stage (2).

FIG. 5 is an explanatory diagram of the operation of the conventional system. In the figure, M
It mainly shows the flow of processing on the PR side.

Components that are the same as those in FIG. 4 are designated by the same reference numerals.

(Stage ■) When the buffer write reception unit 41 having a man-machine interface is activated from the typewriter 15a with new information to be updated (including additions), or when information to be newly updated (including additions) is received from the user interface. When activated together, these information enters the data read/buffer controller 42.

Upon receiving this information, the data read/buffer control unit 42 reads information 12a,
12b, and the read data and previously received data-related information are stored in free areas (buffers) 13a and 13b in the FMIB in the first processor.

(Stage ■) When the data transfer accepting section 43 having a man-machine interface is activated from the typewriter 15b or when activated from the user interface, this information enters the buffer reading/data transferring section 44.

The buffer reading/data transfer unit 44 reads out the information to be updated (including additions) on the FMI 3 stored in stage ①, transfers it to the corresponding areas 12g and 12b on the MM 12, and writes it.

The situation during this time is the same on the CPR 20 side.

That is, at stage ①, the data read/buffer control unit 51
operates, and the buffer reading/data transfer unit 52 operates at stage (2) to write information to the FM 23 in the same manner as on the MPRIO side and transfer information read from the FM 23 to the MM 22.

[Problem to be solved by the invention] However, with the conventional method described above, if a failure occurs in the FM used for processing in stage There was a problem when writing was not possible. In such cases, we had no choice but to adopt the method shown below.

■When starting the man-machine interface, notify the maintenance personnel of error information.

■If the user interface is started, it is returned as an abnormal event.

Both of these methods are methods that are left to the user or maintenance personnel, but for example, if a FM failure occurs during a command test that continuously updates or transfers a large amount of data using the FM buffer using a man-machine interface, When encountering or when there is insufficient free space in the FM buffer,
There was a problem that the continuous test had to be stopped. Furthermore, there is a problem in that returning an abnormal event to the user side prevents the system from operating properly.

The present invention has been made in view of such problems, and provides an FM control device for a multiprocessor system that is capable of continuing processing even if an external storage device within its own processor becomes unusable. is intended to provide.

[Means for Solving the Problems] FIG. 1 is a block diagram of the principle of the present invention. Components that are the same as those in FIG. 4 are designated by the same reference numerals. In the figure, 20
uses multiple call processors (C
PR), 10 is a main processor (MPR) that controls these call processors 20. MPRIC
I and CPR20 are interconnected via signal line 70. 12 is the main memory (MM
), 13 is an external storage device (FM) built in the same MPRIO.

22 is a main memory (MM) built into the CPR20, 2
3 is the same < external storage device built into CPRIO fit (
FM). 12a is an information storage area on MM12, 13
a is free space (buffer) on FM13, 23a is FM
This is an empty area (buffer) on 23. This system consists of these main storage devices 12.22 and external storage device 1f13.
．． This is a multiprocessor system in which the system is operated by storing program information and system control information on the computer 23.

[Operation] When updating, adding, and transferring program information and system control information in the main storage device 12.22 via the external storage device 13.23 provided in the own processor, the control unit in the processor 10.20 50.60 detects that the free areas 13a, 23a of the external storage device 13.23 have become unusable, the control units 50.60 mutually transfer the free areas 13a of the external storage devices 13.23 of other processors to each other.
By storing information read from the main memory and/or external information in the main memory 23a, continuous processing can be maintained at all times, and program information and system control information can be updated, added, and transferred efficiently.

Therefore, according to the present invention, processing can be continued even if the FM of the own processor becomes unusable.

[Example] Hereinafter, an example of the present invention will be described in detail with reference to the drawings.

FIG. 2 is a block diagram showing an embodiment of the present invention. Components that are the same as those in FIGS. 1 and 5 are designated by the same reference numerals. Note that the CCA as shown in FIG. 4 is omitted here.

(Stage ■) Command reception unit 51 with man-machine interface
When the typewriter 15a is activated with new information to be updated (including additions), or when the user interface is activated with new information to be updated (including additions), this information is transferred to the buffer write control unit 5.
Enter 2. The buffer write control section 52 activates the data succession section 53 upon receiving this information. At this time, if there is new information to be updated (including additions), the buffer write control section 52 also transfers this related information to the data reading section 53 at the same time.

In the data reading unit 53, when it is necessary to update or transfer data to the system control information or program information placed on the MM12, the contents 12a and 12b of the corresponding atlus are read out from the MM12 of its own processor, and the contents 12a and 12b are read out from the MM12 of its own processor, and are combined with the previously received information. It is transmitted to the buffer control unit 54.

The buffer control unit 54 hunts for empty areas 13a and 13b in the buffer on the FM 13 of its own processor, and if normal, transmits the related information (including additions) that has already been received to the write execution unit 55.

The write execution unit 55 writes related information into the empty areas 13a and 13b of the hunted buffer.

On the other hand, a problem arises when the buffer control unit 54 is unable to hunt for an empty area on the FMI 3 for some reason.

Since the buffer control unit 54 is connected to the buffer control unit 64 in the other cPR 20, in this case, the buffer control unit 54 is connected to the buffer control unit 64 in the other processor 20.
information to that effect along with the related information that has already been received.

In the buffer control unit 64 on the CPR side, in the same way as the processing on the MPRIO side, the empty area 23a of the buffer on FM2B,
23b, and if normal, sends the information to be updated (including additions) to the writing execution unit 65, and updates the hunted FM.
The corresponding area 23a.

Related information is written to 23b. If the buffer hunt is abnormal in CPR20, check other CPHs connected in the Imozuru style.
Information to that effect will be sent to the buffer control unit of the server along with the related information that has already been received. It is now possible to process as much as the installed processor.

(Stage ■) Data transfer reception unit 5 with man-machine interface
6 is activated to read data from the typewriter 15b, or when data read is activated from the user interface, these pieces of information enter the transfer control unit 57.

The transfer control unit 57 activates the buffer succession unit 58 upon receiving the activation information.

The buffer reading unit 58 reads the information stored in the buffer area on 1M1B in the own processor, and checks whether the read information is the information in the own processor or the information in another processor. If it is update information within the own processor, it is sent to five transfer execution units along with those related buttons. Moreover, if it is update information of another processor, it is sent to the transfer execution unit 69 in the other processor 20. Then, the transfer execution unit 59 transfers the received related information to the MM 12,
Write.

Although the operation on the MPR side has been described above, the situation is the same on the CPR side.

That is, the buffer write control section 62 transfers the received activation information and/or related information to the data reading section 63, and the data reading section 63 transfers the information read from the MM 22 and the activation information to the buffer control section 64.

When the buffer control 64 receives the information transmitted from the buffer control unit 54 on the MPR side or the information from the data succession unit 63, it checks whether there are free areas 23a, 23b in the FM 23 in its own processor 23, and checks if there are any free areas 23a, 23b. If so, the information is sent to the write execution unit 65. The write execution unit 65 writes the received information into the free areas 23a and 23b of the FM23.

If it is not possible to hunt for a free space in the FM 23, the buffer control unit 64 transfers the held information to the buffer control unit of another MPR or CPR again.

When reading data, the transfer control unit 67 activates the buffer reading unit 68, the buffer reading unit 68 reads information from the FM 23 in its own processor, determines whether it is information in its own processor, and determines whether it is information in its own processor. If it is information, the read information is transferred to the transfer execution unit 69, and the transfer execution unit 69 transfers the received information to the MM 22 and writes it. If the information is not within the own processor, the information is transferred to the transfer execution unit of another processor.

In the above description, the command reception unit 51. Buffer write control unit 52. Data reading section 53. Buffer control unit 5
4. Write execution unit 55. Data transfer reception unit 56. Transfer control unit 57. The buffer reading unit 58 and the transfer execution unit 59 are
It is included in the control section 50 on the MPR side in FIG. Similarly, buffer write control section 62. Data reading section 63. Buffer control unit 64. Write execution unit 65. The data transfer reception section 66, the transfer control section 67, the buffer succession section 68, and the transfer execution section 69 are included in the CPR side control section 60 in FIG.

FIG. 3 is a flowchart showing an example of the operation of the present invention.

(Stage ■) Upon receiving activation from the activation source, when the buffer write control unit 52 on the MPR side is activated, the data succession unit 53 is activated (Sl). The data succession unit 52 reads information to be updated or data transferred from the MM 12 (S2);
The buffer control unit 54 is activated together with these data and previously received data (S3). The buffer control unit 54 searches the buffer area 13a on 1M1B of its own processor (S4) and checks whether it is normal (S5).

If the hunt result is normal, the buffer write execution unit 55 is activated (S6), and the write execution unit 55 writes information to the buffer area 13a (S7). If the hunt result is abnormal, the number of installed processors other than the own processor is calculated (S8), and the buffer control units of the other processors are activated (S9). Then, the buffer control unit hunts the FM within its own processor and checks whether it is normal (S10).

If it is normal, it will return to the startup source, and if it is abnormal, it will repeat the check until all processors have finished51
1) After checking all processors, check whether all processors are abnormal or not (512).
), if it is abnormal, set an error event 613)
, return to the starting point.

(Stage ■) When the transfer control 57 on the MPRIO side is activated, the transfer control section 57 activates the buffer reading section 58 (S14).

The buffer continuation unit 58 reads out the information stored in the buffer 13a (515) and checks the read control code COD in the buffer (S16). As shown in the figure, a detour flag and a processor number are stored in the control code COD.

Here, if the detour flag is not set to 1, the transfer execution unit 59 in the own processor is activated (517).
), writes the data read from the buffer 13a to the FM12 (818). In step 516, if there is detour light, the data to be transferred is edited based on the processor number set in the control code COD (519), and the transfer execution unit 59 is activated (S20). The transfer execution unit 59 transfers the data to the transfer execution unit of the corresponding processor.

It is checked whether the data transfer has been completed (S21
), when finished, terminate the process and return to the startup source.

The transfer execution unit 59 in the activated processor transfers the received information to the corresponding area 12 on the MM 12 in its own processor.
Write to a (818) and return to orbital light. If the information stored in the buffer exists across multiple processors, the transfer execution unit 59 for all processors is activated (5
20), the process is performed so that it can be sent to the transfer execution unit (521), and the process returns to the starting source.

[Effects of the Invention] As described above in detail, according to the present invention, when the FM in its own processor cannot be hunted, it is possible to continue processing by accommodating FM among a plurality of processors. As a result, in a multiprocessor system, processing can be continued even if an external storage device within the own processor becomes unusable, which has a great practical effect.

[Brief explanation of drawings]

FIG. 1 is a block diagram of the principle of the present invention. FIG. 2 is a configuration block diagram showing an embodiment of the present invention; FIG. 3 is a flowchart showing an example of the operation of the present invention; FIG. 4 is a diagram showing an example of the conventional configuration of a multiprocessor. FIG. 5 is an explanatory diagram of the operation of the conventional system. In Figure 1, 10 is the main processor, 12 is a main storage device; 12a is a writing area; 13 is an external storage device; 13a is an empty area, 20 is a call processor; 22 is a main storage device; 23 is an external storage device; 23a is an empty area, 50 is a control unit; 60 is a control unit; 70 is a signal line.

Claims (1)

[Claims] (1) A plurality of call processors (20) that perform distributed control of the system and a main processor (10) that controls these call processors (20) are interconnected, and these processors (10), (20) respectively have main storage devices (12), (22) and external storage devices (13),
(23) is built-in, and these main storage devices (12), (2
2) and external storage devices (13), (23) to operate the system by storing program information and system control information on the main storage devices (12), (22). ), when updating, adding, and transferring program information and system control information via external storage devices (13) and (23) provided in the own processor, the control unit in the processor (10) and (20) (50), (
60) is the free space (
13a), (23a) become unusable, the control units (50), (60) mutually transfer the free space (13a),
(23a) An external storage control device in a multiprocessor system, characterized in that information read from a main storage device and/or external information is stored in the main storage device to maintain continuous processing at all times. (2) When the main processor (10) is activated to read data as external information, the control unit (50) transfers the information read from the main storage device (12) and/or the external information to the external storage in its own processor. The free area (13a) of the device (13) is hunted, and if it is normal, it is stored in the external storage device (13), and if the free area (13a) cannot be hunted for some reason, it is used for other calls. 2. The external storage control device for a multiprocessor system according to claim 1, wherein said information is transferred to a control section (60) within a processor (20). (3) When the main processor (10) is activated to read the buffer as external information, the control unit (50) reads out the information stored in the external storage device (13) within its own processor, and reads out the read information. If the information is in the own processor, this information is written to the main memory (12) in the own processor, and if the read information is in another processor, this information is transferred to the other processor (20). 2. The external storage control device in a multiprocessor system according to claim 1, wherein the external storage control device is configured to write the data to a main storage device (22) in the other processor (20).