JPH0454785A - Television receiver - Google Patents

Abstract

PURPOSE:To prevent production of fog on a reproduced picture through moving picture processing when a still object starts moving by using a video signal read from a picture memory so as to allow the video signal to replace a video signal reproduced at a moving picture area. CONSTITUTION:An original video signal from a still object is reproduced with high resolution by overlapping the video signals for plural frames or fields onto each other at reproduction circuits 4, 5, 6, 8, 9 and the resulting video signal is stored in a picture memory 18. When the still object starts moving, the picture of the object is reproduced at low resolution by the reproduction circuits 4, 5, 6, 8, 9 as a moving picture region. In this case, since circuits 12, 20, 21A, 21B, 22, 23 for setting a changeover circuit 18 set it to select a video signal read from the memory 18, the video signal with high resolution stored in the memory 18 is used in place of the video signal with low resolution. Thus, even when still object starts moving, the original video signal with high resolution is reproduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a television receiver that performs static motion adaptive processing, such as a MUSE type decoder.

[Summary of the Invention] The present invention provides a motion area detection circuit that detects whether an area to be reproduced is a still image area or a moving image area and generates a static/motion switching signal, and a In the still image area, video signals of multiple fields or multiple frames are superimposed to reproduce the original video signal, and
In the video area, in a television receiver that has a reproduction circuit that reproduces the original video signal by interpolating the video signal of one field or one frame, a motion vector detection circuit that calculates a motion vector for each pixel to be reproduced, and a An image memory that stores the video signal played back in a frame, a read address change circuit that adjusts the read address of this image memory according to the determined motion vector, and a video signal played back in the video area and its image memory. A switching circuit that switches between a video signal read out from the image memory and a switching circuit configured to select the video signal read out from the image memory at a pixel where the previous frame is a still image area and the current frame is a moving image area. A setting circuit is provided for setting a pixel in which the previous frame is a still image area and the current frame is a moving image area, and the read address is adjusted according to the determined motion vector, and the pixel is read out from the image memory. By replacing the video signal played in that video area with the video signal
This is to prevent blurring of the reproduced image due to video processing when a stationary object begins to move.

[Prior Art] In order to increase the image resolution and improve the image quality in a 1000-rev TV receiver (decoder), it is necessary to widen the transmission band from the encoder to the decoder in the spatial frequency domain of the video signal. There is a limit to the expansion of the transmission band in transmission channels such as satellite broadcasting.

Therefore, for example, there are various types of EDTV that use the MUSE method to transmit high-definition signals through one channel of satellite broadcasting and to improve image quality using a transmission path such as the VHF band.
etc., each pixel is divided into a still pixel whose corresponding video signal has a low temporal frequency (temporal frequency) and a video pixel whose temporal frequency is high. The transmission band of the transmission line is substantially expanded by transmitting a still image signal with a wide spatial frequency band over a wide spatial frequency band (field), and transmitting a video signal with a relatively narrow band for video pixels in one field. ing.

Correspondingly, the decoder side uses motion area detection to determine whether each pixel is a still pixel or a video pixel, and for still pixels, reproduces a high-resolution image by superimposing still image signals from multiple fields, and For pixels, the original image is reproduced by interpolating the video signal of one field within the field, and for pixels in the intermediate region between still pixels and video pixels, the two reproduced signals are weighted and mixed. .

Also, if the camera is flashing, the screen will be processed as a video and the resolution will be poor, but since the human line of sight moves to follow the image of a specific object on the screen, it will be processed as a still image. The same level of resolution is required. Therefore, for example, in the MUSE method, the encoder side detects a full-screen motion vector indicating the amount of movement of the entire screen and transmits it to the decoder side, and the decoder side uses the motion vector to obtain the same resolution as a still image. There is.

That is, the decoder side generally calculates the difference between, for example, two frames of a video signal, and determines that a pixel for which the amount of difference is smaller than a predetermined level is a still pixel, and a pixel for which the amount of difference is larger than a predetermined level is a moving pixel. For still pixels, four fields of signals are superimposed. When performing correction using the motion vector of the entire screen on the decoder side, after correcting the phase of the 4-field video signal whose phase has shifted due to non-scanning etc. using the motion vector of the entire screen, When calculating the difference between , the amount of difference becomes smaller. Therefore, the panned image can be reproduced as a high-resolution original image as a collection of still pixels.

[Problems to be Solved by the Invention] However, when using a conventional decoder to reproduce an image of a scene in which a car starts moving, for example, the car before it starts moving cannot be reproduced in high resolution through still image processing. On the other hand, after the car starts moving, it is played back at a low resolution through video processing, so the playback image of the car suddenly becomes blurred, which is inconvenient as the image quality deteriorates and becomes an eyesore for viewers. .

In view of the above, an object of the present invention is to prevent blurring of the reproduced image of an object when the object starts to move in a television receiver that generally performs static motion adaptive processing. .

[Means for Solving the Problem] As shown in FIG. 1, for example, the television receiver according to the present invention detects whether the area to be reproduced is a still image area or a moving image area, and detects whether the area is a still image area or a moving image area. A motion area detection circuit (12) that generates a switching signal M1, and a motion area detection circuit (12) that reproduces the original video signal by superimposing video signals of multiple fields or multiple frames in the still image area according to the static and moving switching signal M1, and In the video area, in a television receiver equipped with a reproducing circuit (4, 5, 6, 8, 9) that reproduces the original video signal by interpolating the video signal of one field or one frame, movement is performed for each pixel to be reproduced. A motion vector detection circuit (17) that calculates the vector MV, and an image memory (17) that stores the video signal reproduced in the previous frame.
8), a read address changing circuit (19) that adjusts the read address of this image memory according to the determined motion vector MV, and a video signal reproduced in the video area and the read address read from the image memory. a switching circuit (10) for switching between a video signal and a video signal; and a switching circuit (10) for selecting a video signal read out from the image memory at a pixel where the previous frame is a still image area and the current frame is a moving image area. Setting circuit to set as follows (12゜20.21^, 21B, 22.23)
For pixels whose previous frame is a still image area and whose current frame is a moving image area, the readout address is adjusted according to the determined motion vector MV, and the image memo! The video signal read from J (18) is used to replace the video signal reproduced in the moving image area.

Further, the present invention includes a detection circuit (51, 52) for detecting a motion start area where the previous frame is a still image area and the current frame is a moving image area using the static/motion switching signal M1, and a motion vector detection circuit for the detection circuit (51, 52). (17) is adapted to obtain the motion vector MV only in the vicinity of the motion start region.

The present invention also provides a motion vector detection circuit (17) that determines the reproduction target based on a plurality of motion vectors detected for each of a plurality of pixels in the vicinity of the pixel to be reproduced (for example, by averaging, median detection, etc.). It is designed to find the motion vector MV of a pixel.

[Operation] According to the present invention, when the object is stationary, the original video signal of the object is transmitted to the reproduction circuit (4°5, 6.8
．． 9), the video signals of multiple frames or fields are reproduced at high resolution by superimposing them, and this reproduced high resolution video signal is used as the image memo! J
(18).

Then, when the object starts moving, the image of this object is played back at low resolution as a moving image area in the playback circuit (4, 5, 6, 8, 9). However, in this case, the setting circuit (12, 20, 21A, 21B
, 22, 23) sets its switching circuit (10) to select the video signal read out from its image memory (18), so that the image before the previous frame is set in place of the video signal of lower resolution. Memo! The high resolution video signal stored in J (18) is used. Therefore,
Even if the object starts moving, the high-resolution original video signal is reproduced.

Additionally, a detection circuit (51, 52) detects a movement start area.
If a motion vector detection circuit (17) is provided, the motion vector detection circuit (17)
Since the detection of the motion vector MV in is only necessary in the vicinity of the motion start area, the amount of calculation can be significantly reduced compared to the case where the motion vector is detected for the entire screen. Therefore, the motion vector detection circuit (17
) as a low-speed, inexpensive circuit or a general circuit S P (
Digital Signal Processor
) etc. can be used.

Further, the motion vector detection circuit (17) calculates a motion vector MV of the pixel to be reproduced from a plurality of motion vectors detected for each of a plurality of pixels in the vicinity of the pixel to be reproduced. In some cases, even if the motion vector detected independently for a pixel has no correlation with the motion vectors of surrounding pixels due to noise, etc., the noise, etc. can be removed by performing processing such as averaging. effects can be removed.

[Embodiment] Hereinafter, one embodiment of the present invention will be described with reference to the drawings. In this example, the present invention is applied to a MUSE type decoder for high-definition signals.

FIG. 1 shows the decoder of this example, and in this FIG.
(1) is an input terminal, and a baseband signal of the MUSE system is supplied to this input terminal (1) from a satellite broadcasting china (not shown). This baseband signal is passed through an A/D converter (2
) to a de-emphasis circuit (3) including a reverse transmission r correction circuit to obtain a video signal VSI in which the luminance signal Y and the color difference signal are time-divided. An interframe interpolation circuit (4) is generated from this signal VSI.

The sampling frequency is 48.6 M for the luminance signal.
A high-resolution still image signal Sv is obtained through a frequency conversion circuit (5) for converting to Hz and an interfield interpolation circuit (6), and this signal SV is supplied to one input section of a multiplier (7). A low-resolution video signal MVS is obtained via an intra-field interpolation circuit (8) and a frequency conversion circuit (9), and this signal MVS is supplied to one input section (10a) of a data selector (10). (
10) is supplied to one input of the multiplier (11).

(12) shows a motion area detection circuit that detects a motion amount signal M1 indicating whether each pixel to be reproduced is a still pixel or a moving pixel from the video signal VSI. In the MUSE method, because there are no identical sample points between frames due to frame offset subsampling, the difference between two frames was detected and the absolute value of this difference was compressed so that the maximum value was 1. The signal is made to be approximately the motion amount signal M1. Therefore, a pixel whose motion amount signal M1 has a value of 00 is a perfect still pixel, and a pixel whose value is 1 is a perfect moving pixel.
For pixels in the intermediate region between still pixels and moving pixels, the value is between O and 1. In addition, there is actually a method of using a four-frame video signal in order to correspond to a special image.

The motion amount signal M1 is supplied to the other input section of the multiplier (11), and a signal whose value is (1-Ml) obtained from the signal M1 via the inversion circuit (13) is input to the multiplier (7). and the output of the multipliers (7) and (11) to the adder <14). The weighted mixed signal outputted from this adder (14) is a reproduced video signal VS2, and this reproduced video signal VS2 is connected to a TCI encoder, a D/A converter, etc. (not shown) via a connection terminal (15). Supplies the processing circuit.

In addition, (16) shows a low-pass filter (LPF) with a cutoff frequency of 4 MHz, and (17) shows a motion vector detection circuit.
6) and supplies the low frequency video signal VS3 to the motion vector detection circuit (17). Generally, the encoder side of the MUSE method compresses the transmission band of the original video signal by folding the original video signal in the frequency domain, but since there is no folding in the frequency domain below 4MHz, the video signal received at the decoder side The component VS3 of VSI below 4 MHz is exactly equal to the component below 4 MHz of the original video signal, regardless of whether it is a still image area or a moving image area. Therefore, the motion vector detection circuit (17) of this example detects the individual motion vector MV of each pixel from the low frequency video signal VS3 of the current frame and the previous frame of 4 MHz or less, and also calculates the magnitude of the detected motion vector. A normal mode signal NM is generated which becomes "1" when it exceeds a predetermined level and becomes "0" when it is below a predetermined level.

When this normal mode signal NM is "1", it means that an appropriate motion vector MV is not detected and correction using a motion vector, which will be described later, is not performed.

Note that the individual motion vector for each pixel in this example differs greatly from the conventional overall motion vector representing the motion of the entire screen in the following two points.

1) Individual motion vectors are generated at the decoder side, whereas the overall motion vector is detected at the encoder side and transmitted to the decoder.

2) In principle, there are as many individual motion vectors as there are pixels constituting one screen, but there is only one overall motion vector for one screen.

Therefore, the individual motion vectors of this example and the conventional overall motion vector can naturally be used together. Specifically, a frame memory is arranged after the de-emphasis circuit (3) in FIG. By changing the read address of this frame memory in accordance with the overall motion vector transmitted from the encoder side, it is possible to perform the conventional correction using the overall motion vector.

Also, the reproduced video signal VS2 appearing at the connection terminal (15) is transmitted to the other input section (1011) of the data selector (1o) via a frame delay circuit (18) consisting of a frame memory.
), and the read address of the frame delay circuit (18) is changed via the read address change circuit (19) according to the motion vector MV of each pixel. That is, if the delay time for one pixel in the horizontal direction is one clock cycle (1/48.6MHz) and the value of the motion vector MV is, for example, 0 or +1 pixel in the horizontal direction, then the frame delay circuit (18) The delay times in are each one frame period or (one frame period + one clock period).

In FIG. 1, (20) converts the motion amount signal M1 to the dark value TH.
shows a binarization circuit that obtains a binary motion amount signal M2 by binarizing the binary motion amount signal M2, and converts the binary motion amount signal M2 to an AND circuit (21A).
This AND circuit (21A)
The output M3 of 7L/-Aj consisting of frame memory
[Supplied to the low circuit (22) and this frame delay circuit (2
2) The signal read from the circuit is supplied to one input section of the OR circuit (21B). Then, the normal mode signal NM of the motion vector detection circuit (F) is applied to its OR circuit (21B).
) to the other human power section, and its OR circuit (21B)
The binary motion amount signal M4, which is the output of
21A) and the other input section of the data selector (10)
is supplied to the control signal input section. Further, similarly to the frame delay circuit (18), the read address of the frame delay circuit (22) is changed according to the motion vector MV of each pixel via the read address change circuit (23). That is, if the value of the motion vector MV is, for example, 0 or +1 pixel in the horizontal direction, the delay time in the frame delay circuit (22) will be one frame period or (1 frame period + 1 clock period), respectively. .

When the binary motion amount (i-no.
is supplied to the multiplier (11), and when the signal M4 is at low level "0", the data selector (1o) inputs the input section (1
0b) side input signal (signal read out from the frame delay circuit (18)) is supplied to the multiplier (11).

In this case, the output signal of the data selector (10) directly becomes the reproduced video signal VS2 when the motion amount signal M1 output from the motion amount detection circuit (12) is "1".

As shown in FIG. 2, for example, assuming that the image (24) of a car that was stationary until the previous frame is translated by a vector α in the current frame and changed to the image (25), the image (25) of the current frame The pixel on the image (24) of the previous frame corresponding to the upper pixel P2 is assumed to be Pl. If the pixel to be reproduced at this time is the pixel P2, the motion vector MV output from the motion vector detection circuit (17) is α
Therefore, the still image signal of the pixel P1 of the previous frame is read out from the frame delay circuit (18), and the binary motion amount signal M2 (= 0) is read out, and
The motion amount detection circuit (12) outputs the pixel P of the current frame.
A motion amount signal M1 (=approximately 1) of 2 is output. Furthermore,
Since the normal mode signal NM is "0", the data selector (10) selects the still image signal read out from the frame delay circuit (18), and the reproduced video signal VS2 of the pixel P2 is the previous frame. The still image signal of pixel P1 is substituted. That is, according to this example, when a pixel in the current frame is a moving pixel, a corresponding pixel in the previous frame is a still pixel, and the normal mode signal NM is "0", the reproduced video signal of the pixel in the current frame is V
S2 is replaced with the still image signal of the corresponding pixel of the previous frame. Therefore, even when a stationary object begins to move, the reproduced image of the object has a high resolution and is advantageous in that no blurring occurs.

Referring to FIG. 3, the motion vector detection circuit (17) of this example
To explain an example of the configuration of (2
6) is the delay time (1 frame period + 1 horizontal period (IH
) frame delay circuit with 11 clock periods (LD)), (
27) and (28) are delay circuits with a delay time of lH, respectively;
(29A) ~ (29[''), (30A) ~ (30C)
are delay circuits whose delay times are ID, respectively, and these delay circuits (27), (28), (29A) to (29C),
Using (30A) to (30C), the low frequency video signal V
A video signal of 9 pixels of 3 lines x 3 dots of the current frame is generated from S3, and its frame delay circuit (26)
A video signal of one pixel of the previous frame corresponding to the center pixel of the nine pixels of the current frame is generated from the signal VS3.

(31^) ~ (31C) are each three subtractors (32) ~
(34) shows a difference calculation circuit consisting of the upper stage difference calculation circuit (31A) that detects the minimum difference between the video signals of the three pixels of the first line of the current frame and the video signal of the center pixel of the previous frame. 3 of the second line of the current frame from the difference calculation circuit (31B) in the middle stage.
The difference between the video signal of each pixel and the video signal of the center pixel of the previous frame is supplied to the minimum detection circuit (35B),
The third difference calculation circuit (31C) of the current frame from the lower difference calculation circuit (31C)
The difference between the video signals of the three pixels of the line and the video signal of the center pixel of the previous frame is supplied to the minimum detection circuit (35C). The minimum detection circuit (35A> supplies the code CA of the pixel with the minimum absolute value among the three input differences and the absolute value ΔVA of the difference to the minimum detection circuit (36),
Similarly, the minimum detection circuits (35B) and (35C) detect the codes CB and CC of the pixel with the minimum absolute value of the difference, and the absolute values ΔVB and ΔVC of the difference, respectively.
).

Fig. 4 shows an example of the configuration of the minimum detection circuit (35^), and in Fig. 4, the first difference input INI is connected to the absolute value circuit (35^).
37) to one input of the data selector (38) and the non-inverting input of the comparison circuit (39), and the second differential input IN2 is supplied to the data selector (38) via the absolute value circuit (40). ) and the inverting input of the comparator (39), and the output of the data selector (38) is supplied to the non-inverting input of the comparator (42) and the data selector (39).
44) and the third differential input IN3
is supplied to the inverting input of the comparison circuit (42) and the other input of the data selector (44) via the absolute value circuit (41). The output S of the comparison circuit (39) is then input to the control signal input section of the data selector (38) and the code conversion circuit (
43), and the output T of the comparison circuit (42) is supplied to the control signal input section of the data selector (44) and the code conversion circuit (
43) and output stage 1 data selector (44).
From then on, the absolute value ΔVA of the one whose absolute value is the smallest among the three differential inputs is multiplied by a.

In addition, the code conversion circuit (43) corresponds to the two human inputs S and T and converts the 2-bit code C determined by the relationship shown in FIG.
Generate A (CAO, CAL). That is, the one with the smallest absolute value among the three differential inputs is the INI.

IN2. When it becomes IN3, a 2-bit code (C
A.O.

CAI) are (1,1), (0,0), (0,1
)become. This code represents -1, 0, +l as two's complement numbers.

Note that the 2-bit code CA is transmitted by a 2-bit path line, and other signals such as INI and ΔVA are transmitted by 1 in the drawing.
Although it is transmitted by a bit path line, INI and ΔV
A and the like are multi-bit data, and these are actually transmitted using multi-bit pass lines.

FIG. 6 shows an example of the configuration of the minimum detection circuit (36). In this FIG. CC is supplied to the data selector (45B), and the absolute value of the difference ΔVA is
is supplied to the non-inverting input part of the comparator circuit (47) and one input part of the data selector (46A), and the absolute value ΔVB is supplied to the inverting input part of the comparator circuit (47) and one input part of the data selector (46A).
6A). Further, the output of the data selector (46^) is supplied to one input part of the data selector (46B) and the non-inverting input part of the comparator circuit (48), and the absolute value ΔVC is supplied to the inverting input part of the comparator circuit (48) and The output of the data selector (46B) is supplied to the non-inverting input of the comparison circuit (49), and the output of the data selector (46B) is supplied to the non-inverting input of the comparison circuit (49).
) is supplied with a constant level reference signal REF to the inverting input section of the comparator circuit (47), and the data selector (45A) is
and (46^), and controls the switching of the comparison circuit (48).
The switching of the data selector (45B) is controlled by the output of , and the outputs S and T of the comparison circuits (47) and (48) are respectively supplied to the code conversion circuit (50).

From this code conversion circuit (50), a 2-bit code MVX (MV
XO, MVXI) Power generation thread, data selector (45
From B), a 2-bit code MVY (MVYO, MVYO,
MVYl) is output. These 2-bit code MV
X and MVY represent the vertical component and horizontal component of the motion vector MV of the pixel to be reproduced, respectively, in pixel units. Further, the normal mode signal NM, which is the output of the comparison circuit (49), has the absolute value of the difference ΔVA to Δ
When the minimum absolute value of VC is smaller than the reference signal REF, it becomes "0", and when the absolute value is greater than or equal to the reference signal, it becomes "1".

As mentioned above, the motion vector detection circuit (1
In 7), the video signals of 9 pixels of 3 lines x 3 dots of the current frame are compared with the video signal of the center pixel of the previous frame, and the video signal that is closest to the video signal of the pixels of the previous frame is compared. The code of the pixel of the current frame is detected, and this detected code is taken as the motion vector MV of the central pixel among the nine pixels of the current frame. Therefore, the vertical and horizontal components of the motion vector MV are each 0. +1. -1. Furthermore, by expanding the example in Fig. 3, the detection range of the motion vector MV can be easily set to ±n pixels (n=2°3, . . .
) can be expanded.

The AND circuit (21^) and OR circuit (21B) in the example in Figure 1
) To specifically explain the operation, it is assumed that the video signal VSI of the (n-2)th frame to (n+3)th frame to be processed is as shown in FIGS. 7A to 7F. This is a waveform when a high-brightness object moves in parallel for a predetermined period of time, and correspondingly, a high-brightness video signal (64)
(The position of 7th t!IA> is from the nth frame to the (nth
+2) Parallel movement to the frame. Also, Figure 7A
, (65) corresponds to, for example, the edge of a low-luminance wall, and (66) is a video signal of a high-speed moving object, such as a car, appearing from the edge. In this case, the binary motion amount signal M2 in FIG. 1 becomes "1" almost randomly near the right side of the edge portion (65). The edge part (65
) is a nearly parallel shift, whereas the change in the signal on the right side of the edge portion (65) is irregular, so it is normal mode detected by the motion vector detection circuit (17). The signal NM becomes "0" on the left side of edge B (65) and becomes "1" near the right side of edge B (65).
"become.

8A-F show the states of the binary motion amount signal M2 and the output M4 of the OR circuit (21B) corresponding to FIGS. 7A-F, respectively, and the right end of FIG. 8 shows the normal mode signal N
Since M is "1", the output M4 also becomes "1" due to the action of the OR circuit (21B). Therefore, at the right end, the data selector (10) in FIG.
S is selected. Furthermore, the output M4 is an AND circuit (2
1A) and G), the binary motion amount signal M2 is written into the frame delay circuit (22) as a substantially signal M3.

On the other hand, since the signal NM is continuously "0" in the center part of FIG. 8, the signal read out from the frame delay circuit (22) becomes the output M4 as it is, and the AND circuit (21A) The AND output M3 of the output M4 and the signal M2 is written to the frame delay circuit (22). In this case, before the (n-1)th frame, the binary motion amount signal M2 is "0" in the center part of FIG.
After that, the frame delay circuit (22) is continuously filled with “0”.
is written, so the output M4 becomes "0" continuously in the central part, and the data selector (10) selects the signal read from the frame delay circuit (18).

Moreover, the binary motion amount signal M2 is as shown in FIG. 8 C-E.
No. 7B! ! It becomes "1" from the nth frame to the (n+2)th frame at the positions corresponding to both ends of the I signal (64).

Therefore, the video signal of the left end of the parallel-moving object in the n-th frame is <68). The signal (67) (FIG. 7B) is translated and substituted, but this still image signal (67) is again written to the frame delay circuit (18).
) Video signal (69) at the left end of the object in the frame (
As shown in FIG. 7D), the signal (68) written in the frame delay circuit (18) in the nth frame, that is, the (n-th)
1) The still image signal (67) written in the frame is substituted, and the still image of the (n-1)th frame is similarly used as the video signal (70) of the left end of the object in the (n=2)th frame. Signal (67) is substituted.

As described above, since the AND circuit (21A) is provided in this example, even if the first frame in which the object is stationary is followed by a series of frames in which the object moves in parallel, the "0" corresponding to the still image area is written into the frame delay circuit (22) as the binary motion amount signal M2 of the object in the frame following the first frame.

Therefore, the motion vector M
Since the high-resolution still image signal of the first frame is corrected by V and substituted as the video signal of the object, there is an advantage that so-called blur does not occur continuously in the reproduced image of the object.

Next, an example in which the calculation load of the motion vector detection circuit (17) of the example in FIG. 1 is lightened will be described with reference to FIG. 9.

The parts corresponding to those in FIG. 1 are designated by the same reference numerals.j1
In FIG. 9, the binary motion amount signal M2 output from the binarization circuit (20) is supplied to the negative logic manual section of the AND circuit (52) via the frame memo 'J (51), and the signal M2 is It is directly supplied to the positive logic input part of the AND circuit (52), and the output ΔM of the AND circuit (52) is supplied to the read address generation circuit (53).

In addition, the low-frequency video signal VS3 output from the low-pass filter (16) is stored in a buffer memory IJ of about the size of a frame memory.
(54) and its read address generation circuit (54).
3) is a buffer memo only in the area where the correction area where the output ΔM is “1” is expanded! The readout address of the video signal of the pixel currently being reproduced and the readout address of the video signal approximately one frame before the pixel corresponding to this pixel are time-extended and supplied to I (54).

In FIG. 9, the motion amount signal M1 of the current frame is the 10th
As shown in the figure, the motion amount signal Ml (10th
When the output ΔM of the AND circuit (52) is approximately translated in parallel to FIG. It becomes "1" only in a smaller area (correction area). That is, an area where the previous frame is a still area and the current frame is a moving image area becomes a correction area, and the detection of a motion vector for each pixel is performed only in an area where the correction area is expanded to a certain extent. Also, the AND circuit (5
The output M4 of the OR circuit (21B) in FIG. 1 may be supplied to the negative logic input section 2), and in this case, the motion vector is detected even after the object starts moving.

(17^) is, for example, the frame memory (26) from the example in Figure 3.
) is removed, and the motion vector detection circuit (5
5) indicates a buffer memory, and in the area including the correction area where the output ΔM is "1" (FIG. 11A), the motion vector detection circuit (17^) receives the two data read from the buffer memory (54). The video signal is time-axis expanded and supplied as shown in Figure 11, and the motion vector MV! is detected by this detection circuit (17A). Buffer memo (Figure 11C)!
Write to I (55). Then, according to the read address output from the read address generation circuit (53), the motion vector MVI is read out from the buffer memory (55) after compressing the time axis as shown in Figure 11. matches the motion vector MV of the example in FIG. The other configurations are the same as the example in FIG.

According to the example in FIG. 9, motion vector detection only needs to be performed when the previous frame is a still image area and the current frame is a moving image area. The amount can be significantly reduced (for example, to about 1/100). Therefore, the motion vector detection circuit (17A) may be an inexpensive logic circuit that operates at low speed or a DSP (Digital Signal Pr).
ocessor) etc., which has the advantage of reducing manufacturing costs.

Note that depending on the state of the image to be played back, even if a type of thinning processing is performed as shown in the example in Figure 9, the amount of calculations will be enormous and the processing speed may be insufficient. At least in this area, the quality of reproduced images will not be worse than that of conventional decoders.

Further, in the above embodiment, the motion vector detected for each pixel is used as is, but a circuit for averaging the motion vector may be provided as shown in FIG. 12. That is, in this FIG. 12, (56).

(57H and IH delay circuits, (58N~
(63) shows delay circuits each having a delay time of one clock period, and using these delay circuits, a motion vector detection circuit (
17) Horizontal component M of the motion vector output from
VY is generated for 9 pixels consisting of 3 lines x 3 dots.

These nine components MVY are averaged by an averaging circuit (71) to obtain a signal <MVY>.

Similarly, using the averaging circuit (72), the vertical component MVX of the motion vector output from the detection circuit (17) is averaged for 9 pixels to obtain a signal <MVX>, and these averaged motion vectors are Read address change circuit in Figure 1 (
19) and (23).

According to the example in FIG. 12, the motion vectors detected for each pixel include motion vectors that have a small correlation with surrounding motion vectors, as shown in FIG. 13A, due to the influence of noise, for example. Even in this case, averaging can increase the correlation between the motion vectors for each pixel as shown in FIG. 12B, and has the advantage of preventing erroneous detection of motion vectors. However, instead of averaging the motion vectors within a predetermined block, for example, a vector whose value is the median among the motion vectors within a predetermined block may be adopted.
Furthermore, a motion vector with the smallest absolute value among the motion vectors within a predetermined block may be used.

Furthermore, the motion vector detection circuit (17) in FIG. 1 may detect motion vectors for every other pixel, for example, instead of detecting motion vectors for all pixels on the screen. For example, n line x
1 for each block consisting of multiple pixels of m dots.
The motion vectors may be detected.

It goes without saying that the present invention is not limited to the above-mentioned embodiments, and that various configurations may be adopted without departing from the scope of the present invention, such as application to, for example, an EDTV system decoder.

[Effects of the Invention] According to the present invention, the readout address is adjusted according to the motion vector determined for each pixel, and the video signal reproduced in the video area is learned using the video signal read out from the image memory. This has the advantage of preventing the resolution of the reproduced image from decreasing due to video processing when a stationary object begins to move.

Furthermore, if the motion vector detection circuit calculates the motion vector only in the vicinity of the motion start area,
On average, the amount of calculation for motion vector detection can be significantly reduced, and an inexpensive circuit with low calculation speed can be used as the motion vector detection circuit.

Furthermore, if the motion vector detection circuit calculates the motion vector of the pixel to be reproduced from a plurality of motion vectors detected for each of a plurality of pixels in the vicinity of the pixel to be reproduced, Even if a motion vector with a low correlation with surrounding motion vectors is erroneously detected due to noise or the like, such a motion vector can be eliminated.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a MUSE method decoder according to an embodiment of the present invention, FIG. 2 is a diagram showing an example of a reproduced image according to the embodiment,
3 is a block diagram showing an example of the motion vector detection circuit (17), FIG. 4 is a block diagram showing an example of the minimum detection circuit (35A), and FIG. 5 is a diagram showing an example of code conversion. 6th
The figure is a configuration diagram showing an example of the minimum detection circuit (36), FIGS. 7 and 8 are signal waveform diagrams for explaining the operation of the example in FIG. 1, respectively, and FIG. 9 shows a modification of the embodiment. 10 and 11 are signal waveform diagrams for explaining the operation of the example in FIG. 9, respectively. FIG. 12 is a configuration diagram of the main part showing another modification of the embodiment, and FIG. The figure is a diagram for explaining the operation of the example in FIG. 12. (4) is an inter-frame interpolation circuit, (8) is an intra-field interpolation circuit, (10) is a data selector, (12) is a motion area detection circuit, (17) is a motion vector detection circuit, and (18) is a motion area detection circuit.
) is a frame delay circuit consisting of a frame memory, (19
) is a read address change circuit, (22) is a frame delay circuit, and (23) is a read address change circuit.

Claims (1)

[Claims] 1. A motion area detection circuit that detects whether an area to be reproduced is a still image area or a moving image area and generates a static-motion switching signal; In the still image area, a reproduction circuit reproduces the original video signal by superimposing video signals of multiple fields or multiple frames, and in the video area, reproduces the original video signal by interpolating the video signal of one field or one frame. A television receiver comprising: a motion vector detection circuit that determines a motion vector for each pixel to be reproduced; an image memory that stores the video signal reproduced in the previous frame; and a read address of the image memory that determines the motion vector determined above. a readout address changing circuit that adjusts according to the vector; a switching circuit that switches between a video signal reproduced in the moving image area and a video signal read out from the surface image memory; A setting circuit is provided to select a video signal read out from the image memory at a pixel where the current frame is in the video area in the area, and the previous frame is in the still image area and the current frame is in the video area. The television is characterized in that, in a certain pixel, a readout address is adjusted according to the determined motion vector so that the video signal read out from the image memory replaces the video signal reproduced in the video area. John receiver. 2. A detection circuit is provided that detects a motion start area where the previous frame is a still image area and the current frame is a video area using the static/motion switching signal, and the motion vector detection circuit detects only the movement start area in the vicinity of the movement start area. Claim 1 wherein the motion vector is determined.
The television receiver described. 3. The television according to claim 1, wherein the motion vector detection circuit calculates the motion vector of the pixel to be reproduced from a plurality of motion vectors detected for each of a plurality of pixels in the vicinity of the pixel to be reproduced. John receiver.