JPH0454874A - PWM signal generation circuit for inverter equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a PWM signal generation circuit for an inverter device.

[Conventional technology]

FIG. 3 shows a PWM signal generation circuit for a triangular wave comparison type single-phase PWM control inverter. In the figure, 1 is a microprocessor that outputs fundamental wave data, 2 is a latch signal generation circuit, 4 is a fundamental wave data latch circuit, 5 is a triangular wave data generation circuit, and 6a and 6b are comparison circuits for fundamental wave data and triangular wave data ( 7 is a TD creation circuit that creates a short-circuit prevention period. Also, 100 indicated by the dotted line is P
WM power voltage generation means.

Next, the operation will be explained with reference to the waveform diagram in FIG.

First, the fundamental wave data 14 output from the microprocessor 1 is controlled by the control signal from the microprocessor 1.
The fundamental wave data is latched by the latch circuit 4. On the other hand, a triangular wave data generation circuit 5 constituted by an up-down counter outputs triangular wave data 15 by counting the input clock CK. The latched fundamental wave data 14 and triangular wave data 15 are transferred to the next stage comparators 6a and 6.
The magnitude is compared by b, and the comparator 8 outputs 16 and 17 are obtained from the comparison result.

FIG. 5 is a time chart explaining the short-circuit prevention generation period, and the output 18 of the comparator 6a is shifted by a time t□ by the shift register of the TD creation circuit 7, and as a result, a shifted output 19 is obtained. The TD creation circuit 7 generates a P with a short-circuit prevention period (TD) 28 commensurate with the shift amount (t) 27 from the comparator output 18 and the shift output 19.
WM signals 20 and 21 are generated by logical operations.

[Problem to be solved by the invention]

The PWM signal generation circuit of a conventional inverter device is as follows.

With the above configuration, as shown in FIG. 6, if the data update amount 30 is large when updating the fundamental wave data 14, a narrow on-pulse 25 may occur. When the narrow width ON pulse 25 is generated, when setting the short circuit prevention period (TD) in the subsequent stage, the short circuit prevention period (TD) commensurate with the shift amount (t,) 29 can be obtained as shown in the time error 26. There is a problem in that the output transistor of the PWM inverter may cause an arm short circuit.

This invention was made to solve the above-mentioned problems, and an object thereof is to obtain a PWM signal generation circuit for an inverter device that does not generate unnecessary narrow width pulses when updating fundamental wave data. .

[Means to solve the problem]

The PWM signal generation circuit of the inverter device according to the present invention generates a PWM output voltage signal via a comparator from both the square wave fundamental wave data output from the microprocessor and the triangular wave data output from the triangular wave data generation circuit. A fundamental wave data latch circuit that latches the fundamental wave data according to a control signal of the microprocessor, a peak detection circuit that detects the peak value of the triangular wave data output from the triangular wave data generation circuit, and a peak detection circuit for detecting the peak value of the triangular wave data output from the triangular wave data generation circuit. A latch pulse generation circuit that generates a latch pulse based on an output signal of the circuit, and a latch circuit that latches the output signal of the fundamental wave data latch circuit with the latch pulse and outputs the latch data to a subsequent comparator. It was established.

[Effect]

The PWM signal generation circuit of the inverter device according to the present invention includes a two-stage latch circuit that latches fundamental wave data, detects the peak value of the triangular wave data output from the triangular wave data generation circuit with a peak detection circuit, and Since the fundamental wave data is latched into the subsequent latch circuit at the timing of , the fundamental wave data is always updated at the peak point of the triangular wave data on the comparator side.

[Embodiments of the invention]

An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1, the same parts as in FIG. 3 are designated by the same reference numerals. In FIG. Fundamental wave data latch circuit 4
10 is a peak detection circuit for the triangular wave data 15 output from the triangular wave data generation circuit 5, 9 is a latch pulse generation circuit, and 39 is a resistor R. This is a pulse delay circuit consisting of a capacitor C.

Next, the operation shown in FIG. 1 will be explained below with reference to the time chart shown in FIG. First, the fundamental wave data 14 latched by the fundamental wave data latch circuit 4 is transferred to the subsequent latch circuit 8.
is input to the AND circuit 4o, and enters a state of waiting for a latch pulse from the AND circuit 4o. At this point, the output data 14a of the latch circuit 8
The previously latched fundamental wave data 14 is output as is, and the data has not been updated yet. On the other hand, the triangular wave data peak detection circuit 1o detects the output peak value Tp of the triangular wave data 15 of the triangular wave data generating circuit 5. The edge of the detection signal of the peak value TP and the output of the pulse delay circuit 39 (here, the pulse delay time t3 is determined by the resistor R and capacitor C of the pulse delay circuit 39) are connected to each other by the latch pulse generation circuit 9. The output RP and the output CE of the latch signal generation circuit 2 are input to the AND circuit 40. The latch pulse 34, which is the output of the AND circuit 40, is then applied to the latch circuit 8 at the subsequent stage as a latch signal. Upon receiving this latch signal, the latch circuit 8 outputs updated data of the fundamental wave data to the next stage comparators 6a and 6b. In this way, on the input side of the comparators 6a and 6b, the fundamental wave data is updated in synchronization with the peak of the triangular wave data.

In the above embodiment, for convenience of explanation, a single-phase PWM control inverter was described, but a multi-phase inverter may also be used, and any device that employs high-frequency PWM control can achieve the same effects as the above embodiment. play.

〔Effect of the invention〕

As described above, according to the present invention, the latch circuit for latching the fundamental wave data is provided in a two-stage configuration, and when updating the fundamental wave data, the latch circuit in the subsequent stage is synchronized with the peak of the triangular wave data. Since the data is latched, there is no problem in setting the short-circuit prevention period, and unnecessary pulses are not generated even when the fundamental wave data changes significantly.
This has the effect of preventing arm short circuits.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram showing a PWM signal generation circuit according to an embodiment of the present invention, FIG. 2 is a waveform diagram of main parts showing the operation of FIG. 1, and FIG. 3 is a circuit diagram showing a conventional PWM signal generation circuit. figure,
Figure 4 is a conventional comparator output waveform diagram, Figure 5 is a conventional short circuit prevention period generation timing diagram, and Figure 6 is a conventional PW diagram.
FIG. 3 is a timing chart of M signal generation. In the figure, 1 is a microprocessor, 4 is a fundamental wave data latch circuit, 5 is a triangular wave data generation circuit, 6a, 6b
1 is a comparator (comparison circuit), 9 is a latch pulse generation circuit, 8 is a latch circuit, and 10 is a peak detection circuit. In addition, in the figures, the same reference numerals indicate the same or equivalent parts. No. 31a (2 other people) No. 36 (PWM phase code) J Toshi] No. 18 (Conhaler router output) 20 (PWMJ word) 28 (Short circuit period)

Claims (1)

[Claims] In the PWM signal generation circuit of an inverter device which obtains a PWM output voltage signal via a comparator from both data of rectangular wave fundamental wave data outputted from the microprocessor and triangular wave data outputted from the triangular wave data generation circuit, the microprocessor a fundamental wave data latch circuit that latches the fundamental wave data according to a control signal; a peak detection circuit that detects the peak value of the triangular wave data output from the triangular wave data generation circuit; and a peak detection circuit that detects the peak value from the output of the peak detection circuit. and a latch circuit that latches the output signal of the fundamental wave data latch circuit using the latch pulse and provides the latch data to a subsequent comparator. A PWM signal generation circuit for an inverter device.