JPH0454969B2 - - Google Patents

Info

Publication number
JPH0454969B2
JPH0454969B2 JP57191059A JP19105982A JPH0454969B2 JP H0454969 B2 JPH0454969 B2 JP H0454969B2 JP 57191059 A JP57191059 A JP 57191059A JP 19105982 A JP19105982 A JP 19105982A JP H0454969 B2 JPH0454969 B2 JP H0454969B2
Authority
JP
Japan
Prior art keywords
crystal layer
crystal
semiconductor device
cdte
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57191059A
Other languages
Japanese (ja)
Other versions
JPS5979582A (en
Inventor
Tomoshi Ueda
Mitsuo Yoshikawa
Michiharu Ito
Kenji Maruyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP57191059A priority Critical patent/JPS5979582A/en
Publication of JPS5979582A publication Critical patent/JPS5979582A/en
Publication of JPH0454969B2 publication Critical patent/JPH0454969B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/22Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
    • H10F30/221Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PN homojunction
    • H10F30/2212Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PN homojunction the devices comprising active layers made of only Group II-VI materials, e.g. HgCdTe infrared photodiodes

Landscapes

  • Weting (AREA)
  • Light Receiving Elements (AREA)

Description

【発明の詳細な説明】 (a) 発明の技術分野 本発明は半導体素子の製造方法に係り、特にカ
ドミウム・テルルからなる半導体基板上に形成さ
れた水銀・カドミウム・テルルからなる半導体結
晶層に赤外線検知用の半導体素子を形成する方法
の改良に関するものである。
[Detailed Description of the Invention] (a) Technical Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular, infrared rays are applied to a semiconductor crystal layer made of mercury, cadmium, and tellurium formed on a semiconductor substrate made of cadmium and tellurium. The present invention relates to an improvement in a method of forming a semiconductor element for sensing.

(b) 技術の背景 赤外線検知用の半導体素子の一種として、エネ
ルギーギヤツプの狭い水銀・カドミウム・テルル
(Hg1-xCdxTe)からなる半導体結晶に形成され
たPN接合部分に入射した光により起電力が発生
する光起電力特性を利用して赤外線を検出する光
起電力型赤外線検知素子が知られている。このよ
うな赤外線検知素子の製造には、従来例えばブリ
ツジマン結晶成長法によつて形成されたHg1-x
CdxTeからなる半導体基板が素子形成材料として
用いられる。しかし近年さらに結晶性のよい
Hg1-xCdxTeからなる半導体結晶を用いて検知特
性のよい赤外線検知素子を得るために、例えば、
CdTeからなる半導体基板上にエピタキシヤル成
長法によつてHg1-xCdxTeからなる結晶成長層を
形成し、かかる結晶成長層に検知素子を形成する
方法が提案されている。
(b) Background of the technology As a type of semiconductor element for infrared detection, an infrared ray is incident on a PN junction formed in a semiconductor crystal made of mercury, cadmium, tellurium (Hg 1-x Cd x Te) with a narrow energy gap. 2. Description of the Related Art Photovoltaic infrared sensing elements are known that detect infrared rays by utilizing the photovoltaic property of generating electromotive force due to light. In the production of such infrared sensing elements, Hg 1-x
A semiconductor substrate made of Cd x Te is used as the element forming material. However, in recent years, crystallinity has become even better.
In order to obtain an infrared sensing element with good sensing characteristics using a semiconductor crystal consisting of Hg 1-x Cd x Te, for example,
A method has been proposed in which a crystal growth layer made of Hg 1-x Cd x Te is formed on a semiconductor substrate made of CdTe by an epitaxial growth method, and a sensing element is formed in the crystal growth layer.

(c) 従来技術と問題点 ところで上記した結晶成長層に検知素子を形成
する従来の方法としては、第1図に示すように例
えばCdTeからなる半導体結晶基板1上にエピタ
キシヤル成長法等によつてHg1-xCdxTeからなる
結晶成長層2を形成する。次に該結晶成長層2上
に硫化亜鉛(ZnS)からなる絶縁膜3を被着し、
その上面にさらにフオトレジスト膜4を塗着し、
該フオトレジスト膜4を所定のパターンにパター
ニングする。そして第2図に示すようにパターニ
ングしたフオトレジスト膜4をマスクにして前記
結晶成長層2表面の所定面積領域5に対応した絶
縁膜3を選択的にエツチング除去して結晶成長層
2上に絶縁膜3からなる不純物拡散マスクを形成
する。しかる後前記フオトレジスト膜4を除去
し、第3図に示すように前記結晶成長層2表面の
所定面積領域5に前記絶縁膜3からなる拡散マス
クを通して不純物を拡散して結晶成長層2と逆導
電形の素子活性領域6を形成し、次いで、前記絶
縁膜3を一旦全面的に除去した後、前記結晶成長
層2の全表面上に第4図に示すように再びZnSか
らなる絶縁保護膜7を被着し、かかる絶縁保護膜
7の所定部分に選択的に電極接続孔8を設け、か
かる接続孔8を介して前記素子活性領域6と接続
された電極9が絶縁膜7上に配設されて素子を形
成している。
(c) Prior art and problems By the way, as a conventional method for forming a sensing element in the above-mentioned crystal growth layer, as shown in FIG. A crystal growth layer 2 made of Hg 1-x Cd x Te is then formed. Next, an insulating film 3 made of zinc sulfide (ZnS) is deposited on the crystal growth layer 2,
A photoresist film 4 is further applied on the top surface,
The photoresist film 4 is patterned into a predetermined pattern. Then, as shown in FIG. 2, using the patterned photoresist film 4 as a mask, the insulating film 3 corresponding to a predetermined area 5 on the surface of the crystal growth layer 2 is selectively removed by etching to insulate the crystal growth layer 2. An impurity diffusion mask consisting of film 3 is formed. Thereafter, the photoresist film 4 is removed, and as shown in FIG. A conductive type element active region 6 is formed, and then, after the insulating film 3 is completely removed, an insulating protective film made of ZnS is again formed on the entire surface of the crystal growth layer 2 as shown in FIG. An electrode connecting hole 8 is selectively formed in a predetermined portion of the insulating protective film 7, and an electrode 9 connected to the element active region 6 through the connecting hole 8 is disposed on the insulating film 7. are arranged to form an element.

ところが上記従来の製造方法にあつては、前記
結晶成長層2上に、素子活性領域6を形成するた
めの不純物拡散マスク用の絶縁膜3を被着した
り、また該素子活性領域6の形成後に前記絶縁膜
3上にさらにZnSからなる絶縁膜を重ねて被着す
ると剥離しやすいことから前記絶縁膜3を一旦除
去していることから、これらの工程によつて結晶
成長層2の表面が汚染されたり、また上記工程が
煩雑化する欠点を有していた。
However, in the conventional manufacturing method described above, an insulating film 3 for use as an impurity diffusion mask for forming the element active region 6 is deposited on the crystal growth layer 2, and the formation of the element active region 6 is If an insulating film made of ZnS is later deposited on top of the insulating film 3, it will easily peel off, so the insulating film 3 is removed once, so the surface of the crystal growth layer 2 is This method has the drawbacks of contamination and complication of the above steps.

(d) 発明の目的 本発明は上記従来の欠点を解消するため、基板
上に、素子形成用の結晶成長層と、素子活性領域
を形成するための不純物拡散マスク用の高抵抗な
結晶層を順に連続して積層形成するようにし、か
かる高抵抗な結晶層によつて前記素子形成用の結
晶成長層の汚染を低減すると共に素子形成工程を
簡単化し得る新規なる半導体素子の製造方法を提
供することを目的とするものである。
(d) Purpose of the Invention In order to eliminate the above-mentioned conventional drawbacks, the present invention provides a crystal growth layer for forming an element and a high-resistance crystal layer for an impurity diffusion mask for forming an active region of the element on a substrate. To provide a novel method for manufacturing a semiconductor element, in which the crystal growth layer for forming the element is reduced from contamination by the high-resistance crystal layer, and the element forming process is simplified, by sequentially forming layers in succession. The purpose is to

(e) 発明の構成 そしてこの目的は本発明によれば、半導体基板
上に水銀・カドミウム・テルル(Hg1-xCdxTe)
からなる第1の結晶層と、カドミウム・テルル
(CdTe)からなる第2の結晶層を順次積層形成
した後、前記第1の結晶層表面の所定面積領域に
対応した第2の結晶層を弗酸(HF)と硝酸
(HNO3)と氷酢酸(CH3COOH)および水
(H2O)とを容量比で2〜5:3〜5:6:6の
割合で混合してなるエツチング液によつて選択的
にエツチング除去して該領域表面を露出せしめ、
前記第2の結晶層をマスクにして前記第1の結晶
層の露出面に半導体素子を形成するようにしたこ
とを特徴とする半導体素子の製造方法を提供する
ことによつて達成される。
(e) Structure of the invention According to the present invention, this object is to provide mercury, cadmium, tellurium (Hg 1-x Cd x Te) on a semiconductor substrate.
After sequentially laminating a first crystal layer made of cadmium telluride (CdTe) and a second crystal layer made of cadmium telluride (CdTe), a second crystal layer corresponding to a predetermined area on the surface of the first crystal layer is formed by fluorolayering. Etching liquid made by mixing acid (HF), nitric acid (HNO 3 ), glacial acetic acid (CH 3 COOH) and water (H 2 O) in a volume ratio of 2 to 5:3 to 5:6:6. selectively etching it away to expose the surface of the region;
This is achieved by providing a method for manufacturing a semiconductor device, characterized in that a semiconductor device is formed on an exposed surface of the first crystal layer using the second crystal layer as a mask.

(f) 発明の実施例 以下図面を用いて本発明による製造方法の実施
例について詳細に説明する。
(f) Examples of the invention Examples of the manufacturing method according to the invention will be described in detail below with reference to the drawings.

第5図乃至第8図は本発明に係る赤外線検知用
の半導体素子の製造方法の一実施例を工程順に示
す要部断面図である。なお以下の各図において第
1図乃至第4図と同等部分には同一符号を付し
た。
FIGS. 5 to 8 are sectional views of essential parts showing, in order of steps, an embodiment of the method for manufacturing a semiconductor element for infrared detection according to the present invention. Note that in each of the following figures, parts equivalent to those in FIGS. 1 to 4 are given the same reference numerals.

まず第5図に示すようにCdTeからなる半導体
基板1上に、エピタキシヤル成長法等によつて
Hg1-xCdxTeからなる第1の結晶層2と、保護層
としての高抵抗なCdTeからなる第2の結晶層2
1を順次積層形成する。次いでかかる第2の結晶
層21の上面に第6図に示すようにレジスト膜4
を塗着し、該レジスト膜4を所定のパターンにパ
ターニングした後、そのパターニングしたレジス
ト膜4をマスクにして第7図に示すように前記第
1の結晶層2表面の所定面積領域5に対応した第
2の結晶層21の部分のみを選択的にエツチング
除去して該領域表面を露出せしめる。この選択エ
ツチングに用いられるエツチング液としては、弗
酸(HF)と硝酸(HNO3)と氷酢酸
(CH3COOH)および水(H2O)とを容量比で2
〜:3〜5:6:6の割合で混合されたものであ
り、Hg1-xCdxTeからなる結晶層2に対しては不
溶で、CdTe結晶層21のみを効果的に溶解する
特性を有している。そして上記エツチング液の調
合薬品としては、弗酸がHF含有量50重量%、硝
酸がHNO3含有量36重量%、および氷酢酸が
CH3COOH含有量100重量%のものを用いるのが
好ましい。引続いて、第8図に示すように前記第
2の結晶層21をマスクにして露出した第1の結
晶層2に例えばイオン注入法あるいは熱拡散法に
よつて不純物を拡散し、該結晶層2と逆導電形の
素子活性領域6を形成する。しかる後、前記露出
した第1の結晶層2表面を含む第2の結晶層21
上に図示しないZnS等からなる絶縁膜を被着形成
し、従来例の如く絶縁膜に設けた電極接続穴を通
して前記素子活性領域6と接続された電極を前記
絶縁膜に設けるようにすれば、素子形成工程が簡
単化されると共に、上記パターニング工程あるい
はその後の工程における第1の結晶層2表面の汚
染が第2の結晶層21によつて保護されて大幅に
低減することが可能となり、検知特性のよい素子
が形成されることになる。
First, as shown in FIG.
A first crystal layer 2 made of Hg 1-x Cd x Te and a second crystal layer 2 made of high-resistance CdTe as a protective layer.
1 are sequentially laminated. Next, a resist film 4 is formed on the upper surface of the second crystal layer 21 as shown in FIG.
After coating the resist film 4 and patterning it into a predetermined pattern, the patterned resist film 4 is used as a mask to cover a predetermined area 5 on the surface of the first crystal layer 2, as shown in FIG. Only the portion of the second crystal layer 21 that has been removed is selectively etched away to expose the surface of the region. The etching solution used for this selective etching consists of hydrofluoric acid (HF), nitric acid (HNO 3 ), glacial acetic acid (CH 3 COOH), and water (H 2 O) in a volume ratio of 2.
~:3~5:6:6 ratio, is insoluble in the crystal layer 2 consisting of Hg 1-x Cd x Te, and has the property of effectively dissolving only the CdTe crystal layer 21. have. The chemicals used in the etching solution include hydrofluoric acid with a HF content of 50%, nitric acid with a HNO3 content of 36%, and glacial acetic acid.
It is preferable to use one with a CH 3 COOH content of 100% by weight. Subsequently, as shown in FIG. 8, using the second crystal layer 21 as a mask, impurities are diffused into the exposed first crystal layer 2 by, for example, ion implantation or thermal diffusion. An element active region 6 having a conductivity type opposite to that of 2 is formed. After that, a second crystal layer 21 including the exposed surface of the first crystal layer 2 is formed.
If an insulating film made of ZnS or the like (not shown) is deposited on the insulating film, and an electrode connected to the element active region 6 is provided in the insulating film through an electrode connection hole provided in the insulating film as in the conventional example, The device formation process is simplified, and contamination on the surface of the first crystal layer 2 during the patterning process or the subsequent process is protected by the second crystal layer 21 and can be significantly reduced, making it possible to detect A device with good characteristics will be formed.

(g) 発明の効果 以上の説明から明からなように、本発明に係る
半導体素子の製造方法によれば、従来不可能であ
つたCdTe結晶層の選択エツチングが容易化され
ることにより、半導体基板上に設けられたHg1-x
CdxTeからなる結晶層に素子活性領域を形成する
のに不純物拡散用マスクとして表面保護作用を有
する高抵抗なCdTeからなる結晶成長層を用いる
ことが可能となり、素子形成工程が簡単化される
と共に、該工程において素子形成用の結晶層表面
の汚染が大幅に低減される利点を有し、検知特性
のよい赤外線検知用の半導体素子を容易に得るこ
とができる。なお以上の実施例において用いられ
ているCdTe結晶の選択エツチング液は、本発明
に係る製造方法に適用するほか、CdTe基板上に
エピキチシヤル成長法によつて形成された例えば
Hg1-xCdxTeからなる結晶層からなる結晶性(面
方位等)の評価プロセス等において、CdTe基板
を選択的にエツチングするのに適用しても極めて
有利である。
(g) Effects of the Invention As is clear from the above explanation, the method for manufacturing a semiconductor device according to the present invention facilitates selective etching of a CdTe crystal layer, which was previously impossible. Hg 1-x provided on the substrate
When forming a device active region in a crystal layer made of Cd x Te, it becomes possible to use a crystal growth layer made of CdTe, which has a high resistance and has a surface protection effect, as a mask for impurity diffusion, which simplifies the device formation process. In addition, this process has the advantage that contamination on the surface of the crystal layer for forming the element is significantly reduced, and a semiconductor element for infrared detection with good detection characteristics can be easily obtained. The selective etching solution for CdTe crystals used in the above examples can be applied to the manufacturing method according to the present invention as well as for etching crystals formed by epitaxial growth on CdTe substrates.
It is also extremely advantageous to apply this method to selectively etching a CdTe substrate in a process for evaluating crystallinity (plane orientation, etc.) of a crystal layer consisting of Hg 1-x Cd x Te.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第4図は従来の赤外線検知用半導体
素子の製造方法を工程順に説明する要部断面図、
第5図乃至第8図は本発明に係る赤外線検知用半
導体素子の製造方法を工程順に示す要部断面図で
ある。 図面において、1は半導体基板、2はHg1-x
CdxTeからなる第1の結晶層、4はレジスト膜、
5は所定面積領域、6は素子活性領域、21は
CdTeからなる第2の結晶層を示す。
FIGS. 1 to 4 are sectional views of main parts illustrating a conventional method of manufacturing a semiconductor device for infrared detection in the order of steps;
5 to 8 are cross-sectional views of main parts showing the method for manufacturing an infrared sensing semiconductor device according to the present invention in order of steps. In the drawing, 1 is a semiconductor substrate, 2 is Hg 1-x
A first crystal layer made of Cd x Te, 4 a resist film,
5 is a predetermined area area, 6 is an element active area, and 21 is a predetermined area area.
A second crystal layer made of CdTe is shown.

Claims (1)

【特許請求の範囲】[Claims] 1 半導体基板上に水銀・カドミウム・テルル
(Hg1-xCdxTe)からなる第1の結晶層と、カド
ミウム・テルル(CdTe)からなる第2の結晶層
を順次積層形成した後、前記第1の結晶層表面の
所定面積領域に対応した第2の結晶層を弗酸
(HF)と硝酸(HNO3)で氷酢酸(CH3COOH)
および水(H2O)とを容量比で2〜5:3〜
5:6:6の割合で混合してなるエツチング液に
よつて選択的にエツチング除去して該領域表面を
露出せしめ、前記第2の結晶層をマスクにして前
記第1の結晶層の露出面に半導体素子を形成する
ようにしたことを特徴とする半導体素子の製造方
法。
1 After sequentially laminating a first crystal layer made of mercury/cadmium/tellurium (Hg 1-x Cd x Te) and a second crystal layer made of cadmium/tellurium (CdTe) on a semiconductor substrate, A second crystal layer corresponding to a predetermined area on the surface of the first crystal layer is treated with glacial acetic acid (CH 3 COOH) using hydrofluoric acid (HF) and nitric acid (HNO 3 ).
and water (H 2 O) in a volume ratio of 2 to 5:3 to
The exposed surface of the first crystal layer is selectively etched away using an etching solution mixed in a ratio of 5:6:6 to expose the surface of the region, and the exposed surface of the first crystal layer is removed using the second crystal layer as a mask. 1. A method for manufacturing a semiconductor device, characterized in that the semiconductor device is formed in the form of a semiconductor device.
JP57191059A 1982-10-29 1982-10-29 Manufacture of semiconductor element Granted JPS5979582A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57191059A JPS5979582A (en) 1982-10-29 1982-10-29 Manufacture of semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57191059A JPS5979582A (en) 1982-10-29 1982-10-29 Manufacture of semiconductor element

Publications (2)

Publication Number Publication Date
JPS5979582A JPS5979582A (en) 1984-05-08
JPH0454969B2 true JPH0454969B2 (en) 1992-09-01

Family

ID=16268199

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57191059A Granted JPS5979582A (en) 1982-10-29 1982-10-29 Manufacture of semiconductor element

Country Status (1)

Country Link
JP (1) JPS5979582A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61188976A (en) * 1985-02-16 1986-08-22 Fujitsu Ltd Semiconductor element
JPH01223779A (en) * 1988-03-03 1989-09-06 Toshiba Corp Infrared ray detector
US4956304A (en) * 1988-04-07 1990-09-11 Santa Barbara Research Center Buried junction infrared photodetector process

Also Published As

Publication number Publication date
JPS5979582A (en) 1984-05-08

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