JPH0455575U - - Google Patents
Info
- Publication number
- JPH0455575U JPH0455575U JP9773890U JP9773890U JPH0455575U JP H0455575 U JPH0455575 U JP H0455575U JP 9773890 U JP9773890 U JP 9773890U JP 9773890 U JP9773890 U JP 9773890U JP H0455575 U JPH0455575 U JP H0455575U
- Authority
- JP
- Japan
- Prior art keywords
- trigger signal
- outputs
- trigger
- reference voltage
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Semiconductor Integrated Circuits (AREA)
Description
第１図は本考案の一実施例のブロツク図、第２
図は本考案の他の実施例のブロツク図、第３図は
従来のトリガ回路のブロツク図、第４図は従来の
他のトリガ回路のブロツク図である。
１……高周波用トリガ信号入力端子、２……ト
リガ回路、３……マルチバイブレータ、４，６…
…比較器、５……低周波用トリガ信号入力端子、
７……セレクタ、８……トリガパルス出力端子、
１１……トリガ信号入力端子、１２……増幅器。
Fig. 1 is a block diagram of an embodiment of the present invention;
3 is a block diagram of another embodiment of the present invention, FIG. 3 is a block diagram of a conventional trigger circuit, and FIG. 4 is a block diagram of another conventional trigger circuit. 1... High frequency trigger signal input terminal, 2... Trigger circuit, 3... Multivibrator, 4, 6...
...Comparator, 5...Low frequency trigger signal input terminal,
7... Selector, 8... Trigger pulse output terminal,
11...Trigger signal input terminal, 12...Amplifier.
Claims (1)
のトリガ信号入力端子１１と、 入力されたトリガ信号を所望の分割比で２回路
に分割して信号を出力するパワースプリツタ機能
を有する第１の分圧回路を構成する第１の抵抗Ｒ
１，Ｒ５と、第２の抵抗Ｒ２，Ｒ６及び第２の分
圧回路を構成する第３の抵抗Ｒ３，Ｒ７と第４の
抵抗Ｒ４，Ｒ８と、 前記第１の分圧回路からのトリガ信号を基準電
圧と比較し該基準電圧を超えた時にトリガ信号を
出力する第１の比較器６と、 前記第２の分圧回路からのトリガ信号を該トリ
ガ信号に同期して分周し低い周波数の信号を出力
する分周手段３と、 該分周手段３の出力のトリガ信号を基準電圧と
比較し該基準電圧を超えた時にトリガ信号を出力
する第２の比較器４と、 前記第１の比較器６と前記第２の比較器４の出
力トリガパルスのいずれかを選択して出力するセ
レクタ７とを具備することを特徴とするトリガ回
路。[Claims for Utility Model Registration] One trigger signal input terminal 11 that inputs trigger signals of all frequencies, and a power spring that divides the input trigger signal into two circuits at a desired division ratio and outputs the signal. A first resistor R constituting a first voltage dividing circuit having a vine function
1 , R 5 , second resistors R 2 , R 6 , third resistors R 3 , R 7 and fourth resistors R 4 , R 8 forming a second voltage dividing circuit; a first comparator 6 that compares the trigger signal from the voltage divider circuit with a reference voltage and outputs a trigger signal when the reference voltage is exceeded; and a trigger signal from the second voltage divider circuit that is synchronized with the trigger signal. a frequency dividing means 3 which divides the frequency and outputs a low frequency signal; and a second comparison circuit which compares the trigger signal output from the frequency dividing means 3 with a reference voltage and outputs a trigger signal when it exceeds the reference voltage. 4; and a selector 7 that selects and outputs either one of the output trigger pulses of the first comparator 6 and the second comparator 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9773890U JPH0455575U (en) | 1990-09-18 | 1990-09-18 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9773890U JPH0455575U (en) | 1990-09-18 | 1990-09-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0455575U true JPH0455575U (en) | 1992-05-13 |
Family
ID=31838380
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9773890U Pending JPH0455575U (en) | 1990-09-18 | 1990-09-18 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0455575U (en) |
-
1990
- 1990-09-18 JP JP9773890U patent/JPH0455575U/ja active Pending
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