JPH0457095B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a MOS type semiconductor device, and particularly to a method of forming a self-aligned gate electrode.

[Conventional technology]

Semiconductor integrated circuits have become highly integrated in recent years, and finer patterns are now required. Accordingly, the gate electrodes of MOS devices are also required to be miniaturized, and electrodes with low resistance are required.
Figures 2a to 2d are cross-sectional views showing the main stages of a conventional self-aligned ate electrode manufacturing method. In the figures, 1 is a semiconductor substrate, and 2 is a gate insulating film. thin oxide film, 3
4 is a polycrystalline silicon layer, 4 is a gate sidewall insulating film, and 5 is a polycrystalline silicon layer.
6 is an electrode metal film, and 6 is Si in the metal film 5 after heat treatment.
This is a silicide region formed by the diffusion of

A conventional method for forming a gate electrode by self-alignment is as follows. First, an oxide film 2 and an impurity-doped polycrystalline silicon layer 3 are formed on a semiconductor substrate 1, and selectively etched to leave desired portions. Next, an oxide film is deposited from above and the gate sidewall insulating film 4 is formed by dry etching the entire surface. [Figure 2a]. Next, an electrode material metal film 5 is formed on the above pattern (FIG. 2b). Next, by heat treatment, sauce,
Diffusion of Si from the base of the drain and gate portions into the metal film 5 is caused to form a silicide portion 6 [FIG. 2c]. Finally, the metal film 5 other than the silicide portion 6 is removed using an etching solution to form source, drain, and gate electrodes (FIG. 2d).

[Problem that the invention seeks to solve]

In conventional self-aligned gate electrode formation, if the impurity concentration N _D of the polycrystalline silicon film is large, the silicidation reaction rate becomes slow. In addition, if the heat treatment time is long, the diffusion of Si from the source and drain parts will reach the top of the SiO ₂ part of the sidewall, causing shorts with the gate, making it impossible to realize a gate electrode with lower resistance. There was a problem.

This invention was made in order to solve the above-mentioned problems, and it is possible to realize a gate electrode with lower resistance and shorten the heat treatment time, so there is no shortening between the source, drain, and gate.
Another object of the present invention is to obtain a method for manufacturing a semiconductor device that prevents impurities in the source region and drain region from widely diffusing.

[Means to solve the problem]

The manufacturing method according to the present invention includes a step of selectively implanting ions (such as silicon ions) into a region to become a gate electrode after forming a metal film as an electrode material.

[Effect]

In the manufacturing method of the present invention, silicon ions are selectively implanted into the electrode material metal film only at the gate portion, so that the silicon ions enter the metal surface of the gate portion, and in the heat treatment process, the base and surface of the gate portion are bonded. Since silicon diffuses from both sides, the final cross-sectional area of the gate electrode becomes larger than that of the conventional method, and by using polycrystalline silicon with a high concentration of impurities, it becomes possible to form a gate electrode with lower resistance.

[Embodiment of the Invention] Figures 1 a to e are cross-sectional views showing the state at the main stages to explain a method according to an embodiment of the present invention, and Figure 2 shows the same reference numerals as in the conventional example indicating equivalent parts. . First, an oxide film 2 is formed on a semiconductor substrate 1, and a polycrystalline silicon layer 3 doped with impurities at a conventional concentration or a high concentration of impurities is formed on the oxide film 2, and then selectively etched to remove desired portions. leave.
Next, an oxide film is stacked on top, and the gate sidewall insulating film 4 is formed by dry etching the entire surface (FIG. 1a). Next, electrode material metal (Mo, Ta, W, Ti
etc.) A film 5 is formed on the above pattern [first
Figure b]. Si ions are selectively implanted into the gate portion of the electrode material metal film 5 through a mask or with a maskless focused ion beam (as shown in the figure) at an acceleration energy of 50 keV to form 10 ¹⁴ Si ions/cm ² in the ion implantation area. 7 [Fig. 1c]. Then 600-650℃
By heat treatment at a temperature of , silicidation is performed by diffusion of Si into the metal. At this time, since Si diffuses from the surface and the underlying layer of the gate portion, silicidation becomes faster than before, and the area of the silicide portion 6 also becomes larger (FIG. 1d). Finally, by removing parts other than the silicide portion 6 using an etching solution (NH ₄ OH + H ₂ O + H ₂ O) for the metal film 5, the source, drain, and gate electrodes are formed [Fig. 1e] ].

In the above embodiment, a polycrystalline silicon film is used, but high melting point metals such as Mo, Ta, W, and Ti may also be used, and the same effects as in the above embodiment can be obtained.

〔Effect of the invention〕

As described above, according to the present invention, a step of selectively implanting Si ions into the electrode material metal film only in the gate region can shorten the heat treatment time, and also eliminate the need for high-concentration polycrystalline silicon. can be used,
This has the effect of making it possible to create a gate electrode with lower resistance and having fewer shorts between the source, drain, and gate.

[Brief explanation of drawings]

1A to 1E are cross-sectional views showing the main stages of a method according to an embodiment of the present invention, and FIGS. 2A to 2D are cross-sectional views showing the main stages of a conventional self-aligned gate electrode forming method. be. In the figure, 1 is a semiconductor substrate, 2 is a first insulating film (oxide film), 3 is a polycrystalline silicon layer, 4 is a gate sidewall insulating film, 5 is a metal film, 6 is a metal silicide part, and 7 is silicon ion implantation. , is a focused ion beam. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Scope of Claims] 1. A first insulating film is formed on a semiconductor substrate, and a polycrystalline silicon layer into which an impurity is introduced is formed on the first insulating film, and the polycrystalline silicon layer and the first insulating film are formed on the semiconductor substrate.
a step of selectively removing an insulating film to form a gate pattern, covering the semiconductor substrate including the gate pattern with a second insulating film, and anisotropically etching the second insulating film to form a gate pattern; A step of leaving a sidewall insulating film, a metal film is formed on the semiconductor substrate including the gate pattern on which the gate sidewall insulating film is formed, and silicon is selectively applied to a portion of the metal film above the polycrystalline silicon layer. A semiconductor device comprising the steps of implanting ions, performing heat treatment to silicide the portion of the metal film in contact with silicon and the silicon ion implanted portion, and etching away portions of the metal film other than the silicide portion. manufacturing method. 2. The method of manufacturing a semiconductor device according to claim 1, wherein a focused ion beam is used for implanting silicon ions. 3. A method for manufacturing a semiconductor device according to claim 1 or 2, characterized in that a silicon substrate is used as the semiconductor substrate. 4. A method for manufacturing a semiconductor device according to any one of claims 1 to 3, characterized in that a high melting point metal film is used as the metal film.