JPH0457528A - Synchronization multiplex terminal station equipment - Google Patents

Abstract

PURPOSE:To automatize detour switching of lines by providing plural control memories in which the content of detouring line setting is written in advance and selecting a control memory corresponding to an optimum detouring line on the occurrence of a fault in a transmission line. CONSTITUTION:A switching control section 6 gives a trigger to a selector 4 so as to select a control memory 1-3 according to a fault report from a reception interface section 7-1, the selector 4 selects the control memory 1-3 to access a data memory 5. A control memory (CM2) 1-2 having been a standby memory so far backs up the control memory 1-3 whose content is rewritten with that of a control memory (CM3) 1-3. A control memory (CM1) 1-1 is used to restore the control, in other words, a detouring memory for the control memory 1-3. Thus, no manual operation by a maintenance personnel is required and the detour switching of the line is automatized.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a synchronous multiplex terminal device that performs circuit detour settings.

[Conventional technology]

Conventionally, synchronous multiplex terminal equipment receives multiplexed signals from multiple routes, separates the channels in each multiplexed signal, stores them in a data memory, and selects the required channels from this data memory. are read out for each route, multiplexed, and sent to each route as a multiplexed signal. Through this series of steps, a line as a channel is set up. The method for reading channels from data memory to each direction is as follows:
How to read each channel (address information) is stored in a control memory that specifies the read address of the data memory. There are two control memories, usually two
Both stores the same line settings and address information, and one has a backup function as a spare memory. When changing the line, write the new line settings to the backup memory, and manually switch between the current and spare memory.The memory that was previously reserved becomes the current memory, and the memory that was previously used becomes the new line settings. It is rewritten and becomes a spare memory.

[Problem to be solved by the invention]

Although the above-mentioned conventional synchronous multiplex terminal device has two control memories, they basically have the same line setting contents, and there is only one type of line setting contents.

In addition, the line settings can be changed with the help of maintenance personnel.
Control memory switching was also done manually.

Therefore, even if a transmission path failure occurs on the line in use, the line settings in the control memory cannot be automatically changed and switched, and in other words, the line bypass function cannot be performed automatically. Everything had to be done manually by maintenance personnel.

[Means for Solving the Problems] The synchronous multiplex terminal device of the present invention has a line setting function and separates received multiplexed signals into channels.

A synchronous multiplexing terminal device that accumulates, re-multiplexes and transmits the multiplexed signal according to designated address information includes an interface unit that interfaces the multiplexed signal with an external device and a transmission line and detects a line failure, and a a data memory that stores and outputs data according to the address information, a plurality of control memories that store and output the address information set in advance corresponding to the type of line setting content, and a fault detection unit from the interface unit. A control memory selection switching control means is provided for receiving information, selecting a control memory in which the address information corresponding to the optimum detour line setting is stored from among the plurality of control memories, and connecting the control memory to the data memory.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 shows a block diagram of one embodiment of the invention. Each control memory (CMI to CMn) 1-1 to 1-n is used to store line setting contents (address information of data memory 5).
-1 and the control memory (CM2) 1-2 of the 1st system are in a mutually active/spare relationship. The detour control memories (CM3 to CMn) 1-3 to 1n store detour line contents independently of the control memory 1-1.1-2. The selector 4 switches between the control memories 1-1 to 1-n and provides an address to the data memory 5.

The data memory 5 includes a plurality of receiving interface units 7-1 to 7-1.
The multiplexed signal coming in from 7-m is stored, the channel reading is changed depending on the contents (address information) of any one of control memories 1-1 to 1-n, and the multiplexed signal is multiplexed to a plurality of transmission interface units 8-1 to 8m. Send a signal. The switching control unit 6 takes in the detected alarm through the reception interface units 7-1 to 7-m and stores it in the control memories 1-1 to 1-n.
This is the part that creates the selection trigger. The reception interface sections 7-1 to 7-m independently receive multiplexed signals for each route and deliver them to the data memory 5, and the transmission interface sections 8-1 to 8-m conversely receive multiplexed signals from the data memory 5. The system extracts the conversion signal and sends it out independently for each route.

Next, the operation will be explained.

It is now assumed that the details of the detour line settings in the event of a failure in the reception interface section 7-1 are stored in the control memory (CM3) 1-3. The switching control unit 6 issues a trigger to the selector 4 to select the control memory 1-3 based on the fault report from the receiving interface unit 7-1. Selector 4 selects control memory 1-3 and accesses data memory 5. Control memory (CM2) 1-2, which was a spare until now, is now a control memory (CM2).
3) Control memory 1 is rewritten to the contents of 1-3.
- Back up 3. Control memory (CM
I) 1-1 comes to exist as a detour memory for the control memory 1-3 to restore the original state.

Figure 2 shows a control memory (CM) as a detour memory.
3) When using >3, control memory (CM
I~CM3)1. -1 to 1-3, examples of state transitions of active, backup, and bypass are shown. Status numbers (1) to (5) are control memory (CMI).

This figure shows a state in which the memory contents are changed to the active memory when the active and spare memories are switched between CM2>1-1.1-2. Status numbers (5) to (7) are when the memory is switched from control memory (CMI) 1-1 to control memory (CM3) 1-3 to create a detour configuration, and the spare control memory (CM2)
) 1-2, the memory contents of control memory (CM3) 1-3 are written to control memory (CMI) 11.
This figure shows a state in which the memory becomes a detour memory.

State numbers (8) and (9) indicate transitions from state number (3>), and control memory (CM2) 12
When memory is switched from control memory (CM3) 1-3 to control memory (CM3) 1-3, the spare control memory (CM
I) Control memory (CM3) 1-1: The memory contents of 3 are written to control memory (CM2)
1-2 shows a state where the memory becomes a detour memory.

〔Effect of the invention〕

As explained above, the present invention is provided with a plurality of control memories in which detour line setting contents are written, and when a transmission line failure occurs, maintenance personnel can select the control memory corresponding to the optimal detour line. This has the advantage that line detour switching can be performed automatically without requiring manual operation.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a diagram showing an example of state transition of a control memory. 1-1 to 1-n... Control memory, 4... Selector, 5... Data memory, 6... Switching control unit,
7-1 to 7-m...reception interface section, 88-m
...Transmission interface section. 1~ Figure 1

Claims (1)

[Claims] In a synchronous multiplex terminal device that has a line setting function and separates and stores received multiplexed signals corresponding to channels, and re-multiplexes and sends them out according to designated address information, the multiplexed signals are interfaced with external devices and transmission paths. an interface section for detecting a line fault; a data memory for accumulating data for each channel of the multiplexed signal and outputting it according to the address information; and storing the address information set in advance corresponding to each type of line setting. A plurality of control memories to be output and a control memory storing the address information corresponding to the optimum detour line setting are selected from among the plurality of control memories upon receiving the failure detection information from the interface section, and the control memory is transferred to the data memory. 1. A synchronous multiplex terminal device, comprising: control memory selection switching control means to be connected.