JPH0457914U - - Google Patents

Info

Publication number
JPH0457914U
JPH0457914U JP10070990U JP10070990U JPH0457914U JP H0457914 U JPH0457914 U JP H0457914U JP 10070990 U JP10070990 U JP 10070990U JP 10070990 U JP10070990 U JP 10070990U JP H0457914 U JPH0457914 U JP H0457914U
Authority
JP
Japan
Prior art keywords
gain adjustment
integrated circuit
voltage
modulator integrated
gain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10070990U
Other languages
Japanese (ja)
Other versions
JP2571406Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990100709U priority Critical patent/JP2571406Y2/en
Publication of JPH0457914U publication Critical patent/JPH0457914U/ja
Application granted granted Critical
Publication of JP2571406Y2 publication Critical patent/JP2571406Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Landscapes

  • Television Receiver Circuits (AREA)
  • Control Of Amplification And Gain Control (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第１図は本考案の一実施例を示す利得調整装置
の回路図、第２図は従来の利得調整装置の回路図
である。 １……バランスモジユレータ用集積回路、９…
…利得設定用ボリユウム、２１……トランジスタ
バイアス用抵抗、２２……ＮＰＮトランジスタ、
２３……ＰＮＰトランジスタ、２４……温度補正
用ダイオード。 FIG. 1 is a circuit diagram of a gain adjustment device showing an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional gain adjustment device. 1... Integrated circuit for balance modulator, 9...
...Gain setting volume, 21...Transistor bias resistor, 22...NPN transistor,
23...PNP transistor, 24...temperature correction diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 利得調整可能なバランスモジユレータ用集積回
路と、前記バランスモジユレータ用集積回路の利
得調整用入力端子に入力される電圧を調整してバ
ランスモジユレータ用集積回路の利得を調整する
ボリユウムと、前記バランスモジユレータ用集積
回路の利得調整用固定端子の電圧をＰＮＰトラン
ジスタで受け前記ＰＮＰトランジスタおよび電源
が接続されたＮＰＮトランジスタで定電圧化し前
記ＮＰＮトランジスタに接続された温度補正用ダ
イオードさらに前記温度補正用ダイオードに接続
された前記ボリユウムを介して前記利得調整用入
力端子と利得調整用固定端子の電圧差を一定化す
るように制御する制御手段とを備えた利得調整装
置。 a balance modulator integrated circuit whose gain is adjustable; a volume which adjusts the gain of the balance modulator integrated circuit by adjusting a voltage input to a gain adjustment input terminal of the balance modulator integrated circuit; , a voltage at a gain adjustment fixed terminal of the balance modulator integrated circuit is received by a PNP transistor, the voltage is made constant by an NPN transistor connected to the PNP transistor and a power supply, and a temperature correction diode is connected to the NPN transistor; A gain adjustment device comprising: control means for controlling the voltage difference between the gain adjustment input terminal and the gain adjustment fixed terminal to be constant through the volume connected to the temperature correction diode.
JP1990100709U 1990-09-25 1990-09-25 Gain adjustment device Expired - Lifetime JP2571406Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990100709U JP2571406Y2 (en) 1990-09-25 1990-09-25 Gain adjustment device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990100709U JP2571406Y2 (en) 1990-09-25 1990-09-25 Gain adjustment device

Publications (2)

Publication Number Publication Date
JPH0457914U true JPH0457914U (en) 1992-05-19
JP2571406Y2 JP2571406Y2 (en) 1998-05-18

Family

ID=31843560

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990100709U Expired - Lifetime JP2571406Y2 (en) 1990-09-25 1990-09-25 Gain adjustment device

Country Status (1)

Country Link
JP (1) JP2571406Y2 (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5418223A (en) * 1977-07-11 1979-02-10 Matsushita Electric Ind Co Ltd Agc circuit formed into integrated circuit
JPS61167210A (en) * 1985-01-19 1986-07-28 Sony Corp Control voltage applying circuit
JPS62137906A (en) * 1985-12-11 1987-06-20 Nec Corp Variable attenuator with temperature compensation

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5418223A (en) * 1977-07-11 1979-02-10 Matsushita Electric Ind Co Ltd Agc circuit formed into integrated circuit
JPS61167210A (en) * 1985-01-19 1986-07-28 Sony Corp Control voltage applying circuit
JPS62137906A (en) * 1985-12-11 1987-06-20 Nec Corp Variable attenuator with temperature compensation

Also Published As

Publication number Publication date
JP2571406Y2 (en) 1998-05-18

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