JPH0458081B2 - - Google Patents

Info

Publication number
JPH0458081B2
JPH0458081B2 JP15347184A JP15347184A JPH0458081B2 JP H0458081 B2 JPH0458081 B2 JP H0458081B2 JP 15347184 A JP15347184 A JP 15347184A JP 15347184 A JP15347184 A JP 15347184A JP H0458081 B2 JPH0458081 B2 JP H0458081B2
Authority
JP
Japan
Prior art keywords
recording
amplifier
voltage
head
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP15347184A
Other languages
Japanese (ja)
Other versions
JPS6132203A (en
Inventor
Tetsuaki Araki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teac Corp
Original Assignee
Teac Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teac Corp filed Critical Teac Corp
Priority to JP15347184A priority Critical patent/JPS6132203A/en
Publication of JPS6132203A publication Critical patent/JPS6132203A/en
Publication of JPH0458081B2 publication Critical patent/JPH0458081B2/ja
Granted legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B5/00Recording by magnetisation or demagnetisation of a record carrier; Reproducing by magnetic means; Record carriers therefor
    • G11B5/02Recording, reproducing, or erasing methods; Read, write or erase circuits therefor
    • G11B5/027Analogue recording
    • G11B5/03Biasing

Description

【発明の詳細な説明】 産業上の利用分野 本発明はテープレコーダ等の磁気記録装置の記
録回路に関するものである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a recording circuit for a magnetic recording device such as a tape recorder.

従来の技術 録音周波数が変化しても、ヘツド電流をほぼ一
定に保持するために、記録増幅器に定電流特性を
持たせたり、記録増幅器とヘツドとの間に高抵抗
を接続することは既に行われている。(例えば、
阿部美春編「テープレコーダ」の第160頁、昭和
44年3月20日日本放送出版協会発行) 発明が解決しようとする問題点 しかし、従来の方式では、定電流特性を与える
ための高抵抗により電圧降下を考慮して記録増幅
器の電源電圧を決定しなければならず、必然的に
電源電圧が高くなつた。換言すれば、電源電圧の
利用率が悪かつた。また、電源電圧を高くとれな
い場合には、必然的にダイナミツクレンジが低下
した。また、定電流用高抵抗による電力損失が大
になつた。また、負帰還によつて周波数補償を行
う方式が知られているが、ヘツドのインダクタン
ス分のみに依存した負帰還をかけていない。従つ
て、精度の高い周波数補償を行うことが不可能で
あつた。そこで、本発明の目的は、上述の如き欠
点を除去することが出来る磁気記録回路を提供す
ることにある。
Conventional technology In order to keep the head current almost constant even when the recording frequency changes, it has already been done to give the recording amplifier a constant current characteristic or to connect a high resistance between the recording amplifier and the head. It is being said. (for example,
Page 160 of “Tape Recorder” edited by Miharu Abe, Showa era
(March 20, 1944, published by Japan Broadcasting Publishing Association) Problems to be solved by the invention However, in the conventional method, the power supply voltage of the recording amplifier is determined by taking into account the voltage drop due to the high resistance that provides constant current characteristics. As a result, the power supply voltage inevitably increased. In other words, the utilization rate of the power supply voltage was poor. Furthermore, if the power supply voltage could not be raised high, the dynamic range would inevitably decrease. In addition, power loss due to high resistance for constant current increased. Also, although a method of frequency compensation using negative feedback is known, negative feedback that depends only on the inductance of the head is not applied. Therefore, it has been impossible to perform highly accurate frequency compensation. SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a magnetic recording circuit that can eliminate the above-mentioned drawbacks.

問題点を解決するための手段 上記目的を達成するための本発明は、磁気記録
媒体に磁気記録を行うための記録磁気ヘツドと、
この磁気ヘツドに記録電流を供給する記録増幅器
と、前記磁気ヘツドに直列に接続された検出抵抗
と、前記検出抵抗の両端の電圧のr+R/r倍(但 し、rは前記検出抵抗の抵抗値、Rは前記磁気ヘ
ツドの抵抗値)の出力電圧を得る抵抗分検出用増
幅器と、前記記録増幅器の出力段の電圧から前記
抵抗分検出用増幅器の出力電圧を差し引いて前記
磁気ヘツドのインダクタンスに基づく電圧降下分
を得る差動増幅器と、低域から高域に向つて徐々
に低下する周波数特性を前記差動増幅器の出力に
与え、この周波数特性が与えられた信号を前記記
録増幅器の入力段に負帰還する周波数補償回路と
を備えていることを特徴とする磁気記録回路に係
わるものである。
Means for Solving the Problems In order to achieve the above object, the present invention provides a recording magnetic head for performing magnetic recording on a magnetic recording medium;
A recording amplifier that supplies a recording current to the magnetic head, a detection resistor connected in series to the magnetic head, and r+R/r times the voltage across the detection resistor (where r is the resistance value of the detection resistor, R is a resistance value of the magnetic head); and a voltage based on the inductance of the magnetic head by subtracting the output voltage of the resistance detection amplifier from the voltage of the output stage of the recording amplifier. A differential amplifier that obtains the drop, a frequency characteristic that gradually decreases from low to high frequencies is applied to the output of the differential amplifier, and a signal given this frequency characteristic is applied to the input stage of the recording amplifier. The present invention relates to a magnetic recording circuit characterized by comprising a feedback frequency compensation circuit.

作 用 上記発明における検出用増幅器の利得が
r+R/rであるので、ヘツド電流をIとすれば、 検出抵抗rの両端の電圧はIrとなり、検出増幅器
の出力電圧は(r+R/r)Ir=(r+R)Iとな る。一方、バイアストラツプ回路等を無視する
と、記録増幅器の出力段の電圧は、ヘツドのイン
ダクタンスLによるインピーダンスをZLとすれ
ば、I(R+r+ZL)となる。この結果、差動増
幅器からI(R+r+ZL)−I(R+r)=IZLの出
力が得られる。即ち、ヘツドのインダクタンス分
のみに依存する電圧成分が得られる。このインダ
クタンス分のみに依存する電圧IZL、周波数が高
くなるに従つて、インピーダンスZLが大になり、
逆に電流Iは小になるので、周波数特性を有さな
い。しかし、周波数補償回路が設けられているの
で、周波数に対して定電流特性が得られる負帰還
制御が達成される。上述の如く、本発明ではヘツ
ドのインダクタンス分にのみ負帰還がなされるの
で、良好な周波数補償を行うことが可能になり、
忠実度の高い記録が可能になる。
Effect Since the gain of the detection amplifier in the above invention is r+R/r, if the head current is I, the voltage across the detection resistor r is Ir, and the output voltage of the detection amplifier is (r+R/r)Ir= (r+R)I. On the other hand, if the bias trap circuit and the like are ignored, the voltage at the output stage of the recording amplifier will be I(R+r+Z L ), where Z L is the impedance due to the head inductance L. As a result, an output of I(R+r+Z L )-I(R+r)=IZ L is obtained from the differential amplifier. That is, a voltage component that depends only on the inductance of the head is obtained. The voltage IZ L depends only on this inductance, and as the frequency increases, the impedance Z L increases,
Conversely, since the current I becomes small, it has no frequency characteristics. However, since a frequency compensation circuit is provided, negative feedback control that provides constant current characteristics with respect to frequency is achieved. As mentioned above, in the present invention, negative feedback is provided only to the inductance of the head, so it is possible to perform good frequency compensation.
High-fidelity recording becomes possible.

実施例 次に、図面を参照して本発明の実施例に係わる
テープレコーダについて述べる。第1図におい
て、1は磁気テープであり、一対のリール2,3
に巻き回され、図示されていないテープ走行機構
によつて一定速度で走行される。4はコアと巻線
とから成る記録磁気ヘツドであり、インダクタン
スLと抵抗Rとを有する。5は記録増幅器であ
り、入力端子6から供給される記録入力信号を増
幅してヘツド4に供給する定電圧増幅器である。
7は高周波バイアス回路であり、ヘツド4に接続
されている。8はバイアストラツプ回路であり、
インダクタンス素子L1とコンデンサC1とから成
り、記録増幅器8とヘツド4との間に接続されて
いる。9は本発明に従う検出抵抗であり、ヘツド
4と接地共通ライン10との間に接続されてい
る。即ち、この検出抵抗9は、抵抗値rを有して
ヘツド4に直列に接続されている。従つて、抵抗
9からは、ヘツド電流Iとこの抵抗値rとの積Ir
からなる電圧が得られる。抵抗9とヘツド4との
間に、インダクタンス素子L2とコンデンサC2
からなるバイアストラツプ回路11を介して抵抗
分検出用増幅器12が接続されている。この増幅
器12の利得Aは、A=r+R/r(但し、rは抵 抗9の抵抗値、Rはヘツド4の抵抗値)に設定さ
れている。従つて、増幅器12の出力端子には、 r+R/r×Ir=(r+R)I の電圧が得られる。13は差動増幅器であり、こ
の非反転入力端子が記録増幅器5の出力端子に接
続され、反転入力端子が抵抗分検出用増幅器12
の出力端子に接続されている。記録増幅器5の出
力端子即ちヘツド4の一端の電圧は、バイアスト
ラツプ回路8のインピーダンスを無視すると、 (R+r+ZL)I (但し、ZLはヘツド4のインダクタンスLのイン
ピーダンス)である。従つて、差動増幅器13
は、一方の入力端子に入力する(R+r+ZL)I
と、他方の入力端子に入力する(r+R)Iとの
差、 即ち、 (R+r+ZL)I−(r+R)I=ZLI を出力する。この結果、ヘツド4の抵抗R及び直
列抵抗9の抵抗値rに無関係であり、ヘツド4の
インダクタンスLにのみ関係する電圧降下分ZL
を検出することが出来る。なお、このZLIは、記
録信号の周波数情報を含む信号である。即ち、記
録増幅器5は電圧増幅器であり、入力信号に対応
した出力電圧を発生する。従つて、周波数が高く
なると、インピーダンスZLが大になり、電流Iが
小になる。この結果、周波数の変化に拘らず、一
定の電圧IZLが得られる。そして、電流Iは記録
信号の周波数に応じて変化するので、周波数成分
のみを検出することが出来る。
Embodiment Next, a tape recorder according to an embodiment of the present invention will be described with reference to the drawings. In FIG. 1, 1 is a magnetic tape, and a pair of reels 2, 3
The tape is wound around the tape and is run at a constant speed by a tape running mechanism (not shown). 4 is a recording magnetic head consisting of a core and a winding, and has an inductance L and a resistance R. Reference numeral 5 denotes a recording amplifier, which is a constant voltage amplifier that amplifies the recording input signal supplied from the input terminal 6 and supplies it to the head 4.
7 is a high frequency bias circuit, which is connected to the head 4. 8 is a bias trap circuit;
It consists of an inductance element L1 and a capacitor C1 , and is connected between the recording amplifier 8 and the head 4. Reference numeral 9 denotes a detection resistor according to the present invention, which is connected between the head 4 and the ground common line 10. That is, this detection resistor 9 has a resistance value r and is connected in series to the head 4. Therefore, from the resistor 9, the product Ir of the head current I and this resistance value r
A voltage consisting of is obtained. A resistance detection amplifier 12 is connected between the resistor 9 and the head 4 via a bias trap circuit 11 consisting of an inductance element L2 and a capacitor C2 . The gain A of this amplifier 12 is set to A=r+R/r (where r is the resistance value of the resistor 9 and R is the resistance value of the head 4). Therefore, a voltage of r+R/r×Ir=(r+R)I is obtained at the output terminal of the amplifier 12. 13 is a differential amplifier, whose non-inverting input terminal is connected to the output terminal of the recording amplifier 5, and whose inverting input terminal is connected to the resistance component detection amplifier 12.
is connected to the output terminal of The voltage at the output terminal of the recording amplifier 5, that is, one end of the head 4, if the impedance of the bias trap circuit 8 is ignored, is (R+r+Z L )I (where Z L is the impedance of the inductance L of the head 4). Therefore, the differential amplifier 13
is input to one input terminal (R+r+Z L )I
and (r+R)I input to the other input terminal, that is, (R+r+Z L )I-(r+R)I=Z L I is output. As a result, the voltage drop Z L I is unrelated to the resistance R of the head 4 and the resistance value r of the series resistor 9, and is related only to the inductance L of the head 4.
can be detected. Note that this Z L I is a signal containing frequency information of the recording signal. That is, the recording amplifier 5 is a voltage amplifier and generates an output voltage corresponding to an input signal. Therefore, as the frequency increases, the impedance Z L increases and the current I decreases. As a result, a constant voltage IZ L can be obtained regardless of changes in frequency. Since the current I changes according to the frequency of the recording signal, only the frequency component can be detected.

14は周波数補償回路であり、抵抗15とコン
デンサ16との積分回路から成り、差動増幅器1
3の出力電圧に対して第2図の特性線VFで示す
ような周波数特性を与えるものである。即ち、低
域から高域に向つて徐々に低下する周波数特性を
与える回路である。もし、負帰還電圧VFがない
と仮定すれば、入力端子6から供給された信号が
周波数に対して定電圧特性を有する記録増幅器5
で増幅されてヘツド4に印加される。記録増幅器
5が定電圧特性を有してヘツド4に電圧を供給し
ても、ヘツド4のインピーダンスZLが第2図に示
す如く変化するので、ヘツド4に周波数に対して
定電流特性を有するように電流を流すことが出来
ない。そこで、本実施例では、インピーダンスZL
の変化と逆の周波数特性を与えられた電圧VF
減算回路17に供給して、記録信号に負帰還をか
けている。この結果、周波数が高くなると、負帰
還量が減り、記録増幅器5の出力電圧が高くな
り、ヘツド4の電流Iの定電流化がなされ、ヘツ
ド電流Iは第2図に示す如く周波数の変化にも拘
らず一定になる。
14 is a frequency compensation circuit, which consists of an integrating circuit of a resistor 15 and a capacitor 16, and a differential amplifier 1.
3. This gives a frequency characteristic as shown by the characteristic line VF in FIG. 2 to the output voltage of No. 3. That is, it is a circuit that provides frequency characteristics that gradually decrease from low to high frequencies. If it is assumed that there is no negative feedback voltage V F , the signal supplied from the input terminal 6 will be connected to the recording amplifier 5 which has constant voltage characteristics with respect to frequency.
The signal is amplified and applied to the head 4. Even if the recording amplifier 5 has a constant voltage characteristic and supplies a voltage to the head 4, the impedance ZL of the head 4 changes as shown in FIG. 2, so the head 4 has a constant current characteristic with respect to frequency. Current cannot flow like this. Therefore, in this embodiment, the impedance Z L
A voltage V F having a frequency characteristic opposite to the change in is supplied to the subtraction circuit 17 to apply negative feedback to the recording signal. As a result, as the frequency increases, the amount of negative feedback decreases, the output voltage of the recording amplifier 5 increases, and the current I of the head 4 becomes constant, and the head current I changes as the frequency changes, as shown in FIG. However, it remains constant.

以上、本発明の実施例について述べたが、本発
明はこれに限定されるものでなく、更に変形可能
なものである。例えば、電流帰還回路としてもよ
い。
Although the embodiments of the present invention have been described above, the present invention is not limited thereto and can be further modified. For example, it may be a current feedback circuit.

発明の効果 上述から明らかな如く、ヘツドのインダクタン
ス分に依存した電圧に基づいで負帰還量が決定さ
れるので、周波数補償を良好に行うことが出来
る。従つて、歪みの少ない記録が可能になる。ま
た、歪みがある場合にはその高調波成分と交流バ
イアス信号とでビートを起すことがあるが、この
様な問題もなくなる、また、定電流特性を得るた
めに高抵抗を接続しないため、電源電圧の利用率
が良くなる。
Effects of the Invention As is clear from the above, since the amount of negative feedback is determined based on the voltage depending on the inductance of the head, frequency compensation can be performed satisfactorily. Therefore, recording with less distortion becomes possible. In addition, if there is distortion, the harmonic components of the distortion and the AC bias signal may cause beats, but this problem is eliminated, and since high resistance is not connected to obtain constant current characteristics, the power supply Improves voltage utilization.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例に係わる磁気記録回路
を示すブロツク図、第2図は第1図の各部の周波
数特性図である。 1……磁気テープ、4……ヘツド、5……記録
増幅器、9……検出抵抗、12……抵抗分検出用
増幅器、13……差動増幅器、14……周波数補
償回路。
FIG. 1 is a block diagram showing a magnetic recording circuit according to an embodiment of the present invention, and FIG. 2 is a frequency characteristic diagram of each part of FIG. 1. DESCRIPTION OF SYMBOLS 1... Magnetic tape, 4... Head, 5... Recording amplifier, 9... Detection resistor, 12... Resistance detection amplifier, 13... Differential amplifier, 14... Frequency compensation circuit.

Claims (1)

【特許請求の範囲】 1 磁気記録媒体に磁気記録を行うための記録磁
気ヘツドと、 この磁気ヘツドに記録電流を供給する記録増幅
器と、 前記磁気ヘツドに直列に接続された検出抵抗
と、 前記検出抵抗の両端の電圧のr+R/r倍(但し、 rは前記検出抵抗の抵抗値、Rは前記磁気ヘツド
の抵抗値)の出力電圧を得る抵抗分検出用増幅器
と、 前記記録増幅器の出力段の電圧から前記抵抗分
検出用増幅器の出力電圧を差し引いて前記磁気ヘ
ツドのインダクタンスに基づく電圧降下分を得る
差動増幅器と、 抵低から高域に向つて徐々に低下する周波数特
性を前記差動増幅器の出力に与え、この周波数特
性が与えられた信号を前記記録増幅器の入力段に
負帰還する周波数補償回路と、 を備えていることを特徴とする磁気記録回路。
[Scope of Claims] 1. A recording magnetic head for performing magnetic recording on a magnetic recording medium, a recording amplifier that supplies a recording current to the magnetic head, a detection resistor connected in series to the magnetic head, and the detection resistor. a resistance detection amplifier that obtains an output voltage r+R/r times the voltage across the resistor (where r is the resistance value of the detection resistor and R is the resistance value of the magnetic head); and an output stage of the recording amplifier. A differential amplifier that obtains a voltage drop based on the inductance of the magnetic head by subtracting the output voltage of the resistance detection amplifier from the voltage; and a differential amplifier that obtains a voltage drop based on the inductance of the magnetic head; and a frequency compensation circuit that negatively feeds back a signal given this frequency characteristic to the input stage of the recording amplifier.
JP15347184A 1984-07-24 1984-07-24 Magnetic recording circuit Granted JPS6132203A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15347184A JPS6132203A (en) 1984-07-24 1984-07-24 Magnetic recording circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15347184A JPS6132203A (en) 1984-07-24 1984-07-24 Magnetic recording circuit

Publications (2)

Publication Number Publication Date
JPS6132203A JPS6132203A (en) 1986-02-14
JPH0458081B2 true JPH0458081B2 (en) 1992-09-16

Family

ID=15563292

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15347184A Granted JPS6132203A (en) 1984-07-24 1984-07-24 Magnetic recording circuit

Country Status (1)

Country Link
JP (1) JPS6132203A (en)

Also Published As

Publication number Publication date
JPS6132203A (en) 1986-02-14

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