JPH04585Y2 - - Google Patents

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Publication number
JPH04585Y2
JPH04585Y2 JP1986151894U JP15189486U JPH04585Y2 JP H04585 Y2 JPH04585 Y2 JP H04585Y2 JP 1986151894 U JP1986151894 U JP 1986151894U JP 15189486 U JP15189486 U JP 15189486U JP H04585 Y2 JPH04585 Y2 JP H04585Y2
Authority
JP
Japan
Prior art keywords
frequency
voltage
signal
local oscillation
integrating circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP1986151894U
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Japanese (ja)
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JPS6356824U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Priority to JP1986151894U priority Critical patent/JPH04585Y2/ja
Publication of JPS6356824U publication Critical patent/JPS6356824U/ja
Application granted granted Critical
Publication of JPH04585Y2 publication Critical patent/JPH04585Y2/ja
Expired legal-status Critical Current

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Description

【考案の詳細な説明】 〈産業上の利用分野〉 この考案は、局部発振部の発振周波数を安定さ
せるために用いる自動周波数制御装置に関し、特
に自動周波数制御装置内の積分回路の改善に関す
る。
[Detailed Description of the Invention] <Industrial Application Field> This invention relates to an automatic frequency control device used to stabilize the oscillation frequency of a local oscillation section, and particularly relates to an improvement of an integrating circuit within the automatic frequency control device.

〈従来技術〉 従来、上記の自動周波数制御装置には、例えば
衛星放送受信装置に用いられている第3図に示す
ようなものがあつた。同図において、2は周波数
混合部で、FM変調波である入力信号を局部発振
部4からの局部発振信号と混合して、中間周波信
号に変換する。6は中間周波増幅部で、周波数混
合部2からの中間周波信号を増幅して、周波数弁
別部8に供給する。周波数弁別部8は、中間周波
信号をFM復調する。このFM復調信号はAFC回
路10に供給される。AFC回路10は、FM復調
信号に基づいて中間周波信号が、中間周波信号の
正規周波数よりどれだけ偏移しているかを表わす
誤差電圧を生成する。この誤差電圧は、積分回路
12に供給され、この積分回路12の出力電圧が
局部発振部4に供給される。局部発振部4は、積
分回路12の出力電圧に応じて発振周波数を変更
できるように構成されている。従つて、局部発振
部4の局部発振信号の周波数が周囲温度の変化等
によつて変動しても、自動的に発振周波数を正規
の周波数に保つことができる。
<Prior Art> Conventionally, the above-mentioned automatic frequency control device includes one shown in FIG. 3, which is used, for example, in a satellite broadcast receiving device. In the figure, reference numeral 2 denotes a frequency mixing section which mixes an input signal, which is an FM modulated wave, with a local oscillation signal from a local oscillation section 4, and converts it into an intermediate frequency signal. Reference numeral 6 denotes an intermediate frequency amplifying section that amplifies the intermediate frequency signal from the frequency mixing section 2 and supplies it to the frequency discriminating section 8 . The frequency discriminator 8 performs FM demodulation on the intermediate frequency signal. This FM demodulated signal is supplied to the AFC circuit 10. The AFC circuit 10 generates an error voltage representing how much the intermediate frequency signal deviates from the normal frequency of the intermediate frequency signal based on the FM demodulated signal. This error voltage is supplied to an integrating circuit 12, and the output voltage of this integrating circuit 12 is supplied to the local oscillation section 4. The local oscillation section 4 is configured to be able to change the oscillation frequency according to the output voltage of the integrating circuit 12. Therefore, even if the frequency of the local oscillation signal of the local oscillator 4 fluctuates due to changes in ambient temperature, etc., the oscillation frequency can be automatically maintained at the normal frequency.

〈考案が解決しようとする問題点〉 積分回路12としては、例えば第4図に示すよ
うに抵抗器14とコンデンサ16とからなるもの
が用いられている。この積分回路12の時定数
は、AFC回路10の誤差電圧の立上り及び立下
りをすみやかに局部発振部4に伝達し、すみやか
に局部発振信号の周波数の変動を修正するため、
小さい方が望ましい。特に衛星放送受信装置で
は、局部発振信号の周波数の変動によつて、画面
のにじみが生じるのですみやかに変動を修正する
必要がある。一方、AFC回路10の誤差電圧に
は、映像信号等の不要成分が含まれているので、
これらによつて局部発振信号の周波数が変動する
のを防止するため、積分回路12の時定数は大き
い方が望ましい。すなわち、積分回路12は、相
反する2つの要求を満たす必要があるという問題
点があつた。
<Problems to be Solved by the Invention> As the integrating circuit 12, for example, as shown in FIG. 4, one consisting of a resistor 14 and a capacitor 16 is used. The time constant of the integrating circuit 12 is set so that the rise and fall of the error voltage of the AFC circuit 10 can be promptly transmitted to the local oscillation section 4, and the frequency fluctuation of the local oscillation signal can be corrected promptly.
Smaller is preferable. Particularly in satellite broadcast receivers, fluctuations in the frequency of local oscillation signals cause blurring on the screen, so it is necessary to promptly correct the fluctuations. On the other hand, since the error voltage of the AFC circuit 10 includes unnecessary components such as video signals,
In order to prevent the frequency of the local oscillation signal from fluctuating due to these factors, it is desirable that the time constant of the integrating circuit 12 be large. That is, there is a problem in that the integrating circuit 12 needs to satisfy two contradictory requirements.

〈問題点を解決するための手段〉 上記の問題点を解決するため、この考案は、制
御電圧の大きさに応じて局部発振信号の周波数が
変化するように構成した局部発振部と、入力信号
を上記局部発振信号と混合して入力信号を中間周
波信号に変換する混合部と、正規の中間周波数に
対する中間周波信号の周波数の偏移を表わす誤差
電圧を生成する回路と、誤差電圧が入力され出力
電圧を制御電圧として局部発振部に供給する積分
回路を含んでいる。そして、積分回路は、入力端
子と出力端子との間に2つの抵抗器を直列に接続
し、出力端子と基準電位点との間にコンデンサを
接続し、2つの抵抗器のうち一方に対して逆並列
にダイオードを接続したものである。
<Means for Solving the Problems> In order to solve the above problems, this invention uses a local oscillation section configured so that the frequency of the local oscillation signal changes depending on the magnitude of the control voltage, and an input signal. a mixer that mixes the input signal with the local oscillation signal to convert the input signal into an intermediate frequency signal; a circuit that generates an error voltage representing the frequency deviation of the intermediate frequency signal with respect to the normal intermediate frequency; It includes an integrating circuit that supplies the output voltage as a control voltage to the local oscillator. Then, the integrating circuit connects two resistors in series between the input terminal and the output terminal, connects a capacitor between the output terminal and the reference potential point, and connects one of the two resistors to the other. Diodes are connected in antiparallel.

〈作用・効果〉 積分回路の入力端子に供給された誤差電圧が立
ち上がつたとき、コンデンサは充電されていない
ので、2つのダイオードの両端間の電位差が大き
くなり、一方のダイオードが導通し、このダイオ
ードと、並列に接続されている抵抗器が短絡され
る。従つて、この積分回路の時定数は、短絡され
ていない抵抗器の値とコンデンサの値とを乗算し
た小さな値となる。やがて、コンデンサの充電が
すすみ、導通しているダイオードの両端間の電位
差が小さくなり、導通していたダイオードは非導
通状態となる。その結果、積分回路の時定数は2
つの抵抗器の抵抗値の和とコンデンサの値とを乗
算した大きな値となる。誤差電圧が立ち下がる
と、2つのダイオードの両端間の電位差が大きく
なり、他方のダイオードが導通し、このダイオー
ドと並列に接続されている抵抗器が短絡され、上
述したのと同様に積分回路の時定数は小さくな
る。従つて、この積分回路の時定数は、誤差電圧
の立ち上がりや立ち下がりに速やかに応動し、局
部発振部の発振周波数の変動を速やかに修正す
る。また、立ち上がり以後立ち下がりまでは時定
数が大きいので、映像信号等の不要成分に応動し
て局部発振周波数が変動するのを防止できる。し
かも、このように時定数を変更するための回路構
成は、逆並列接続した2つのダイオードを、積分
回路の2つの直列抵抗器の一方に並列に接続した
ものであるので、比較器や、この比較器によつて
オン・オフ制御されるスイツチ等を設ける必要が
なく、回路構成が簡略化される。
<Function/Effect> When the error voltage supplied to the input terminal of the integrating circuit rises, the capacitor is not charged, so the potential difference between the two terminals of the two diodes increases, and one diode becomes conductive. This diode and the resistor connected in parallel are shorted. Therefore, the time constant of this integrating circuit is a small value obtained by multiplying the value of the unshorted resistor by the value of the capacitor. Eventually, as the capacitor is charged, the potential difference between the ends of the conducting diode becomes smaller, and the conducting diode becomes non-conducting. As a result, the time constant of the integrator circuit is 2
A large value is obtained by multiplying the sum of the resistance values of the two resistors and the value of the capacitor. When the error voltage falls, the potential difference across the two diodes increases, the other diode becomes conductive, and the resistor connected in parallel with this diode is short-circuited, causing the integrator circuit to open in the same way as described above. The time constant becomes smaller. Therefore, the time constant of this integrating circuit quickly responds to the rise and fall of the error voltage, and quickly corrects fluctuations in the oscillation frequency of the local oscillator. Furthermore, since the time constant from the rise to the fall is large, it is possible to prevent the local oscillation frequency from varying in response to unnecessary components such as a video signal. Moreover, the circuit configuration for changing the time constant in this way consists of two anti-parallel connected diodes connected in parallel to one of the two series resistors of the integrating circuit. There is no need to provide a switch or the like that is controlled on/off by a comparator, and the circuit configuration is simplified.

〈実施例〉 第1図は、この考案による自動周波数制御装置
の1実施例の積分回路の回路図で、この積分回路
も、第3図に示した従来の積分回路12と同様に
使用される。すなわち、入力端子20にはAFC
回路10から誤差電圧が供給され、出力端子22
の出力電圧は局部発振部4に制御電圧として供給
される。
<Embodiment> FIG. 1 is a circuit diagram of an integrating circuit of an embodiment of the automatic frequency control device according to this invention, and this integrating circuit is also used in the same way as the conventional integrating circuit 12 shown in FIG. 3. . That is, the input terminal 20 has an AFC
An error voltage is supplied from the circuit 10, and the output terminal 22
The output voltage is supplied to the local oscillator 4 as a control voltage.

入力端子20と出力端子22との間には、2つ
の抵抗器24,26が直列に接続されている。そ
して、出力端子22と基準電位点との間にはコン
デンサ28が接続されている。抵抗器24の両端
間には、ダイオード30,32が逆並列に接続さ
れている。すなわち、ダイオード30は、そのカ
ソードを入力端子20に、アノードを抵抗器2
4,26の接続点にそれぞれ接続し、ダイオード
32は、そのアノードを入力端子20に、カソー
ドを抵抗器24,26の接続点にそれぞれ接続し
てある。
Two resistors 24 and 26 are connected in series between the input terminal 20 and the output terminal 22. A capacitor 28 is connected between the output terminal 22 and the reference potential point. Diodes 30 and 32 are connected in antiparallel between both ends of the resistor 24. That is, the diode 30 has its cathode connected to the input terminal 20 and its anode connected to the resistor 2.
The diode 32 has its anode connected to the input terminal 20 and its cathode connected to the connection point of the resistors 24 and 26, respectively.

この積分回路では、コンデンサ28が定常状態
にある状態において、第2図aに示すように時刻
t1から時刻t2までV1(>VA)を維持し、以後V2
(<VA)を維持するステツプ電圧Viを入力端子2
0に誤差電圧として印加すると、時刻t1において
ダイオード32両端間には順方向の大きな電圧降
下が生じ、ダイオード32が導通する。その結
果、積分回路の時定数は抵抗器26の値とコンデ
ンサ28の値とを乗算した小さな値となり、出力
端子22の出力電圧V0は第2図bに符号イで示
すように急速に立ち上る。やがて、コンデンサ2
8の両端間の電圧が大きくなり、たとえばV1′と
なると、ダイオード32の両端間の電位差が小さ
くなり、ダイオード32は非導通状態となり、こ
の積分回路の時定数は、抵抗器24,26の抵抗
値の和とコンデンサ28の値とを乗算した値とな
り、ダイオード32が導通していたときの時定数
よりも大きくなる。その結果、第2図bに符号ロ
で示すように緩やかに変化する。
In this integrating circuit, when the capacitor 28 is in a steady state, the time is determined as shown in FIG. 2a.
V 1 (>V A ) is maintained from t 1 to time t 2 , and thereafter V 2
Input the step voltage V i that maintains (<V A ) to the input terminal 2.
0 as an error voltage, a large forward voltage drop occurs between both ends of the diode 32 at time t1 , and the diode 32 becomes conductive. As a result, the time constant of the integrating circuit becomes a small value obtained by multiplying the value of the resistor 26 by the value of the capacitor 28, and the output voltage V0 at the output terminal 22 rises rapidly as shown by the symbol A in FIG. 2b. . Eventually, capacitor 2
8 becomes large, for example V 1 ', the potential difference across the diode 32 becomes small, the diode 32 becomes non-conducting, and the time constant of this integrating circuit becomes equal to the voltage of the resistors 24 and 26. It is a value obtained by multiplying the sum of the resistance values by the value of the capacitor 28, and is larger than the time constant when the diode 32 is conductive. As a result, it changes gradually as shown by the symbol B in FIG. 2b.

時刻t2においてV2に入力電圧Viが降下すると、
ダイオード30には、ダイオード32が導通して
いたときとは逆方向に大きな電位差が生じ、ダイ
オード30が導通する。その結果、この積分回路
の時定数は、再び抵抗器26の値とコンデンサ2
8の値とを乗算した値になり、第2図bに符号ハ
で示すように出力電圧V0は急速に立下る。やが
て、コンデンサ28の両端間の電圧がV2′となる
と、ダイオード30の両端間の電圧は小さくな
り、ダイオード30は非導通状態となる。その結
果、この積分回路の時定数は、再び抵抗器24,
26の抵抗値とコンデンサ28の値とを乗算した
値になり、出力電圧V0は第2図にbに符号ニで
示すように緩やかに変化する。
When the input voltage V i drops to V 2 at time t 2 ,
A large potential difference is generated in the diode 30 in the opposite direction to that when the diode 32 was conductive, and the diode 30 becomes conductive. As a result, the time constant of this integrator circuit is again the value of resistor 26 and capacitor 2.
8, and the output voltage V 0 falls rapidly, as shown by the symbol C in FIG. 2b. Eventually, when the voltage across the capacitor 28 reaches V 2 ', the voltage across the diode 30 decreases and the diode 30 becomes non-conductive. As a result, the time constant of this integrator circuit is again
The value obtained by multiplying the resistance value of 26 by the value of capacitor 28 is obtained, and the output voltage V 0 changes gradually as shown by the symbol D in b in FIG.

以上のように、この実施例では、誤差電圧の立
上りや立下りに急速に応動して周波数の変動を修
正できる。そして、それ以後、映像信号等の不要
成分が誤差電圧に含まれていても、これによつて
周波数が変動することはない。
As described above, in this embodiment, frequency fluctuations can be corrected by rapidly responding to the rise or fall of the error voltage. Thereafter, even if unnecessary components such as video signals are included in the error voltage, the frequency will not fluctuate due to this.

上記の実施例では、この考案を衛星放送受信装
置の局部発振信号を安定させるための自動周波数
制御装置に実施したが、テレビジヨン受像機の局
部発振信号を安定させるための自動周波数制御装
置に実施してもよい。その場合、映像中間周波増
幅回路から映像搬送波を抽出して、リミツタによ
つて振幅変調分を除去し、映像搬送周迫数の変化
をFM検波により直流電圧の変化として取り出
し、積分回路に供給すればよい。
In the above embodiment, this invention was implemented in an automatic frequency control device for stabilizing the local oscillation signal of a satellite broadcast receiver, but it was also implemented in an automatic frequency control device for stabilizing the local oscillation signal of a television receiver. You may. In that case, the video carrier wave is extracted from the video intermediate frequency amplification circuit, the amplitude modulation part is removed by a limiter, and the change in the video carrier frequency is extracted as a change in DC voltage by FM detection, which is then supplied to the integrating circuit. Bye.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案による自動周波数制御装置の
1実施例の積分回路の回路図、第2図a,bは第
1図の回路の入力電圧及び出力電圧の波形を示す
図、第3図は従来の自動周波数制御装置のブロツ
ク図、第4図は第3図の装置に用いた積分回路の
回路図である。 2……周波数混合部、4……局部発振部、10
……AFC回路、12……積分回路、20……入
力端子、22……出力端子、24,26……抵抗
器、28……コンデンサ、30,32……ダイオ
ード。
Figure 1 is a circuit diagram of an integrating circuit of an embodiment of the automatic frequency control device according to this invention, Figures 2a and b are diagrams showing the waveforms of the input voltage and output voltage of the circuit of Figure 1, and Figure 3 is FIG. 4 is a block diagram of a conventional automatic frequency control device. FIG. 4 is a circuit diagram of an integrating circuit used in the device of FIG. 2... Frequency mixing section, 4... Local oscillation section, 10
...AFC circuit, 12 ... Integrating circuit, 20 ... Input terminal, 22 ... Output terminal, 24, 26 ... Resistor, 28 ... Capacitor, 30, 32 ... Diode.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 制御電圧の大きさに応じて局部発振信号の周波
数が変化するように構成した局部発振部と、入力
信号と上記局部発振信号とを混合して上記入力信
号を中間周波信号に変換するように構成した混合
部と、正規の中間周波数に対する上記中間周波信
号の周波数の偏移を表わす誤差電圧を生成する回
路と、上記誤差電圧が入力され出力電圧を上記制
御電圧として上記局部発振部に供給する積分回路
とを含み、この積分回路が、入力端子と出力端子
との間に直列に接続した2つの抵抗器と、上記出
力端子と基準電位点との間に接続されたコンデン
サと、上記2つの抵抗器の一方の両端間に逆並列
に接続された2つのダイオードとからなることを
特徴とする自動周波数制御装置。
a local oscillation unit configured to change the frequency of the local oscillation signal according to the magnitude of the control voltage; and a configuration configured to mix the input signal and the local oscillation signal to convert the input signal into an intermediate frequency signal. a mixing section that generates an error voltage representing a frequency deviation of the intermediate frequency signal with respect to a normal intermediate frequency, and an integrator that receives the error voltage and supplies the output voltage to the local oscillator section as the control voltage. The integrating circuit includes two resistors connected in series between an input terminal and an output terminal, a capacitor connected between the output terminal and a reference potential point, and the two resistors. An automatic frequency control device comprising two diodes connected in antiparallel across one end of the device.
JP1986151894U 1986-10-02 1986-10-02 Expired JPH04585Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1986151894U JPH04585Y2 (en) 1986-10-02 1986-10-02

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1986151894U JPH04585Y2 (en) 1986-10-02 1986-10-02

Publications (2)

Publication Number Publication Date
JPS6356824U JPS6356824U (en) 1988-04-15
JPH04585Y2 true JPH04585Y2 (en) 1992-01-09

Family

ID=31069376

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1986151894U Expired JPH04585Y2 (en) 1986-10-02 1986-10-02

Country Status (1)

Country Link
JP (1) JPH04585Y2 (en)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5830326U (en) * 1981-08-20 1983-02-28 三洋電機株式会社 Receiving machine

Also Published As

Publication number Publication date
JPS6356824U (en) 1988-04-15

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