JPH0459175U - - Google Patents

Info

Publication number: JPH0459175U
Authority: JP; Japan
Prior art keywords: chip; recognition means; conductor pattern; recognition; circuit board
Prior art date: 1990-09-28
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.): Pending

Application number

JP1990101067U

Other languages

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1990-09-28

Filing date

1990-09-28

Publication date

1992-05-21

1990-09-28 Application filed filed Critical

1990-09-28 Priority to JP1990101067U priority Critical patent/JPH0459175U/ja

1992-05-21 Publication of JPH0459175U publication Critical patent/JPH0459175U/ja

Status Pending legal-status Critical Current

Links

Classifications

- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
- H10W46/101—Marks applied to devices, e.g. for alignment or identification characterised by the type of information, e.g. logos or symbols
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
- H10W46/301—Marks applied to devices, e.g. for alignment or identification for alignment
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W46/00—Marks applied to devices, e.g. for alignment or identification
- H10W46/601—Marks applied to devices, e.g. for alignment or identification for use after dicing
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/931—Shapes of bond pads
- H10W72/932—Plan-view shape, i.e. in top view
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Structure Of Printed Boards (AREA)
Wire Bonding (AREA)

JP1990101067U 1990-09-28 1990-09-28 Pending JPH0459175U (da)

Priority Applications (1)

Application Number	Priority Date	Filing Date	Title
JP1990101067U JPH0459175U (da)	1990-09-28	1990-09-28

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
JP1990101067U JPH0459175U (da)	1990-09-28	1990-09-28

Publications (1)

Publication Number	Publication Date
JPH0459175U true JPH0459175U (da)	1992-05-21

Family

ID=31844210

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
JP1990101067U Pending JPH0459175U (da)	1990-09-28	1990-09-28

Country Status (1)

Country	Link
JP (1)	JPH0459175U (da)

1990
- 1990-09-28 JP JP1990101067U patent/JPH0459175U/ja active Pending

Publication	Publication Date	Title
JPH047173U (da)	1992-01-22
JPS6359376U (da)	1988-04-20
JPS6447079U (da)	1989-03-23
JPS6336077U (da)	1988-03-08
JPH0351861U (da)	1991-05-20
JPS6430878U (da)	1989-02-27
JPH0472651U (da)	1992-06-26
JPH0447571U (da)	1992-04-22
JPS6222871U (da)	1987-02-12
JPH01166566U (da)	1989-11-22
JPH032673U (da)	1991-01-11
JPH0463147U (da)	1992-05-29
JPS6127371U (ja)	1986-02-18	混成集積回路
JPS6115173U (ja)	1986-01-29	メモリ−カ−ド
JPH033770U (da)	1991-01-16
JPH0288240U (da)	1990-07-12
JPH0292936U (da)	1990-07-24
JPS62154674U (da)	1987-10-01
JPS61109164U (da)	1986-07-10
JPS61100168U (da)	1986-06-26
JPH0336478U (da)	1991-04-09
JPH0184460U (da)	1989-06-05
JPH01121946U (da)	1989-08-18
JPS62188172U (da)	1987-11-30
JPH0286175U (da)	1990-07-09