JPH0461291A - Forming method for structure of compound semiconductor - Google Patents

Abstract

PURPOSE:To suppress introduction of surface contamination of compound semiconductor, impurities at a boundary by continuously conducting steps of emitting only first gas to the surface of the semiconductor to form a mask layer, emitting second gas and an electron beam to pattern the layer and etching it, heating the semiconductor in an atmosphere containing group V element under reduced pressure, and growing a crystal in vacuum vessels. CONSTITUTION:A first step of emitting first gas 51 to group III-V compound semiconductor 10 to form a mask layer 15, a second step of emitting second gas 53 and an electron beam to form a pattern on the mask and etching it, a third step of heating the semiconductor at an atmosphere in which the pressure of group V element for forming a compound semiconductor substrate is 10<-7>Torr or higher to remove the layer 15, a fourth step of growing a crystalline grown layer on the semiconductor by an epitaxial method are provided, and continuously conducted in a plurality of vacuum vessels 31 for setting the first to fourth steps to 1X10<-5>Torr or less.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for forming a patterned structure inside a compound conductor, and in particular, to a method for forming a patterned structure inside a compound conductor without exposing a III-V compound flat conductor substrate to air. This invention relates to a method for forming a buried structure in which a pattern is formed in a vacuum container and then a thin layer of crystal growth 4 is performed.

I. Prior Art Conventionally, elements using compound semiconductors have been fabricated through steps such as repeating crystal growth and etching several times and, in some cases, diffusing impurities.

How many people can make an embedded semiconductor laser chip?
The following steps are taken.

First, a GaAs buffer layer, an AlGaAs cladding layer, a Ga, As active layer, an AmGaAs cladding layer,
and a GaAs electrode layer are grown while simultaneously adding necessary impurities.

Second, a protective film such as a 5in2 film is formed on the surface of the semiconductor on which each layer has been grown, and a resist is applied to the surface. Next, a pattern corresponding to a laser stripe is exposed and developed to form a pattern on the resist.

Third, the cliff conductor is brought into contact with hydrofluoric acid (HF) to remove the protective film such as the 810) film in the area where there is no cyst pattern. Thereafter, the resist pattern is removed using fJ solvent.

Fourth, contact the cliff conductor with an etching solution containing sulfuric acid, etc. (does not etch the protective film), and remove the G of the epitaxial layer.
Etch to a depth that reaches the aAs buffer layer.

In No. 5 El, by liquid layer epitaxial method, AN
A GaAs layer is grown 2 and the etched portion is filled.

Step 6: Remove the protective film remaining on the surface.

As described above, the conventional method for forming a T-conductor structure requires many steps, and as a result, there is a problem in that it takes a long time to fabricate. Furthermore, when a striped pattern is formed by etching using a solution, there is a problem in that the surface of the '-2 conductor must be exposed to the atmosphere, and the surface may be contaminated by the atmosphere.

Therefore, the inventors invented a structure forming force method for compound-based conductors that solved these problems (Japanese Patent Application No. 1332640).

This invention continuously irradiates a first gas and irradiates light in a vacuum container to form a mask layer, forms a pattern with a second gas and an electron beam, and then sequentially irradiates a mask layer with a first gas and irradiates light. Etching is performed using gas No. 2, the mask is removed by heating, and then crystal growth is performed.

[Problems to be Solved by the Invention] However, the conventional method for forming a semiconductor structure requires many steps as described above, and as a result, there is a problem in that it takes a long time to create the structure. Also, in stripe form,
When forming a pattern by etching using a solution,
There is a problem that the semiconductor surface must be exposed to the atmosphere, and the surface may be contaminated by the atmosphere.

Further, the inventors' invention (Japanese Patent Application No. 1-332,640) also has the problem that when forming a mask, it requires the effort and equipment for irradiating light.

An object of the present invention is to simplify step -L of a method for forming a semiconductor structure in which pattern formation and subsequent crystal growth are performed continuously in a vacuum container.

``Means for Solving the Problems'' The present invention provides a first step of forming a mask layer by irradiating only the first gas without irradiating the surface of the ■-■ group compound semiconductor substrate with light; A pattern is formed on a mask by irradiating the surface of the ■-V group compound conductor substrate with a second gas different from the first gas and an electron beam. a second step of etching the compound semiconductor substrate to form a predetermined pattern; and removing the mask layer by heating the compound semiconductor in an atmosphere where the pressure of group V elements constituting the compound semiconductor substrate is 107 Torr or more. and a fourth step of growing a crystal growth layer on the surface of the compound semiconductor by an epitaxial method, and each of the first to fourth steps includes an IX
This is a method for forming a structure of a ①-V group compound semiconductor, characterized in that the process is carried out continuously in a plurality of vacuum vessels having a pressure of less than 10''□' Torr.

[Example code] The following is a detailed description of the invention with reference to the drawings.

First, the apparatus used in the pattern creation method of the present invention will be briefly explained.

The apparatus shown in Fig. 3 has a film forming chamber 3 for loading and unloading wafers into the apparatus and for forming etching masks.
1. MBE chamber 32 for epitaxial growth
, 4- Etching chamber '33 for selectively etching the conductor to form a pattern ##1. ,,−ζ exists.

These film forming chamber 3], MBE chamber 32, and etching chamber '3' are each connected to a sample exchange chamber 34 via a passage. And each passage has a gate valve "35"
a, 35b and 35c are provided. In addition, each room has 3
Vacuum pumps (not shown) such as turbomolecular pumps and ion pumps are installed in the 1st, 32.3m-3, and 4th chambers, respectively. Thereby, the wafer introduced into the apparatus can be transported to any chamber using the magnetic feedthroughs 36a, 36b and 6C without exposing the wafer to the wafer. Further, a sample heating chamber '3 [) is attached to the sample exchange chamber 134 via a passage.

The film forming chamber 31 is provided with a first gas introduction part (not shown) for introducing a first gas for forming an adsorbed molecule layer or a layer that reacts with the gas.

The etching chamber 33 also includes an electric beam generator 331 that generates an electronic beam, a second gas introduction section 38 that introduces a second gas used for etching, and a manipulator that adjusts the sample position. There are three types of equipment.

Referring to FIG. 4, the Kameko beam generator 331 is installed in the L section of the etching chamber 33, and the electric f-beam 41
irradiates the surface of the sample 42.). Further, a nozzle 43 of the second gas introduction section 1-8 is also provided so that the surface of the sample 42 can be irradiated with gas. Further, a heater 44 is provided in the F section of the sample 42, and the sample 42 can be heated without being heated by applying electricity from the current introduction terminal 45.

A first embodiment of the pattern forming method of the present invention will be described below with reference to FIGS. 1, 3, and 4.

First, the GaAsw plate]0 introduced into the film forming chamber 31 was transported to the sample heating chamber '30 using the magnetic feedthrough 36a and 'J36b. Sample heating chamber 30 1×1
The pressure of the Ga, As substrate was reduced to below 0''8 Torr and transported to the sample heating chamber '30, and the heating device installed inside heated it to about 20 degrees Celsius, and the state was maintained for 10 minutes. Through this treatment, water molecules adsorbed on the surface of the substrate 10 could be removed.

Next, the substrate 10 was transported to the MBE chamber 32 by the magnet feedthrough 36b. As shown in FIG. 1(a), a GaAs buffer layer 11 with a thickness of 0.2 μm is formed on the GaAs substrate 10 transported to the MBE chamber 32.
G a l-x A s cladding layer 1.2 (0<x<
1. ) of 12a, and the GaAs guide layer 13 of 0.
2 μπ was grown continuously. This wafer 14 is M B
A sample exchange chamber 34 connected to chamber E 32 by an ultra-high vacuum passage was transported to a film forming chamber 31 using a magnetic feedthrough 36b or the like.

The film forming chamber 1 is heated by a vacuum pump (not shown) such as a turbo molecular pump or an ion pump.
The residual gas pressure is 1. , X'C is maintained below 10-8 Torr.

Next, high-purity H2S, which is a first gas, is added to this film-forming chamber 31.
As shown in FIG. 1 (1)), the gas 51 has a partial pressure of I
It was introduced at a pressure of 0 '''''° Torr or higher. As a result, Ga
A sulfide film 15 was formed on the As guide layer 13. The density and thickness of this sulfide film 15 are as follows: H, S gas 5]
It was possible to control the introduction pressure and introduction time.

Subsequently, the pressure in the film forming chamber 31 is increased to IX using a vacuum pump.
After evacuation to below 10-7 Torr, the wafer 14 with the sulfide layer 5 was transferred to the etching chamber 33.
.

The wafer 14 transferred to the etching chamber 33 is attached to a wafer holder (not shown), the temperature is set to 70° C. by the heater 44, and the nozzle 4 is placed inside the etching chamber 33.
From No. 3, chlorine gas 53, which is a second gas, was introduced. The introduction of λ53 of chlorine causes i of several rrim diameter on the wafer surface.
A broad beam of C is irradiated over the surrounding area. At this time, the pressure inside the etching chamber rose to 1X10-5 Torr.

Simultaneously with the introduction of the chlorine gas 53, the surface of the wafer 14 was irradiated with electron beam 41. This electric r-bim 41 is
Its diameter is 50r+m and [1, 1θpA current is 15
It was scanned to draw a line and space pattern with a width of 0nrn. 1 bar.

The sulfide film 15 formed on the surface of 14 is exposed to chlorine gas 5.
Only the portion irradiated with both electron beam 3 and electron beam 4] separated from the surface of the wafer 14. That is, a line and space pattern was formed on the sulfide film 5 according to the scanning of the electron beam.

Then, when the electron beam irradiation is stopped, the wafer 14
As shown in FIG. 1(C), only the removed portion of the sulfide film 5 was etched with chlorine gas. This etching with chlorine gas is performed only on the uppermost GaAs guide layer] 3 layer thickness 3 The AF GaAs cladding layer below] 2
The etching rate is G a A s N
13, the results were almost the same for A, 9GaAs layer]2.

In this example, the surface of the compound semiconductor substrate is irradiated with a first gas to form a °C mask layer, and then pattern formation and etching are performed using a second gas and an F-beam.
Compound 1'7 can be used to form fine patterns without causing crystal defects near the conductor surface.

Next, in this way, a GaAs guide layer]3 and A are formed on the surface.
The wafer 14 having a pattern on the cladding layer with an Ω layer weight of 3s was again transported to the MBE chamber '32. MBE room 32
The surface of the wafer 14 transferred to the wafer 14 was heated to 550''C or higher without irradiating the surface with an arsenic molecular beam, and the surface cleaning was carried out for about 2 hours.

This surface cleaning removes the surface oxide film 15 that whitens the pattern and the GaAs layers 1-3 and A during etching.
Chlorine compounds and the like adhering to the surface of the lGaAs layer 12 were removed, making it possible to obtain a pure crystal surface.

(Reflected electron diffraction (RHEED) method was used to monitor the degree of cleaning.) Since a clean surface is obtained in this example, an epitaxial growth layer can be formed on the surface.

Subsequently, the A, Q-type Ga, -As upper composite layer 6 was formed at a thickness of 1.5 μra, and the GaAs oxidation prevention layer 17 was formed at a thickness of 0.1 μra.
,un grew. In this way, a desired buried structure as shown in FIG. 1(d) was obtained without taking the wafer out into the atmosphere from the ultra-high vacuum apparatus.

As mentioned above, in this example, all the bottom plugs were performed in a vacuum container, so that it was possible to improve the uniformity, controllability, and reproducibility of etching.

In this example, a case will be described in which H7S is used as the gas (first gas) for forming a mask on the surface of a compound semiconductor substrate. A similar effect could be obtained by using

In addition, in this example, chlorine gas was used as the second gas, but the same result can be obtained by using a gas containing at least one gas among halogen, halogen compound, V group hydride, hydrogen, and these radicals. The effect was obtained.

Next, a second embodiment will be described with reference to FIG. Here, the apparatus used in this example is the same as that in the first example.

First, the InP substrate 21 is carried into the MBE chamber 32 [2, InGaAsPG is deposited on its surface using gas source MBE.
An aAs layer 22I was grown. This wafer 23 is transferred to a film forming chamber 31, and as in the first embodiment, H and S gases 51 are introduced at an introduction pressure of 51 Torr as shown in FIG. 2(b). A surface sulfide film 24 as shown in Figure 5 was formed.

The 1nP wafer 23 with the sulfide film 24 formed on the surface of the wafer 23 in this manner was transferred to the etching chamber 33. The actual etching conditions in this example were as follows. That is, the substrate temperature was 300°C and the etching gas was 5°C.
4 and -c1 bromine: hydrogen -1.81.0 (temperature is 35
0° C.) was used. The electron beam is 20 O
It was scanned to form a grating (line and space pattern) of n rn width.

For this etching, the sulfide film 24 in the area 5 is removed by irradiating the electron beam on the area (see FIG. 2(e)).
Subsequently, InGaAsP of the part from which the sulfide 24 was removed
In this embodiment as well, the layer 22 can be etched without causing crystal defects, as in the first embodiment.

Subsequently, similarly to the first embodiment, the wafer 2'3 is
Transfer to chamber E 32 and remove sulfide film 24.

Thereafter, an InGaAsP active layer 25, an InP confinement layer 26, and an InGaAsP contact layer 27 were crystal-grown.

As a result, as shown in FIG. 2(d), a mesa was formed in the area irradiated with the electric fusing beam. In this etching, the etching depth of the portion irradiated with the electron beam was about 0.3 μm, and the etched surface was a mirror surface.

Note that the present invention is not limited to the above embodiments,
InAs and InSb are used as semiconductor materials.

Compounds such as GaP, InGaAIP, A#Ga5h etc.4
'Conductor C may be present.

[Effects of the Invention] According to the present invention, the first step is to form a mask layer by irradiating the surface of a compound semiconductor with only a first gas, and the step of forming a mask layer by irradiating the surface of a compound semiconductor with a second gas and an electron beam. a second step in which the layer is patterned and T-touching with a second gas; a third step in which the compound semiconductor is heated in a reduced pressure atmosphere containing a group V element; and a fourth step in which crystal growth is performed. By carrying out step X continuously in a vacuum container, a series of substrate processing and crystal growth processes can be carried out in a controlled atmosphere without exposing the compound semiconductor to the atmosphere. Surface contamination or the incorporation of impurities at the interface can be suppressed.

Further, since the compound semiconductor substrate can be processed and grown within one apparatus without being exposed to the atmosphere, time for cleaning the semiconductor surface, etc. can be omitted.

Furthermore, compared to wet etching, there are fewer steps and processing time can be shortened.

[Brief explanation of the drawing]

FIG. 1 is a process flow diagram of the first embodiment of the pattern forming force method of the present invention, FIG. 2 is a process flow diagram 5 of the second embodiment of the pattern forming method of the present invention, and FIG. , a schematic diagram of the vacuum system used in the process of the second example,
FIG. 4 is a perspective view of the single fitting chamber shown in FIG. 3. 10-GaAs substrate, 1l-GaAs buffer layer, 12...Ap x Ga 1-
As cladding layer, 13...GaAs guide layer, 14
...T, 1 bar 15...Sulfide film, 16-A
(1.Ga, -As upper craat layer, 17-GaAs anti-oxidation layer, 21-.Ir+P substrate, 22-1.nGaA
sP layer, 2'3-wafer 24... sulfide film 125.
...InGaAsP active layer 26-1 nP confinement layer, 27-1 nGa, AsP:7 contact layer 130...
Sample heating chamber, 31... film forming chamber. 31]...Window, 32...MBE room, 33...Etching room, 34=-sample exchange room, 35a, 35b, [35
c...Gate valve, 36a, 36b, 36cm=Magnetic feed through, 38...Second gas introduction part. 39... Manipulator, 41... Electric r-beam
42...GaAs substrate, 43...Gas nozzle, 44...
...Bee-tar, 45...Current introduction terminal, 5]...
H2S gas, 5-3 chlorine gas, 54... etching gas. Figure 1 Figure 3, /' Figure 2/ / / Figure 4'-~-51

Claims (1)

[Claims] 1. A first step of forming a mask layer by irradiating only a first gas without irradiating the surface of the III-V compound semiconductor substrate with light; forming a pattern on the mask layer by irradiating the surface of the semiconductor substrate with a second gas different from the first gas and an electron beam, and etching the III-V compound semiconductor substrate by irradiating the second gas. a second step of forming a predetermined pattern, and a pressure of 10^-^7 of the group V element constituting the compound semiconductor substrate.
a third step of heating the compound semiconductor in an atmosphere of Torr or higher to remove the mask layer; a fourth step of growing a crystal growth layer on the surface of the compound semiconductor by an epitaxial method; A method for forming a structure of a III-V compound semiconductor, characterized in that the fourth step is successively carried out in a plurality of vacuum chambers each having a pressure of 1×10^-^5 Torr or less. 2. The method for forming a structure of a III-V compound semiconductor according to claim 1, wherein a gas containing sulfur is used as the first gas. 3. The second gas is a halogen, a halogen compound, V
3. The method for forming a III-V compound semiconductor structure according to claim 1, wherein the gas is a gas containing at least one of a group hydride, hydrogen, and a radical thereof. 4. Claims 1 and 2, wherein the second step is performed while heating the III-V group compound semiconductor substrate.
, and the method for forming a structure of a III-V compound semiconductor according to 3.