JPH0461492B2 - - Google Patents

Description

Detailed Description of the Invention "Industrial Application Field" The present invention is a method for easily forming patterned electrodes, wiring, and insulating layers on a substrate while preventing damage to elements in the manufacturing process of semiconductor integrated circuits. The present invention relates to a method for forming a finely patterned layer that can be formed with a reduced amount.

"Prior Art and Problems" As is well known, in the process of forming a patterned layer by lift-off, if the cross section of the resist is shaped to have an eaves, deposits on the substrate (which will form the intended patterned layer) and the resist The reproducibility is good because the deposits are separated. The following three techniques are known as conventional techniques related to resist cross-sectional shape control for this purpose.

First, the first method consists of the steps shown in FIG. 2a. In step (), a resist with a slightly high sensitivity is applied as the first resist 2 onto the substrate 1,
In step (), apply resist 4 with a slightly lower sensitivity,
When exposure processing is performed in step () and development processing is performed in step (), a pattern with large dimensions is generated in the high-sensitivity resist, so that an overhang is formed. Next, in step (), a pattern constituent material 5 such as a desired metal or insulator is deposited by means such as vapor deposition, and in step (), the resist is dissolved and removed to form a patterned layer on the substrate 1. obtain.

This technique is superior in terms of simplicity, but
The combination of two layers, which can be developed using sensitivity differences in one development, changes the sensitivity of polymethyl methacrylate (PMMA) and its copolymer or monomer and phenyl methacrylate/methacrylic acid copolymer. Only two types are known. Although these resists are sensitive to electron beams and far ultraviolet light, they have the drawback that they cannot be exposed with normal exposure equipment that has a wavelength of 350 to 430 nm. (Reference: Warren et al., IEEE Journal of Solid
-State Circuits, Vol SC-14, No.2 p-282,
1979) The second one consists of the steps shown in Figure 2b. In step (), the first resist 2 is applied to the substrate 1.
Apply. PMMA, PGMA as a resist
(polyglycidyl methacrylate), FPM, etc. Then, in step (), a second resist 4 is applied. As the second resist 4, well-known resist agents such as AZ and CMS (chloromethylated polystyrene) are used. Exposure processing is performed in step (). Using AZ, patterns can be formed using the wavelengths of normal exposure equipment. In step (), development is performed, and then in step (), the first resist 2 is etched by plasma etching using CCl ₄ gas until an eaves are formed. After that, the second
The same processing as steps () and () in Figure a is performed.

This technique utilizes the fact that the second resist 4 has a masking effect in the plasma of CCl ₄ gas, and the first resist 2 is etched more quickly. Disadvantages of this technique include damage to semiconductor elements caused by plasma, long process times due to the use of reactive ion etching equipment (RIE), and the fact that some substrates may be etched. (Akitani et al., 1981 Autumn Japan Society of Applied Physics 28a-L-
2) The third one consists of the steps shown in Figure 2c. First, in step (), a first resist 2 is applied to a substrate 1. Next, in step (), a silicon oxide film, metal, etc. is deposited as an inorganic layer 3, a second resist 4 is applied in step (), the second resist 4 is exposed in step (), and a second resist 4 is exposed in step (). 2 Develop the resist 4. Next, the inorganic layer 3 is etched by plasma in step (), and the first resist 2 is etched by oxygen plasma (ozone) in step () until a canopy is formed.
The subsequent steps are the same as steps () and () in FIG. 2a.

This technique has the disadvantages of a large number of steps and damage to the device due to plasma. (Literature: Tadokoro, Electronics letters, Vol 18,
No. 13p-543, 1982.) This invention was made in view of the above circumstances, and uses a photoresist that is exposed to the wavelength of a normal optical exposure device as a patterning resist, making it easy to use without using a vacuum device such as RIE. The purpose of this invention is to provide a lift-off technique (patterned layer forming method) with good reproducibility by creating a resist eaves structure for lift-off using a process that causes less damage to semiconductor elements.

``Means for Solving the Problems'' The present invention provides that the etch rate of the resist by ozone is significantly different between a novola resin/quinonediade resist such as AZ and a polymethyl methacrylate or polyalkyl methacrylate resist, and the latter is faster than the former. Taking advantage of the high speed, the first resist (latter) is etched using the second resist (former) as a mask in the step () of FIG. 2b.

"Operation" In the above configuration, ozone can be generated in an oxygen-containing atmosphere using light at a wavelength of 184.9 nm from a low-pressure mercury lamp, a process that can be performed even in normal air, and does not require a vacuum device.

The first resist (lower layer) used has the following structural formula.

Polyalkyl methacrylates; FBM; CH ₂ -CF ₂ -CHF-CF ₃ (alkyl group R) FPM; CH ₂ -CF ₂ -CF ₂ -H (alkyl group R) Literature (Koichiro Otori "Semiconductor lithography technology"
According to Sangyo Tosho, Chapter 2, 1984), when the number of carbon atoms in the above R is 5 or less, main chain scission tends to occur and decomposition into products with small molecular weight occurs. Therefore, CO ₂ , H ₂ O is released by ashing by ozone.
Because it easily volatizes as a gas, it will be etched.

The second resist (upper layer) has the following structural formula.

Select the structure shown below in which a quinone diad is bonded to part of the phenol and CH ₂ chain through an OH, such as . Generated from low pressure mercury lamps
When irradiated with ultraviolet light of 300 nm or less, this resist crosslinks and its molecular weight increases, decomposition by ozone and crosslinking proceed simultaneously, and the resist itself is hardly etched, so it can be used as a mask.

Therefore, according to the method of the present invention, a photoresist that is exposed to the wavelength of a normal optical exposure device can be used as a patterning resist, and it can be easily carried out without using a vacuum device such as RIE. A resist canopy structure for lift-off can be easily created through a process that causes less damage to semiconductor elements, and thereby lift-off can be performed with good reproducibility.

The present invention will be explained in more detail below with reference to Examples.

"Embodiment 1" FIG. 1a shows a first embodiment of the present invention. First, a FPM (one of polyacryl methacrylates) resist (first resist) 2 is coated on a semiconductor substrate 1 to a thickness of 0.5 μm, and heated at 250°C for 30 minutes.
The coating solvent is released by heat treatment for 30 minutes (step). Next, apply AZ resist (second resist) 4.
After coating 1.2μm, heat treatment is performed at 90℃ for 15 minutes (process). Exposure processing is performed using an exposure device with a wavelength in the range of 350 nm to 430 nm. Exposure time varies depending on the device because the intensity of light varies (process). Developing with an alkaline developer (process). The second resist 4 is etched by irradiating it with light from a low-pressure mercury lamp in an atmosphere containing oxygen. wavelength spectral distribution,
Of course, the etching time will vary depending on the strength, but approximately
There is an example in which etching was performed in about 10 minutes in an 80% oxygen atmosphere. Processes () to () are lift-off processes similar to the conventional process.

"Embodiment 2" FIG. 1b shows a second embodiment of the invention. First, the steps () are the same. next,
Aluminum (inorganic layer) on this first resist 2
3 was deposited and adhered to a thickness of 0.01 μm by vacuum evaporation method (step). Next, an AZ resist is applied as the second resist 4 (step), and an exposure process is performed (step). In the development process, the aluminum 3 with a thickness of 0.01 μm is etched at the same time without changing the normal development conditions (step). Furthermore, the same light irradiation as in Example 1 is carried out, and etching is carried out until a canopy is formed. The subsequent steps are the same as conventional ones. The common advantages of these examples are that the canopy processing does not require the use of vacuum equipment and is simple; unlike when plasma is used, there is no damage to the substrate; and at the same time, ozone does not damage the substrate surface. It also has a cleaning effect, and because AZ resist polymerizes when exposed to light, it also improves heat resistance and suppresses pattern deformation during the vapor deposition process.

"Effects of the Invention" As explained above, according to the present invention, a patterned layer of metal, insulator, etc. can be formed on a semiconductor substrate, and wiring, bonding, and other fine structures can be easily manufactured. can do. In addition, the process is relatively simple, and it is expected that the process will be shortened and the device characteristics will be improved, such as less damage to the substrate, so it is suitable for use in the semiconductor integrated circuit manufacturing process.

[Brief explanation of the drawing]

Fig. 1a is a process diagram for explaining the first embodiment of the present invention, Fig. 1b is a process diagram for explaining the second embodiment of the invention, Figs. 2a and b ，
3C is a process diagram for explaining a conventional patterned layer forming method. DESCRIPTION OF SYMBOLS 1... Substrate, 2... First resist, 3... Inorganic layer, 4... Second resist, 5... Pattern constituent material.

Claims (1)

[Scope of Claims] 1. A method for forming a finely patterned layer, comprising at least the following six steps. (b) Any one of polymethyl methacrylate or polyalkyl methacrylates having an alkyl group having 1 to 5 carbon atoms that tends to cause main chain scission preferentially is applied to the substrate as the first resist.
A first resist forming step of coating as a resist. (b) A second resist forming step in which a photoresist having a structure in which quinone diad is bonded to a novolatile resin is applied as a second resist. (c) A pattern forming step of forming openings in the second resist by subjecting the second resist to normal exposure treatment and development treatment with an alkaline solution. (d) Using the second resist as a mask, the first resist is irradiated with light from a low-pressure mercury lamp having wavelengths of 253.7 nm and 184.9 nm in an oxygen-containing atmosphere.
Etching process to etch the resist. (e) A deposition process of depositing and adhering pattern constituent materials such as metals and insulators on the substrate after the etching process. (f) A lift-off step in which the deposits on the resist are removed from the substrate together with the resist using an organic solvent, a resist stripping agent, etc., leaving only the deposits on the substrate exposed in the opening. 2. A claim characterized in that after step (a) is completed, an inorganic layer such as aluminum that can be etched with an alkaline solution is deposited on the substrate, and then steps (b) to (f) are performed. The method for forming a finely patterned layer according to item 1.