JPH0462501B2 - - Google Patents

Info

Publication number
JPH0462501B2
JPH0462501B2 JP20582384A JP20582384A JPH0462501B2 JP H0462501 B2 JPH0462501 B2 JP H0462501B2 JP 20582384 A JP20582384 A JP 20582384A JP 20582384 A JP20582384 A JP 20582384A JP H0462501 B2 JPH0462501 B2 JP H0462501B2
Authority
JP
Japan
Prior art keywords
circuit
switch
delay
audio signal
audio
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP20582384A
Other languages
Japanese (ja)
Other versions
JPS6184133A (en
Inventor
Ryoji Katsube
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP20582384A priority Critical patent/JPS6184133A/en
Publication of JPS6184133A publication Critical patent/JPS6184133A/en
Publication of JPH0462501B2 publication Critical patent/JPH0462501B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H60/00Arrangements for broadcast applications with a direct linking to broadcast information or broadcast space-time; Broadcast-related systems
    • H04H60/02Arrangements for generating broadcast information; Arrangements for generating broadcast-related information with a direct linking to broadcast information or to broadcast space-time; Arrangements for simultaneous generation of broadcast information and broadcast-related information
    • H04H60/06Arrangements for scheduling broadcast services or broadcast-related services
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/12Arrangements for observation, testing or troubleshooting
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H20/00Arrangements for broadcast or for distribution combined with broadcast
    • H04H20/12Arrangements for observation, testing or troubleshooting
    • H04H20/14Arrangements for observation, testing or troubleshooting for monitoring programmes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H60/00Arrangements for broadcast applications with a direct linking to broadcast information or broadcast space-time; Broadcast-related systems
    • H04H60/09Arrangements for device control with a direct linkage to broadcast information or to broadcast space-time; Arrangements for control of broadcast-related services
    • H04H60/14Arrangements for conditional access to broadcast information or to broadcast-related services
    • H04H60/19Arrangements for conditional access to broadcast information or to broadcast-related services on transmission of information
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04HBROADCAST COMMUNICATION
    • H04H60/00Arrangements for broadcast applications with a direct linking to broadcast information or broadcast space-time; Broadcast-related systems
    • H04H60/27Arrangements for recording or accumulating broadcast information or broadcast-related information

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Transmitters (AREA)
  • Control Of Amplification And Gain Control (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ラジオ放送品質管理装置、特にデジ
タル遅延回路を用いるラジオ放送品質管理装置に
関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a radio broadcast quality control device, and particularly to a radio broadcast quality control device using a digital delay circuit.

〔従来の技術〕[Conventional technology]

生放送時に、突発的に発生する音声のみだれと
か、放送用禁止用語に対しそれをモニタし消去す
るためには、音声を約10秒以上遅らせる遅延装置
が必要である。この遅延装置を、従来では磁気テ
ープ(テープレコーダ)により録音用ヘツドと再
生用ヘツドの間隔を広く取ることにより行なつて
いた。例えばテープ走行スピードが38cm/secの
時に、10秒間遅延させるには380cmの間隔が必要
となる。しかしこの場合、テープレコーダの構造
上装置自体が大きくなり、しかも音声信号の遅延
量が固定化される欠点があつた。
In order to monitor and eliminate sudden garbled sounds and prohibited words for broadcasting during live broadcasting, a delay device that delays the sound for about 10 seconds or more is required. Conventionally, this delay device has been implemented by using a magnetic tape (tape recorder) by widening the distance between the recording head and the reproducing head. For example, when the tape running speed is 38 cm/sec, an interval of 380 cm is required to delay the tape for 10 seconds. However, in this case, due to the structure of the tape recorder, the device itself becomes large, and the delay amount of the audio signal is fixed.

〔解決すべき問題点〕[Problems to be solved]

本発明は、遅延装置が構造上大きくなり、しか
も音声信号の遅延量が固定化されるという従来の
問題点を解決し、小型で、しかも遅延時間の変化
に対処できかつクリツクの発生のないようにする
ものである。
The present invention solves the conventional problem that the delay device is structurally large and the amount of delay of the audio signal is fixed. It is meant to be.

〔問題点の解決手段〕[Means for solving problems]

本発明のラジオ放送品質管理装置は、音声信号
を符号化、復合化するA/D及びD/Aコンバー
タと、符号化されたデジタルデータを遅延させる
遅延回路と、入力音声信号をモニタするためのモ
ニタ回路と、音声信号を消去するためのスイツチ
と、その信号によりデジタル音声信号を消去する
フエードイン、フエードアウト回路を備えたミユ
ーテイング回路とからなる構成とすることによ
り、上記従来の問題点を解決している。
The radio broadcasting quality control device of the present invention includes an A/D and D/A converter for encoding and decoding audio signals, a delay circuit for delaying encoded digital data, and a circuit for monitoring input audio signals. The above-mentioned conventional problems can be solved by adopting a configuration consisting of a monitor circuit, a switch for erasing the audio signal, and a muting circuit equipped with a fade-in/fade-out circuit that erases the digital audio signal using that signal. There is.

〔実施例〕〔Example〕

次に本発明の実施例について第1図及び第2図
を用いて説明する。このラジオ放送品質管理装置
は、第1図に示すように、音声信号を符号化する
A/D及びD/Aコンバータ1,5と、遅延回路
2と、音声を消去させるためのミユーテイング回
路6と、音声を消去するためのSW1と入力音声
信号をモニタするためのモニタ回路23で構成さ
れる。遅延回路2はデジタルメモリ19と、書き
込みアドレス発生器4と、可変遅延可能にするた
めの読み出しアドレス発生器9,21とで構成さ
れる。音声消去回路6はアツプダウンカウンタ3
と乗算器7とで構成される。入力音声信号11
は、A/Dコンバータ1によりデイジタル値12
に変換され、メモリ19の書き込みアドレス回路
4により指定されたアドレス20に書き込まれ
る。メモリ19からのデータの読み出しは、書き
込みアドレス20から、可変可能な遅延データ9
を減算し発生させた。アドレス18により行な
い、信号ライン13を通してミユーテイング回路
6へ入力する。この遅延回路2は最小でも10秒の
音声遅延を得られるだけのメモリを有し、又遅延
データを可変することにより0秒からメモリ量の
ゆるす最大遅延量までステツプ状に可変可能であ
る。消去回路6では、入力されたデジタルデータ
13にカウンタ3から発生した係数8を乗算器7
により、演算し出力する。係数8は、0から1の
デジタル値であり、スイツチSW1のON―OFF
によつてコントロールされる。ミユーテイング回
路6からの出力データは信号ライン14を通り
D/Aコンバータ5に入力される。さらにD/A
コンバータ5で復合化され出力音声信号15を得
る。音声信号の消去はスイツチSW1をONにす
ることにより行なわれる。この時の動作を第2図
によつて説明する。スイツチSW1がOFF状態の
時信号ライン16はハイレベルであり、カウンタ
3はUPモードで、係数8は1にホールドされて
いる。(第2図のスイツチSW1ON状態期間)。
この時スイツチSW1をONにするとスイツチ結
線部16はローレベルになり、カウンタはダウン
モードに切り変わり係数8は1から0へとクロツ
ク22単位で小さくなり、0でホールドする(第
2図のの期間を示す)。この係数の変化により
出力音声信号15は、フエードアウトする。スイ
ツチSW1をこのままおしつづけると音声は削去
されたままである(第2図の期間)。さらにス
イツチSW1をOFFにすると再び信号ライン16
はハイレベルになりカウンタ3はUPモードに切
り変わり係数はクロツク22により0から1に変
化し1でホールドする。この係数の変化により出
力音声信号15はフエードインする(第2図の
の期間を示す)。この装置によりモニタ者は入力
音声信号11をスピーカ10により聞き、スイツ
チSW1の装作により放送中の音声をクリツクな
く消去が可能である。
Next, an embodiment of the present invention will be described using FIGS. 1 and 2. As shown in FIG. 1, this radio broadcasting quality control device includes A/D and D/A converters 1 and 5 for encoding audio signals, a delay circuit 2, and a muting circuit 6 for erasing audio. , a switch 1 for erasing audio, and a monitor circuit 23 for monitoring input audio signals. The delay circuit 2 is composed of a digital memory 19, a write address generator 4, and read address generators 9 and 21 for making variable delay possible. The audio cancellation circuit 6 is an up-down counter 3
and a multiplier 7. Input audio signal 11
is a digital value of 12 by A/D converter 1.
and is written to the address 20 designated by the write address circuit 4 of the memory 19. Data is read from the memory 19 from the write address 20 using variable delay data 9.
was generated by subtracting. This is done by address 18 and is input to the muting circuit 6 through signal line 13. This delay circuit 2 has a memory sufficient to obtain an audio delay of at least 10 seconds, and can be varied stepwise from 0 seconds to the maximum delay allowed by the memory capacity by varying the delay data. In the erasing circuit 6, a multiplier 7 adds a coefficient 8 generated from the counter 3 to the input digital data 13.
Calculate and output. Coefficient 8 is a digital value from 0 to 1, and is the ON-OFF value of switch SW1.
controlled by. Output data from the muting circuit 6 is input to the D/A converter 5 through a signal line 14. Furthermore, D/A
The converter 5 decodes the signal to obtain an output audio signal 15. The audio signal is erased by turning on the switch SW1. The operation at this time will be explained with reference to FIG. When the switch SW1 is in the OFF state, the signal line 16 is at a high level, the counter 3 is in the UP mode, and the coefficient 8 is held at 1. (Switch SW1 ON state period in Figure 2).
At this time, when the switch SW1 is turned on, the switch connection 16 becomes low level, the counter switches to the down mode, and the coefficient 8 decreases from 1 to 0 in units of 22 clocks, and is held at 0 (as shown in Fig. 2). period). This change in coefficient causes the output audio signal 15 to fade out. If you continue to press switch SW1 as it is, the audio will remain deleted (during the period shown in Figure 2). Furthermore, when switch SW1 is turned OFF, the signal line 16 is turned off again.
becomes high level, the counter 3 switches to UP mode, and the coefficient changes from 0 to 1 by the clock 22 and is held at 1. This change in coefficient causes the output audio signal 15 to fade in (as shown in period 1 in FIG. 2). With this device, a monitor can listen to the input audio signal 11 through the speaker 10, and can erase the audio being broadcast without clicking by installing the switch SW1.

〔発明の効果〕〔Effect of the invention〕

本発明のラジオ放送品質管理装置は、以上説明
したように、音声信号を符号化、復合化するA/
D及びD/Aコンバータと、符号化されたデジタ
ルデータを遅延させる遅延回路と、入力音声信号
をモニタするためのモニタ回路と、音声信号を消
去するためのスイツチと、その信号によりデジタ
ル音声信号を消去するフエードイン、フエードア
ウト回路を備えたミユーテイング回路とからなる
構成としたため、入力音声信号をモニタ回路によ
りモニタすることにより放送できるか否か判断
し、放送に不適当な音声スイツチを使用し消去で
き、従来に比し小型化が可能となるうえに、遅延
時間の変化にも対処でき、更にクリツクも生じな
いという効果がある。
As explained above, the radio broadcasting quality control device of the present invention has an A/
A D and D/A converter, a delay circuit for delaying encoded digital data, a monitor circuit for monitoring an input audio signal, a switch for erasing the audio signal, and a digital audio signal using the signal. Since it is configured with a muting circuit equipped with fade-in and fade-out circuits for erasing, it is possible to judge whether or not it can be broadcast by monitoring the input audio signal with a monitor circuit, and erase it by using an audio switch that is inappropriate for broadcasting. In addition to being able to be made smaller than before, it also has the advantage of being able to cope with changes in delay time and not causing clicks.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は、本発明の一実施例を示す回路図、そ
して、第2図は、スイツチのON―OFFの時の出
力信号状態を示す説明図である。 1…A/Dコンバータ、2…遅延回路、5…
D/Aコンバータ、6…ミユーテイング回路、1
1…入力音声信号、23…モニタ回路、SW1…
スイツチ。
FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is an explanatory diagram showing the output signal state when the switch is turned on and off. 1...A/D converter, 2...delay circuit, 5...
D/A converter, 6... Muting circuit, 1
1...Input audio signal, 23...Monitor circuit, SW1...
Switch.

Claims (1)

【特許請求の範囲】[Claims] 1 音声信号を符号化、復号化するA/D及び
D/Aコンバータと、符号化されたデジタルデー
タを遅延させる遅延回路と、入力音声信号をモニ
タするためのモニタ回路と、音声を消去するため
のスイツチと、その信号によりデジタル音声信号
を消去するフエードイン、フエードアウト回路を
備えたミユーテイング回路とからなるラジオ放送
品質管理装置。
1. A/D and D/A converters for encoding and decoding audio signals, a delay circuit for delaying encoded digital data, a monitor circuit for monitoring input audio signals, and for erasing audio. A radio broadcasting quality control device consisting of a switch and a muting circuit equipped with a fade-in/fade-out circuit that erases a digital audio signal using the switch.
JP20582384A 1984-10-01 1984-10-01 Device for managing quality of radio broadcast Granted JPS6184133A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20582384A JPS6184133A (en) 1984-10-01 1984-10-01 Device for managing quality of radio broadcast

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20582384A JPS6184133A (en) 1984-10-01 1984-10-01 Device for managing quality of radio broadcast

Publications (2)

Publication Number Publication Date
JPS6184133A JPS6184133A (en) 1986-04-28
JPH0462501B2 true JPH0462501B2 (en) 1992-10-06

Family

ID=16513291

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20582384A Granted JPS6184133A (en) 1984-10-01 1984-10-01 Device for managing quality of radio broadcast

Country Status (1)

Country Link
JP (1) JPS6184133A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4160523B2 (en) 2004-03-17 2008-10-01 株式会社エヌ・ティ・ティ・ドコモ Sound information provision system

Also Published As

Publication number Publication date
JPS6184133A (en) 1986-04-28

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term