JPH0463565B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an operational amplifier circuit composed of two MOS transistors.

In order to obtain a high-impedance output state in addition to normal linear operation in an operational amplifier consisting of two MOS transistors, conventionally, as shown in Figure 1, the output circuit is
MOS transistors Q3 and Q4 were inserted and connected in series to MOS transistors Q1 and Q2. In other words, between the MOS transistor Q1 and the power supply VDD,
A MOS transistor Q3 of the same type as the MOS transistor Q1 was connected, and a MOS transistor Q4 of the same type as the MOS transistor Q2 was connected between the MOS transistor Q2 and the zero potential VDD.
Then, control signal A is set to "H" (high) and "L" to the gate electrodes of MOS transistors Q3 and Q4.
(low), these MOS transistors Q
3. By turning off Q4, the output OUT becomes a high impedance state, and the control signal A becomes "L".
When A is “H” applied, MOS transistors Q3 and Q
4 was turned on to derive a normal output signal. That is, by control signal A,
The on/off control of the MOS transistors Q3 and Q4 was used to switch the output circuit between a high impedance state and normal operation.

In the conventional circuit shown in Figure 1, the output circuit can be placed in a high impedance state, but when performing normal linear operation, the MOS transistor Q
3. There is a problem in that the on-resistance of Q4 cannot be ignored and reduces the output current drive ability. In order to solve this problem, it is possible to increase the W/L (width to length ratio) of the MOS transistor, but
Increasing this means increasing the size of the element, which in the case of LSI requires a large chip size, and in the case of discrete devices, the drawback is that the circuit area becomes large.

Therefore, an object of the present invention is to eliminate the drawbacks of the above-mentioned conventional circuits, eliminate the need to worry about the on-resistance of MOS transistors, and use relatively small elements.
An object of the present invention is to provide an operational amplifier circuit that can put an output circuit in a high impedance state even on a chip.

In order to achieve the above object, the operational amplifier circuit of the present invention has a power supply voltage between a high potential point and a low potential point.
A first MOS transistor of P type and a first MOS transistor of N type, the conducting electrodes of which are connected in series with each other.
MOS transistor and this P type first
A P-type second conductive electrode is connected between the MOS transistor and the high potential point of the power supply voltage.
a MOS transistor and the N type first
A second N-type conductive electrode is connected between the MOS transistor and the low potential point of the power supply voltage.
a MOS transistor, a differential amplifier that outputs a signal to the gate electrode of either the P-type or N-type first MOS transistor, and a constant current circuit of the differential amplifier. A current mirror circuit composed of a pair of MOS transistors of a different type from the MOS transistor to which the output signal is connected is provided.
Both gate electrodes of the MOS transistors are connected to the gate electrode of the MOS transistor which is not supplied with the output signal of the differential amplifier among the P type and N type first MOS transistors, and the second P-type MOS transistor,
By applying control signals whose phases are inverted to each other to the gate electrodes of the second N-type MOS transistor, the output signal of the differential amplifier is amplified, and the control signals of the first P-type and N-type MOS transistors are amplified. The operating state in which the output is output from the connection point and the operating state in which this output terminal is in a high resistance state can be arbitrarily selected.

Hereinafter, the present invention will be explained in more detail with reference to embodiments shown in the drawings.

FIG. 2 is a circuit diagram of an operational amplifier showing one embodiment of the present invention. In the figure, the operational amplifier is composed of a pre-stage amplifier 1 and an output circuit 2, both of which are composed of MOS transistors. The front-stage amplifier 1 includes a constant current source circuit consisting of a resistor R, P-type MOS transistors Q15 and Q16, N-type MOS transistors Q19 and Q20 as active loads, and a P-type MOS transistor for inverting amplification.
Although it is composed of a MOS transistor Q17 and a P-type MOS transistor Q18 for non-inverting amplification, this pre-stage amplifier 1 is already a well-known circuit and is not a characteristic part of this invention.
A detailed explanation thereof will be omitted.

The output circuit 2 is composed of P-type MOS transistors Q11 and Q13 and N-type MOS transistors Q12 and Q14. MOS transistors Q11 and Q12 are connected in series, and the connection point of their conducting electrodes is an output terminal OUT.
Further, the other conductive electrode of the MOS transistor Q11 is connected to the power supply VDD, and the other conductive electrode of the MOS transistor Q11 is connected to the power supply VDD.
The other conducting electrode of 12 is connected to zero potential VSS. Further, the output signal of the preamplifier 1 is input to the gate electrode of the MOS transistor Q12.

The conduction electrode of MOS transistor Q13 is connected to the power supply
It is connected between VDD and the gate electrode of the MOS transistor Q11, and a control signal is input to the gate electrode. Further, the conduction electrode of MOS transistor Q14 is connected to the conductive electrode of MOS transistor Q14.
It is connected between the gate electrode of No. 2 and the zero potential VSS, and a control signal A is input to the gate electrode.

In the embodiment circuit configured as described above, when the output terminal OUT of the output circuit 2 is placed in a high impedance state, the control signal is set to "H" (
input with “L”). This control signal A turns on MOS transistors Q13 and Q14,
Therefore, the gate electrode of MOS transistor Q11 is held at "H", and conversely, the gate electrode of MOS transistor Q14 is held at "L", and both MOS transistors Q11 and Q12 are turned off. This puts the output terminal OUT in a high impedance state.
Furthermore, by applying an "H" voltage to the gate terminals of transistors Q15 and Q16, transistors Q15 and Q16 are also turned off, so that
Current also stops flowing through transistors Q17 and Q18. In other words, when the control signal A is set to "H" in this circuit, the output circuit 2 becomes a high impedance state, and the pre-stage amplifier 1 is also turned off (except for the resistor R), and the current consumption of the entire circuit is almost zero. limited to.

Next, when performing normal linear operation, control signal A is set to "L" (changed to "H") and input.
With this control signal A, MOS transistors Q13,
Q14 is off, so MOS transistors Q11 and Q12 respond to the signal input from the preamplifier 1 and derive an output signal corresponding to the input signal from the output terminal OUT.

FIG. 3 shows an example of a modified circuit having a configuration similar to that of the present invention. This circuit uses N-type MOS transistors for the inverting and non-inverting amplifiers of the preamplifier 1, and the MOS transistors of the output circuit 2.
Front-stage amplifier 1 is connected to the gate electrode of transistor Q11.
The output signal is inputted, but the operation can be considered to be exactly the same as that of the embodiment circuit shown in FIG.

According to the operational amplifier circuit of the present invention, the MOS transistor for switching between normal linear operation and high impedance output state is placed between the gate electrode of the first MOS transistor for output and the power supply potential, and between the gate electrode of the first MOS transistor for output and the second MOS transistor for output. The on-resistance of the switching MOS transistor is not a problem at all when linear operation is performed, and therefore the W/ of this switching MOS transistor is Even if L is smaller than the conventional one, the current drive ability of the output will not be reduced. Also, for switching (control)
When the MOS transistor is controlled to be on, the current in the circuit is almost zero, and power consumption is extremely low.
Therefore, using two MOS transistors,
It is possible to obtain an operational amplifier whose output can be brought into a high impedance state and whose chips and elements are kept small.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing a conventional operational amplifier configured with two MOS transistors, Figure 2 is a circuit diagram of an operational amplifier configured with MOS transistors showing an embodiment of the present invention, and Figure 3 is a circuit diagram of a conventional operational amplifier configured with MOS transistors. FIG. 3 is a circuit diagram showing a modified circuit of the invention. Q11, Q12...Output MOS transistor,
Q13, Q14...3-state switching MOS transistors.

Claims (1)

[Claims] 1. A first P-type device in which conductive electrodes are connected in series between a high potential point and a low potential point of the power supply voltage.
a MOS transistor, an N-type first MOS transistor, and a P-type second MOS transistor having a conductive electrode connected between the gate electrode of the P-type first MOS transistor and a high potential point of the power supply voltage. and a second N-type MOS transistor having a conduction electrode connected between the gate electrode of the first N-type MOS transistor and a low potential point of the power supply voltage, and the first P-type or N-type MOS transistor. a differential amplifier that outputs a signal to the gate electrode of either one of the MOS transistors;
It is equipped with a current mirror circuit consisting of a pair of MOS transistors of a different type from the MOS transistor, and the pair of MOS transistors that make up this current mirror circuit are
Both gate electrodes of the MOS transistors are connected to the gate electrode of the MOS transistor which is not supplied with the output signal of the differential amplifier among the P-type and N-type first MOS transistors, and the second P-type MOS transistor,
By applying control signals whose phases are inverted to each other to the gate electrodes of the second N-type MOS transistor, the output signal of the differential amplifier is amplified and the output signal of the first N-type MOS transistor is amplified.
An operational amplifier circuit that can arbitrarily select an operating state in which an output is output from a connection point between P-type and N-type MOS transistors, and an operating state in which this output terminal is in a high resistance state.