JPH0465121A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To improve the reliability of a protective layer by forming a second insulating layer not including boron on a SiN protective layer of a high resistance part and thereafter depositing and forming a third insulating layer including boron. CONSTITUTION:An NSG film 1 is deposited and formed on a Si substrate 12 in which a high resistance poly-Si part 11 is formed via a SiO2 CVD film 10 with its uneven surface on the protruded part of the same surface. The film is annealed in the atmosphere of N2 gas and successively a SiN film 2 is deposited. Then, the SiN film is patterned such that it is not left in a contact hole part. After the patterning, an NSG film 3 is deposited and formed on the patterned SiN film in the same manner as in the NSG film 1, and is annealed. Further, a second insulating layer 4 as a BPSG film is deposited thereon and is melted at a high temperature in the atmosphere of N2.

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Industrial Application Field The present invention relates to a method of manufacturing a semiconductor device, and more particularly to an SRAM equipped with a polyconductor portion having a high resistance of 200 to 100 GΩ.

(b) Prior art In the conventional manufacturing process of a device equipped with this type of high-resistance polycrystalline silicon (hereinafter referred to as a high-resistance portion), as shown in FIG. ．．
After forming the high resistance part 20 on the Si substrate 22 having the film 26, SiN@21 is deposited on the high resistance part 20 by the CVD method.
A structure is adopted in which the high resistance portion 20 is covered with a SiN film 21 so as to protect the high resistance portion 20.

This is because the electrical resistance value of the high-resistance part decreases through subsequent plasma process steps, such as depositing a CVD film by plasma CVD, etching by RIE, H, and non-termination. This is to prevent this.

After that, 23 types of BPSG films were applied to the entire surface, and then 9
The BPSG film 23 is melted in a N gas atmosphere at a high temperature of 00 to 950° C., and a contact hole 24 reaching the BPSG film 23 film type 3L substrate 22 is formed by a known method, and finally a metal wiring 25 is formed by a sputtering method. I was doing it.

(c) Problems to be Solved by the Invention However, the BPSG film 23 is deposited on the SiN protective film 21.
When heat treatment is applied, N in SiN and B in BPSG (
BxNy-n
There is a possibility that compounds such as HlO will appear on the BPSG film 23.

(d) Means and operation for solving the problem The above problem is caused by direct contact between the SiN film and the BPSG film. Therefore, to solve this problem, Si
In order to prevent a chemical reaction between N in N and B in BPSG, a CVD film that does not contain B (boron) is deposited and formed between the SiN film and the BPSG film, and the BPS film is directly connected to the SiN film.
It is sufficient to avoid contact with the G film.

In this invention, a protective layer of SiN is laminated on the entire surface of a semiconductor substrate having a high resistance portion of polycrystalline silicon on the surface of the convex portion via a first insulating layer having an uneven surface, and does not contain boron. After forming a second insulating layer and then laminating a third insulating layer containing boron as an impurity, a contact hole extending from the third insulating layer to the semiconductor substrate surface is formed in the recessed region of the first insulating layer, and a metal wiring is formed. This is a method of manufacturing a semiconductor device characterized by carrying out the following steps.

That is, the present invention forms a second insulating layer that does not contain boron on the SiN protective layer of the high resistance portion, and then deposits and forms a third insulating layer that contains boron, thereby improving the reliability of the protective layer. This is how it was done.

The third insulating layer (interlayer insulating layer) containing boron as an impurity in this invention is SiH4, ByHe, PHs
, BPSG film made by atmospheric pressure CVD using Ot, and B
SG film or TE01. Examples include an insulating film that can be formed using a known method such as a BPSG film using normal pressure or low pressure CVD using TMB, TMP, or OR as a material.

The SiN film and the third insulating film (for example, BPS) in this invention
As the second insulating layer (intermediate layer) that does not contain boron as an impurity, which is interposed between the G film and the S film, an NSC film formed by atmospheric pressure CVD, an HTO film formed by LP-CVD, etc.
It is sufficient if the IO is a CVD oxide film. The film thickness is preferably approximately 500 Å or more in consideration of reliability, and furthermore, this intermediate film may have a thickness of approximately 500 Å or more in consideration of ease of processing when forming contact holes in the later process. It is preferable to set the thickness to 3000 Å or less, and the most preferable film thickness is 1000 Å.

Further, under the contact etching conditions by RIE, it is desirable to select a film whose etch rate is the same or lower than that of the glabellar insulating film, such as an EPSG film, as the intermediate film.

Specifically, the conditions for forming the HTO film are (SiH
The NSC film is preferably laminated at 800°C using a
It is optimal to use a film formed in an atmosphere of N2 as the intermediate film.

(e) Examples The present invention will be described in detail below based on examples shown in the drawings. Note that this invention is not limited by this.

In FIG. 1, first, C of SiO2 with an uneven surface is shown.
On the Si substrate 12 on which the high resistance Po1y-8i portion 11 is formed on the surface of the convex portion via the VD film (first insulating film) 10, at about 400° C. in SiH6+Of gas using an ordinary pressure CVD apparatus. A NSG film 1 is deposited by 1000 people.

After that, this film was annealed at 900°C in a N gas atmosphere, and the SiN film 2 was then subjected to LPC to about 550 layers.
Deposited by VD method. At this time, the SiN film is (S r H
4+NHs) gas (SiHzclt
+N H3), but it is necessary to avoid using a PE-5iN film (plasma SiN is not good because it lowers the resistance value of high-resistance Po1y-8i).

Next, this SiN film is patterned so that it does not remain in the contact hole portion. This patterning uses a commonly known method, for example resist patterning+RIE etching of 5iNH.

After completing the patterning of SiN, a NSC film 3 as a second insulating layer is formed on it in the same manner as the NSC film 1.
000 people to deposit and form the film, and then perform an annealing process.

This NSC film 3 prevents the BPSG film and the SiN film from coming into direct contact with each other and causing compounds such as BxNy-nH and O to be generated as foreign matter.

Furthermore, a BPSG film (third insulating layer) 4 is placed on top of this at normal pressure C.
Formed and deposited by VD method, then heated at high temperature from 900℃ to 950℃
Melt in a N atmosphere at °C.

At this time, the film thickness of BPSG, B (boron), P (phosphorus)
It is necessary to adjust the concentration according to the LSI structure, but this time B/P = 3.5 wt% / 3.7 mo1%,
Samples were prepared by 5,000 people, and melted by adding a mackerel treatment for 30 minutes at 950°C in a N atmosphere.

Thereafter, a commonly used method is used: patterning a contact pattern with a resist, wet etching a contact hole, and then performing dry etching (RTE etching) to open the contact portion 13. Metal 5 by method
(AI-5i0.6μm/TiWo, 3μm
) was deposited.

This metal 5 may be a single layer Al-9i film 5a, but usually a TiW film 5b is used to improve coverage.
A two-layer structure is used below the l-5i membrane. This allows the metal 5 to have good electrical connection with the underlying Si substrate 12.

(F) Effects of the Invention According to the present invention, in the manufacturing process of the high resistance Po1y-6i (polycrystalline silicone) part, the high resistance Po1y-6i (polycrystalline silicone) part is
When forming a SiN protective film covering the 1y-3i section, an intermediate film such as a CVD oxide film that does not contain boron impurities is deposited on the SiN protective film, and then a BPSG film that contains holon impurities, such as a BPSG film, is deposited. For example, CV such as BPSG film
Since an interlayer insulating film such as a D film is deposited, the SiN film as a protective film of the high resistance Po1y-3i part does not come into direct contact with the interlayer insulating film (for example, BPSG film), so that S]N It is possible to prevent the risk of chemical reactions between N in the film and B in the interlayer insulating film to form compounds and foreign substances such as BxlNy-nHyo, and it is possible to obtain a highly reliable semiconductor device.

[Brief explanation of the drawing]

FIG. 1 is an explanatory diagram of the configuration of a semiconductor device obtained according to an embodiment of the present invention, and FIG. 2 is an explanatory diagram of the configuration of a conventional example. Fig. 1 1...NSC film, 2...SiN film, 3
...NSC film (second insulating layer), 4...B
PSG film (third insulating layer), 5...metal wiring, 10...5iOz film (first isolation film), 11...
・High resistance polyconductor part, 12...Si substrate, 13...contact hole.

Claims (1)

[Claims] 1. On a semiconductor substrate having a high resistance portion of polycrystalline silicon on the surface of the convex portion via a first insulating layer having an uneven surface,
After laminating a protective layer of SiN over the entire surface, forming a second insulating layer that does not contain boron, and then laminating a third insulating layer containing boron as an impurity, a third insulating layer is formed in the recessed region of the first insulating layer.
A method for manufacturing a semiconductor device, characterized by forming a contact hole from an insulating layer to the surface of a semiconductor substrate, and performing metal wiring.