JPH0465144A - Semiconductor testing device - Google Patents

Abstract

PURPOSE:To test the output level of four values at one time by a method wherein two comparator pins are connected by an internal switch so as to be used as one pin, expected values of the four values are compared and a test is carried out. CONSTITUTION:Comparison levels VOH1 and VOL1 of a pin 1 and comparison levels VOH2 and VOL2 of a pin 2 are set, as shown in the figure, with reference to a waveform level VIN which is expected as the output of a device. At this time, since the expected waveform level VIN is VIN>VOH1>VOH2 within a range 10 of a time axis, an expected value is HH. Since VIN<VOL1<VOL2 within a range 11, an expected value is LL. Since VOH1>VIN>VOH2>VOL1 within a range 12, an expected value is ZH. Since VOL1<VIN<VOL2<VOH1 within a range 13, an expected value is ZL. By this constitution, since the individual expected values can be set for the levels of four values, the functional test of the device having the output level of the four values can be carried out at one time.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to semiconductor testing equipment.

[Summary of the invention]

In a semiconductor test equipment, this invention connects two comparator pins with an internal switch and uses them as a single pin, so that the output of the device under test can be output in four values during a functional test of a device that has a four-valued output level. This makes it possible to compare and judge the value with the expected value.

[Conventional technology]

Conventionally, when trying to test the output level of 441L,
A known method is to perform the test twice by changing the judgment level of the comparator.

[Problem to be solved by the invention]

However, the conventional test method has the disadvantage that the test time is increased because the same operation must be tested twice. In order to solve these conventional drawbacks, the present invention aims to shorten the test time by testing four output levels at one time.

[Means to solve the problem]

In order to solve the above problems, the present invention is a semiconductor test device in which two comparator pins are connected by an internal switch and used as one pin to perform tests by comparing with four expected values. .

[Effect]

One comparator pin has high and low side comparator levels, and expected values H and Z.

Has L. V for the comparator level High side.

If the H and Low sides are VOL and the signal under test is VIN, then
Expected value H is VIN≧VOH, expected value is ■IN≦VOL
, the expected bond Z is under the condition of VOH>V IN>VOL.

Therefore, according to a configuration in which two comparator pins given different comparator levels are used as one pin, the expected value can be expressed as HH, H2, ZL, LL by combination, and the device's 4 (I! It can be compared and judged with the output level.

〔Example〕

Embodiments of the present invention will be described below based on the drawings. 1st
The figure is a schematic diagram of the invention. By connecting comparator pin 1 and comparator pin 2 through switch 3, output terminal 4 of the device under test is connected to comparator pin 1 and comparator pin 2. Comparator pin 1 has a high side comparator level VOH1
bird.

wl comparison level VOL 1. Comparator pin 2 has H4 side humbar rate level VOH2 and LOW.
There is an error in the side comparison level VOL2. Second
The figure is a conceptual diagram of the present invention. With respect to the waveform level VIN expected as the output of the device, the bin value comparison levels VOH, VOL1 and the pin 2 comparison levels VOH2, VOL2 are set as shown in FIG.

At this time, in the time axis range 10, the expected waveform level VIN
Since VIN>VOH1>VOH2, the expected value is HH. In range 1, the expected value is LL because VIN<VOLI<VOL2. In range 12, VOH1>VIN>V
Since OH2>VOLI, the expected value is ZH. range 13
Then, since VOLI<VIN<VOL2<VOHI, the expected value is ZL. According to such a configuration, since expectations can be set for each of the four levels, a functional test of a device having four (!) output levels can be performed at one time.

〔Effect of the invention〕

As described above, the present invention can perform a functional test of a device having four output levels at one time, thereby reducing test time. In addition, the cost of the tester is also low because the method uses a switch to connect the bins, which normally use one pin each, instead of having two comparators for one bin.

[Brief explanation of drawings]

FIG. 1 is a schematic diagram showing an embodiment of a semiconductor testing device of the present invention;
FIG. 2 is a conceptual diagram of FIG. 1. 1...Comparator pin 2...Comparator pin 3...Switch 4...Device output terminal VOH1...Comparator level VOLI...Comparator level VOH2...Comparator level VOL2...Comparator Applicant above the rate level Seiko Electronic Industries Co., Ltd. agent Patent attorney Keisuke Hayashi Figure 1 Brother Figure 2

Claims (1)

[Claims] In testing devices with four output levels, two
A semiconductor testing device characterized by performing a four-value output level test by connecting two comparator pins with an internal switch and using them as one pin.