JPH0465529B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to lateral type transistors, and particularly to improvements in lateral type transistors incorporated into semiconductor integrated circuits.

(b) Prior Art FIG. 1 shows a conventional lateral type transistor having a multi-collector. 1 is an island-shaped PN layer of N-type epitaxial layers stacked on a P-type semiconductor substrate.
This is an island region that is formed separately and becomes a base region of a lateral type transistor. 2 is a P ⁺ type emitter region, 3 and 4 are P ⁺ type first and second
This is the collector area. 5 is an N ⁺ type contact region for obtaining ohmic contact with the base region 1;

The lateral type transistor having a multi-collector as described above has an emitter region 2 surrounded by first and second collector regions 3 and 4, and a peripheral length of the first and second collector regions 3 and 4 surrounding the emitter region 2. Determine the current ratio by the ratio. For example, the first
When the patterns of the second collector regions 3 and 4 are formed in a ratio of 1:1, the collector current ratio is also 1:1.
It becomes 1. This makes it possible to divide the collector current into a desired ratio using the multi-collector pattern ratio.

However, in a conventional lateral transistor having a multi-collector, holes injected from the emitter region 2 into the separated portions of the first and second collector regions 3, 4 are transferred to the collector regions 3, 4 where the depletion layer is more spread. Because it is largely absorbed by
The current ratio changes due to the potential difference between the first and second collector regions 3 and 4, and there is a drawback that an accurate current ratio cannot be maintained.

(c) Object of the Invention The present invention was made in view of the above drawbacks, and an object of the present invention is to provide a lateral type transistor having a multi-collector, which greatly improves the conventional drawbacks.

(d) Structure of the Invention As shown in FIG. 2, the lateral type transistor according to the present invention has a base region 11 and a
an emitter region 12 provided on the surface, a plurality of collector regions 13 surrounding the emitter region 12,
14, and a high concentration diffusion region 16 provided between the collector regions 13 and 14.

(E) Embodiment FIG. 2 shows a lateral type transistor having a multi-collector according to the present invention.

Reference numeral 11 denotes an island region formed by separating an N-type epitaxial layer stacked on a P-type semiconductor substrate into island-like PN regions, which forms a base region of a lateral type transistor. 12 is a P ⁺ type emitter region,
Reference numerals 13 and 14 denote P ⁺ type first and second collector regions, which are both formed by selective diffusion at the same time. Reference numeral 15 denotes an N ⁺ type contact region for making ohmic contact with the base region 11. Emitter region 12, first and second collector regions 1
3 and 14 and the base collector region 15, contacts are formed in the hatched portions, respectively.

Reference numeral 16 is an N ⁺ type high concentration diffusion region which is the most characteristic feature of the present invention. This diffusion region 16 is formed by diffusion at the same time as the base contact region 15, and is arranged in a spaced apart portion of the U-shaped first and second collector regions 13 and 14. The diffusion region 16 has the function of stopping the depletion layer expanding from the first and second collector regions 13 and 14, and minimizes the difference in the expansion of the depletion layer due to the potential difference between the first and second collector regions 13 and 14. It makes sense to keep it to a minimum.

Specifically, the high concentration diffusion region 16 is formed to be approximately 7 μm apart from the adjacent first and second collector regions 13 and 14 and approximately 5 μm wider than the width of the first and second collector regions 13 and 14. be done. This is to effectively control the depletion layer.

According to the above-mentioned lateral transistor of the present invention, the difference in the spread of the depletion layer is reduced by the high concentration diffusion region 16.
Therefore, the ratio of the collector currents of the first and second collector regions 13, 14 is not affected by the holes injected between the first and second collector regions 13, 14, and is determined by the pattern. A constant current ratio can be maintained.

(f) Effects According to the present invention, the high concentration diffusion region 16 has the advantage that the current ratio of each of the multi-collector regions can be determined almost by the pattern size. As a result, the circuit can be designed more easily and a predetermined current ratio can be easily achieved.

[Brief explanation of drawings]

FIG. 1 is a top view illustrating a conventional lateral type transistor, and FIG. 2 is a top view illustrating a lateral type transistor of the present invention. 11 is a base area, 12 is an emitter area, 1
3 and 14 are collector regions, 15 is a base contact region, and 16 is a high concentration diffusion region.

Claims (1)

[Scope of Claims] 1. An emitter region of an opposite conductivity type formed on the surface of a base region of one conductivity type, and a plurality of collector regions of one conductivity type surrounding the emitter region, each collector having a pattern dimension of the collector region. In a lateral type transistor that determines the current ratio of
A lateral type transistor characterized in that a high concentration diffusion region of one conductivity type is provided equidistant from each collector region, and the spread of a depletion layer from the collector region is regulated to be equal in this region.