JPH046560B2 - - Google Patents

Description

[Detailed description of the invention]

The present invention relates to a drawing head rotation angle display device for displaying the rotation angle of a drawing head on a drawing board to which horizontal and vertical scales are removably attached in a drawing machine. Conventionally, rotation angles of less than a unit scale marked on a protractor of a drafting head are read using a vernier scale located adjacent to the protractor. According to this method, the unit scales (0.5 to 1 mm intervals) on the protractor board must be matched with the vernier scales at intervals slightly larger than the interval between the unit scales on the protractor board. When matching, it is unavoidable that the reading error will increase because the scale interval of the protractor is small. In order to reduce reading errors, a method can be considered to make the protractor larger and increase the interval between the unit scales, but this method has the fatal flaw that the protractor becomes an obstacle and makes some line drawing work impossible. be. In order to eliminate the trouble of using a vernier and the reading errors, the applicant has filed a patent application filed in 1983 for a drafting head rotation angle display device that can display angles less than the unit scale of a protractor using electronic means. It was already proposed in the specification and drawings of No. 112586. This drafting head rotation angle display device consists of a drafting head that is operated to move in any direction on the drawing board, a straight scale that is rotatably attached to the drafting head via a scale mounting plate, and a straight scale that is rotatably attached to the drafting head via a scale mounting plate. a detector that generates a detection output signal with a predetermined repetition period whose signal level changes according to a predetermined rotation angle (n) on the drawing board;
Level discrimination means outputs a discrimination output signal at each timing of dividing the signal level of the detection output signal into a plurality (N), and is selectively driven by the discrimination output signal from this level discrimination means to perform display in units of n/N. It is characterized by comprising a display section. This drawing head rotation angle display device does not have a built-in compensation means for the temperature characteristics and aging of the detector, so the signal level of the detection output signal of the detector may be affected by variations in these temperature characteristics or aging. It cannot be said that there is no possibility that an error may occur in the rotation angle of less than a unit scale which is discriminated by the discrimination level accordingly. SUMMARY OF THE INVENTION An object of the present invention is to provide a drafting head rotation angle display device that can obtain a level discrimination output signal that discriminates a normal and accurate rotation angle by compensating for temperature characteristics, aging, or other errors of the detector. It is. To achieve this object, the present invention includes a drawing head that can be rotated clockwise or counterclockwise on a drawing board, and a signal level that changes sinusoidally with each unit scale on a protractor of the drawing head as one cycle. first and second angle detectors that output angle detection signals that have a phase difference of 1/2 period from each other, and output angle detection signals that have an appropriate phase difference to the first and second angle detectors. A first type reference voltage for level discrimination is obtained by adding the third and fourth angle detectors and the first and second angle detection signals, and a first type reference voltage is obtained by adding the angle detection signals of the third and fourth angle detectors. a reference voltage divider circuit that generates a second type reference voltage for level discrimination and a discrimination level that changes in conjunction with these reference voltages, and a circuit that generates a discriminated signal based on the angle detection signal; The present invention is characterized by comprising a circuit that controls the display of the rotation angle using signals discriminated based on the discrimination level. Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. 1 to 9. FIG. 1 is a plan view showing a drafting head 2 equipped with a rotation angle display device 1 for a drafting head according to the present invention, and FIG. 2 is a partially cutaway sectional view of the drafting head 2. As shown in FIG. The drafting head 2 is connected via a connecting member 3 equipped with a hinge mechanism to a vertical rail (not shown) that is movable left and right on the drawing board along a horizontal rail attached to the upper edge of the drawing board (not shown). ing. The drafting head 2 moves over the drawing board along the vertical rail in the transverse direction of the drawing board (the first
It is movable vertically (in the figure). At the upper end of the drawing head 2, a knob 4 is rigidly connected to the upper end of a rotating main shaft (not shown). The lower end portion of the rotating main shaft is fixed to the drafting head board 5. The drafting head board 5 has a scale mounting portion 6 extending perpendicularly to each other, and a horizontal scale 7 and a vertical scale 8 are attached to the scale mounting portion 6.
is removably attached with screws 9. An index lever knob 10 is provided protruding from the side surface of the knob 4. This index lever knob 10 forms part of an index mechanism that fixes the drafting head board 5 at fixed angles to a protractor board 12 fixed to a non-rotating moving shaft 11. When fixing the drafting head board 5 to the moving shaft 11 at a desired rotation angle without using this index mechanism, the main rotating shaft is tightened and fixed to the moving shaft 11 using the protractor fixing lever 13. done by doing. A drafting head rotation angle display device 1 is disposed inside the drafting head 2 to detect the rotation angle of the drafting head 2 and to display the detected rotation angle every five minutes. The rotation angle display device 1 for a drafting head has the configuration described below. That is, a main optical protractor plate 14 made of a stainless steel plate shown in FIGS. 3 and 4 is fixed to the moving shaft 11. As can be understood from Fig. 3, this main optical protractor 14 is equivalent to two semicircular plates made of stainless steel plates with different diameters joined at the diameter 18, and almost forms a disk. . The diameter 18 is the zero position of the protractor 12 and
The main optical protractor 14 is fixed to the moving shaft 11 so as to match the diameter passing through the 180 degree position. A second code pattern 16 is formed at the outermost circumference of the main optical protractor 14, and a first code pattern 15 is formed at the inner circumference of the second code pattern 16. The first code pattern 15 is composed of a total of 360 slits 17 arranged in parallel in the circumferential direction with a pitch of 1 degree. The second code pattern 16 is formed on the outer circumferential side of the first code pattern 15, and is concentric with the first code pattern 15. Light passes through the second code pattern 16 on one side 14a with the diameter 18 of the main optical protractor 14 as the axis of symmetry;
The other side 14b functions to block light. The second code pattern 16 forms part of a means for determining whether the drawing head 2 is rotated clockwise CW or counterclockwise CCW. As shown in FIGS. 3 and 4, an arcuate instruction optical protractor 19 is placed opposite the main optical protractor 14, and runs along the main optical protractor 14 on the first code pattern 15. Supported to move. As shown in FIG.
4 sets of slits 2 with book slits 20 as 1 set
Group 0 is formed. An interval is set between each group of 20 slits so as to produce a phase difference of 90 degrees in the phase of the output signal. In FIG. 3, a first angle detector 21, a third angle detector 23, a second angle detector 22, and a fourth angle detector 24 are arranged in order from the top to the bottom.
The second angle detector 22 outputs an angle detection signal having a phase difference of 180 degrees with respect to the first angle detector 21,
The fourth angle detector 24 outputs an angle detection signal having a phase difference of 180 degrees to the third angle detector 23. The angle detectors 21, 22, 23, and 24 are arranged in a positional relationship such that they sandwich the main optical protractor 14 from above and below, respectively. Angle detector 21,
22, 23 and 24 are light emitting diodes 21a, 22a, 23a and 24a and phototransistors 21b, 22b, 23b and 24, respectively.
It has a built-in b. A rotation direction detector 25 is arranged at a position facing the optical protractor plate 19 for instruction. This rotational direction detector 25 also includes angle detectors 21, 22, 23 and 24.
It has the same configuration as the light emitting diode 25.
A and a phototransistor 25b are built in. Based on the angle detection signals from the angle detectors 21, 22, 23, and 24 and the rotation direction detection signal from the rotation direction detector 25, the angle display light emitting diodes 26 to 37 arranged in the rotation angle display section 38 are selectively used. will be lit. The rotation angle display section 38 is arranged adjacent to the angle indicator 39 of the protractor board 12, as shown in FIG. The angle display electronics 40 for the drafting head rotation angle display device 1 is shown in FIG. Hereinafter, the angle display electronic circuit 40 will be explained in detail based on FIG. 5. The angle detection signal of the first angle detector 21 is a sine wave signal that repeats at a constant period. It is supplied through In-phase input terminal 4 of first operational amplifier 42
5 is connected to the seventh terminal 47 of the reference voltage divider circuit 46. A variable resistor 49 and a fixed resistor 50 are connected in series as feedback resistors between the output terminal 48 of the first operational amplifier 42 and the negative phase side input terminal 43.
The first phase inversion amplifier circuit 4 is controlled by the variable resistor 49.
1 output level can be finely adjusted. 1st
The output terminal 48 of the operational amplifier 42 has an external terminal 51 for measuring output level. Light emitting diodes 21a, 22a, 23a and 24a and phototransistors 21b and 22 of angle detectors 21, 22, 23 and 24, respectively
b, 23b and 24b and rotation direction detector 25
The light emitting diode 25a and the phototransistor 25b are integrated as part of the angle display electronic circuit 40 via an external terminal 52. The emitters 55 of each of the phototransistors 21b, 22b, 23b and 24b are grounded via a fixed resistor 53 and a variable resistor 54 connected in series with the fixed resistor 53. By this variable resistor 54, the phototransistor 21b,
The output level of each of the detection signals 22b, 23b, and 24b can be finely adjusted. The output terminal 48 of the first phase inversion amplifier circuit 41 is
The in-phase input terminal of the fifth operational amplifier 60 that constitutes the first maximum value selection circuit 59 is connected to the in-phase input terminal 57 of the first buffer amplifier 56 that constitutes the reference voltage divider circuit 46 via a fixed resistor 58a. It is connected to the terminal 61 and, at the same time, to the negative phase side input terminal 63 of the second comparator 62 . The angle detection signal of the second angle detector 22 is a repetitive sine wave signal having a phase difference of 180 degrees with respect to the angle detection signal of the first angle detector 21. 2 operational amplifier 65
It is supplied to the negative phase side input terminal 66 of , via the fixed resistor 44 . The in-phase input terminal 67 of the second operational amplifier 65 is connected to the seventh terminal 47 of the reference voltage divider circuit 46.
It is connected to the. A variable resistor 49 and a fixed resistor 50 are connected in series as feedback resistors between the output terminal 68 of the second operational amplifier 65 and the negative phase side input terminal 66. The output terminal 68 of the second phase inversion amplifier circuit 64 is
The in-phase input terminal 57 of the first buffer amplifier 56 of the reference voltage divider circuit 46 is connected via a fixed resistor 58b, and at the same time, the in-phase input terminal of the sixth operational amplifier 70 constituting the first maximum value selection circuit 59. It is connected to terminal 71. The fixed resistors 58a and 58b are in parallel with each other with respect to the in-phase input terminal 57 of the first buffer amplifier 56, and serve as resistance addition resistors for the output signals of the first phase inversion amplifier circuit 41 and the second phase inversion amplifier circuit 64. Acts as a vessel. At the output terminal 69 of the first buffer amplifier 56, a first type reference voltage that is linked to fluctuations in the summed voltage of the angle detection signals of the first angle detector 21 and the second angle detector 22 is obtained. The angle detection signal of the third angle detector 23 is a repetitive sine wave signal having a phase difference of 90 degrees with respect to the angle detection signal of the first angle detector 21. The signal is supplied to an input terminal 74 on the negative phase side of the three operational amplifiers 73 via a fixed resistor 44 . The in-phase input terminal 75 of the third operational amplifier 73 is connected to the seventh terminal 47 of the reference voltage divider circuit 46 . A variable resistor 49 and a fixed resistor 50 are connected in series as feedback resistors between the output terminal 76 of the third operational amplifier 73 and the negative phase side input terminal 74. The output terminal 76 of the third phase inversion amplifier circuit 72 is
A fixed resistor 58b is connected to the in-phase input terminal 79 of the seventh operational amplifier 78 constituting the second maximum value selection circuit 77, and connected to the in-phase input terminal 81 of the second buffer amplifier 80 constituting the reference voltage dividing circuit 46. and at the same time, is connected to the negative phase side input terminal 83 of the sixth comparator 82. The angle detection signal of the fourth angle detector 24 is a repetitive sine wave signal having a phase difference of 180 degrees with respect to the angle detection signal of the third angle detector 23. 4 operational amplifier 85
is supplied to the negative phase side input terminal 86 of , via the fixed resistor 44 . The in-phase input terminal 87 of the fourth operational amplifier 85 is connected to the seventh terminal 47 of the reference voltage divider circuit 46.
It is connected to the. A variable resistor 49 and a fixed resistor 50 are connected in series as feedback resistors between the output terminal 88 of the fourth operational amplifier 85 and the negative phase side input terminal 86. The output terminal 88 of the fourth phase inversion amplifier circuit 84 is
It is connected to the in-phase input terminal 90 of the eighth operational amplifier 89 constituting the second maximum value selection circuit 77, and simultaneously connected to the in-phase input terminal 81 of the second buffer amplifier 80 via the fixed resistor 58a. . The outputs of the third phase inversion amplifier circuit 72 and the fourth phase inversion amplifier circuit 84 are resistance-added, and the angle detection signals of the third angle detector 23 and the fourth angle detector 24 are output at the output terminal 91 of the second buffer amplifier 80. A second type reference voltage is obtained that is linked to fluctuations in the added voltage. The reference voltage divider circuit 46 includes the first buffer amplifier 5
6. Second buffer amplifier 80 and third buffer amplifier 92
It also has voltage dividing resistors 93 to 104. In-phase input terminal 106 of third buffer amplifier 92
is connected to the connection point between the voltage dividing resistors 103 and 104 in the voltage dividing resistors 102, 103, and 104 connected in series. One end of the voltage dividing resistor 102 is grounded, and the other end 104a of the voltage dividing resistor 104, which is not connected to the voltage dividing resistor 103, is connected to the ground.
5V positive power supply is connected. Divider resistor 10
3 is a variable resistor, and this voltage dividing resistor 103
to the output terminal 105 of the third buffer amplifier 92.
It is adjusted so that a positive potential of 3V appears. Voltage dividing resistors 93, 94 and 95 are connected in series between the output terminal 69 of the first buffer amplifier 56 and the output terminal 105 of the third buffer amplifier 92. These voltage dividing resistors 93, 94, and 95 function to determine a discrimination level for level-discriminating the angle detection signals of the first angle detector 21 and the second angle detector 22 in the level discrimination circuit 107. The output terminal 69 of the first buffer amplifier 56 is adjusted so that a positive potential of 2V appears in the normal state, and the values of the voltage dividing resistors 93, 94 and 95 are determined in accordance with the discrimination level. has been done. In this embodiment, the resistance values of the voltage dividing resistors 93, 94 and 95 are 2.05KΩ, 3.95KΩ and 3.95KΩ, respectively.
It is set to 4KΩ. A first terminal 108 is provided between the voltage dividing resistor 93 and the output terminal 69 of the first buffer amplifier 56, and a second terminal 109 is provided between the voltage dividing resistors 93 and 94. A third resistor is connected between resistors 94 and 95.
A terminal 110 is provided. In a normal state, a positive potential of 2V appears at the first terminal 108,
A positive potential of 2.2V appears at the second terminal 109, and a positive potential of 2.6V appears at the third terminal 110. The first terminal 108 is the in-phase input terminal 11 of the second comparator 62 that constitutes the level discrimination circuit 107.
1, the second terminal 109 is connected to the negative phase side input terminal 113 of the third comparator 112 forming the level discrimination circuit 107, and the third terminal 110 is connected to the in-phase side input terminal 115 of the fourth comparator 114.
It is connected to the. Voltage dividing resistors 96, 97 and 98 are connected in series between the output terminal 91 of the second buffer amplifier 80 and the output terminal 105 of the third buffer amplifier 92. These voltage dividing resistors 96, 97 and 98 function to determine the discrimination voltage level for level discrimination of the angle detection signals of the third angle detector 23 and the fourth angle detector 24 in the level discrimination circuit 107. In this embodiment, the resistance values of the voltage dividing resistors 96, 97, and 98 are set to 0.8KΩ, 7.15KΩ, and 2.05KΩ, respectively. A fourth terminal 11 is connected between voltage dividing resistors 96 and 97.
6 is provided, and this fourth terminal 116 is connected to the in-phase input terminal 118 of the fifth comparator 117. A sixth terminal 119 is provided between voltage dividing resistors 9 and 98, and this sixth terminal 119 is connected to an in-phase input terminal 121 of a seventh comparator 120. Voltage dividing resistor 98 and second buffer amplifier 8
A fifth terminal 122 is provided between the output terminal 91 of 0 and the fifth terminal 122 is connected to the in-phase input terminal 123 of the sixth comparator 82 . The output terminal 105 of the third buffer amplifier 92 is grounded through voltage dividing resistors 99, 100 and 101 connected in series. In this embodiment, voltage dividing resistors 99, 100
The resistance values of and 101 are 3KΩ, 7KΩ and
It is set to 20KΩ. Divider resistors 99 and 10
0, an eighth terminal 124 is connected to the negative phase side input terminal 126 of the first comparator 125. Divider resistor 1
A seventh terminal 47 is provided between 00 and 101, and as described above, this seventh terminal 47 is connected to the in-phase input terminals 45, 67, 75 and 87 of the operational amplifiers 42, 65, 73 and 85, respectively. It is connected. The first maximum value selection circuit 59 is a fifth operational amplifier 60
and a sixth operational amplifier 70 , and the output terminal 126 of the first maximum value selection circuit 59 is connected to the negative phase input terminal 127 of the fourth comparator 114 and to the in-phase input terminal 113 a of the third comparator 112 . has been done. Fifth operational amplifier 60
The output terminal 128 of is connected to the output terminal 126 of the first maximum value selection circuit 59 via a fixed resistor 129 and a backflow prevention diode 130. The reverse current prevention diode 130 is in the forward direction from the output terminal 128 of the fifth operational amplifier 60 to the output terminal 126 of the first maximum value selection circuit 59. The negative phase side input terminal 131 of the fifth operational amplifier 60 is directly connected to the output terminal 126 of the first maximum value selection circuit 59. The output terminal 132 of the sixth operational amplifier 70 is connected to the output terminal 126 of the first maximum value selection circuit 59 via a fixed resistor 133 and a backflow prevention diode 134. The negative phase side input terminal 135 of the sixth operational amplifier 70 is directly connected to the output terminal 126 of the first maximum value selection circuit 59. The first maximum value selection circuit 59, together with the first phase inversion amplifier circuit 41 and the second phase inversion amplifier circuit 64, transfers the discriminated signal whose level is discriminated by the level discrimination circuit 107 to the first angle detector. 21 and the second angle detector 22. The second maximum value selection circuit 77 is a seventh operational amplifier 78
and an eighth operational amplifier 89 , and the output terminal 136 of the second maximum value selection circuit 77 is connected to the negative phase side input terminal 137 of the seventh comparator 120 . The output terminal 138 of the seventh operational amplifier 78 is connected to the output terminal 136 of the second maximum value selection circuit 77 via a fixed resistor 139 and a backflow prevention diode 140. A negative phase side input terminal 139 of the seventh operational amplifier 78 is directly connected to an output terminal 136 of the second maximum value selection circuit 77. Furthermore, the output terminal 12 of the first maximum value selection circuit 59
6 is grounded via a fixed resistor 126a. The output terminal 141 of the eighth operational amplifier 89 is connected to the output terminal 136 of the second maximum value selection circuit 77 via a fixed resistor 142 and a backflow prevention diode 143. The negative phase side input terminal 144 of the eighth operational amplifier 89 is directly connected to the output terminal 136 of the second maximum value selection circuit 77. Furthermore, the output terminal 13 of the second maximum value selection circuit 77
6 is grounded via a fixed resistor 145. The second maximum value selection circuit 77, together with the third phase inversion circuit 72 and the fourth phase inversion circuit 84, transfers the discriminated signal whose level is discriminated by the level discrimination circuit 107 to the third angle detector 23 and the fourth phase inversion circuit 84. It constitutes a circuit that is generated from the angle detection signal of the fourth angle detector 24. The level discrimination circuit 107 includes a third comparator 112, a fourth comparator 114, a fifth comparator 117, a sixth comparator 82, a seventh comparator 120, and a first exclusive OR circuit 14.
6. It has a second exclusive OR circuit 147 and a third exclusive OR circuit 148. The output signal E of the third comparator 112 (see FIG. 8E) is connected to the cathode terminal 15 of the diode 150.
It is supplied to 0c. The signal K appearing at the anode terminal 150a of this diode 150 (see K in FIG. 8) is supplied to the control terminal 155 of the fourth demultiplexer 154, and is also supplied to the other input terminal 156 of the third exclusive OR circuit 148. ing. The output signal F of the fourth comparator 114 (see FIG. 8F) is supplied to the other input terminal 158 of the second exclusive OR circuit 147 and to one input terminal 159 of the third exclusive OR circuit 148. ing. The output signal J (see FIG. 8 J) of the fifth comparator 117 is connected to the cathode terminal 16 of the diode 161.
1c. Diode 161 and diode 150 are configured to form an AND circuit, and anode terminal 161a of diode 161 and anode terminal 150a of diode 150 are connected to each other. The connection point between the anode terminals 150a and 161a is 5V via a fixed resistor 162.
connected to the positive power supply. Inverse phase side input terminal 16 of the fifth comparator 117
3 is the negative phase side input terminal 83 of the sixth comparator 82
and is connected to the output terminal 76 of the third phase inversion amplifier circuit 72. Output signal A of the sixth comparator 82 (Fig.
) is one input terminal 166 of the second demultiplexer 152, one input terminal 167 of the third demultiplexer 153, and the fourth demultiplexer 154.
are simultaneously supplied to one input terminal 168 of the two. The output signal of the seventh comparator 120 is supplied to one input terminal 170 of the second exclusive OR circuit 147 and the other input terminal 171 of the first exclusive OR circuit 146. One input terminal 1 of the first exclusive OR circuit 146
72 is connected to a 5V positive power supply. The output signal G of the first exclusive OR circuit 146 (see FIG. 8G) is supplied to the control terminal 151a of the first demultiplexer 151, and the output signal I of the second exclusive OR circuit 147 (see FIG. ) is supplied to the control terminal 152a of the second demultiplexer 152, and the output signal H of the third exclusive OR circuit 148
(See FIG. 8H) is the third demultiplexer 153
is supplied to the control terminal 153a. The rotational direction detection signal of the rotational direction detector 25 becomes low level when the drafting head 2 is rotated clockwise CW from the zero position of the main optical protractor 14, and vice versa. When it is rotationally moved, the level becomes high and is supplied to the in-phase side input terminal 173 of the first comparator 125. The output signal C of the first comparator 125 (see FIG. 8C) is supplied to the other input terminal 174 of the fourth exclusive OR circuit 149. One input terminal 175 of the fourth exclusive OR circuit 149 is supplied with the output signal B of the second comparator 62 (see FIG. 8B). The output signal D (see FIG. 8D) of the fourth exclusive OR circuit 149 is supplied to one input terminal 176 of the first demultiplexer 151 and the other input terminal 177 of the second demultiplexer 152, and at the same time, It is supplied to the other input terminal 178 of the third demultiplexer 153. The other input terminal 1 of the first demultiplexer 151
79 and the other input terminal 180 of the fourth demultiplexer 154 are grounded, so the input signal is always fixed at a low level. In the first demultiplexer 151, one output terminal 181 is connected to an angle display light emitting diode 35 that lights up when displaying 45 minutes, and the other output terminal 182 is connected to an angle display light emitting diode 35 that lights up when displaying 15 minutes. It is connected to 29. In the second demultiplexer 152, its first output terminal 183 is connected to the angle display light emitting diode 36 that lights up when displaying 50 minutes, and its second output terminal 184 is connected to the angle display light emitting diode 36 that lights up when displaying 40 minutes. It is connected to the light emitting diode 34, and its third output terminal 185 is connected to the angle display light emitting diode 28 that lights up when displaying 10 minutes.
The fourth output terminal 186 is connected to the angle display light emitting diode 30 which lights up when displaying 20 minutes. In the third demultiplexer 153, its first output terminal 187 is connected to the angle display light emitting diode 37 that lights up when displaying 55 minutes, and its second output terminal 188 is connected to the angle display light emitting diode 37 that lights up when displaying 35 minutes. It is connected to the light emitting diode 33, and its third output terminal 189 is connected to the angle display light emitting diode 27 that lights up when displaying 5 minutes.
The fourth output terminal 190 is connected to an angle display light emitting diode 31 that lights up when 25 minutes is displayed. In the fourth demultiplexer 154, one output terminal 191 is connected to an angle display light emitting diode 26 that lights up when displaying 0 minutes, and the other output terminal 192 is connected to an angle display light emitting diode 26 that lights up when displaying 30 minutes. 32. In the angle display electronic circuit 40 shown in FIG.
A constant voltage power supply circuit 149 providing a 5V positive power supply is shown in FIG. This constant voltage power supply circuit 14
9, a constant voltage 5V positive power source is generated from a 6.7-9V battery. Constant voltage power supply circuit 149
The angle display electronic circuit 4 is connected to the positive power supply terminal 149a of the
0 positive power supply terminals are connected. Two-output channel type first demultiplexer 1
The truth table 1 of the 51 and 4th demultiplexers 154 and the truth table 2 of the 4-output channel type second and third demultiplexers 152 and 153 are listed below.

【table】

[Table] (Note) ×: 0 or 1
Hereinafter, the effects of the rotation angle display device 1 for a drafting head according to the present invention will be explained in detail. 7th
The figure shows the waveforms of the output signals of the phase inversion amplifier circuits 41, 64, 72 and 84. Although the waveform to be shown in FIG. 7 is originally a sine wave, it is shown as a triangular wave for simplification and explanation. The reference level 193 shown in FIG. 7 indicates the first type reference voltage obtained by adding the signal output of the first phase inversion amplifier circuit 41 and the signal output of the second phase inversion amplifier circuit 64, The second type reference voltage obtained by adding the signal output of the phase inversion amplifier circuit 72 and the signal output of the fourth phase inversion amplifier circuit 84 is displayed. The first type reference voltage is the first type of reference voltage voltage divider circuit 46.
The second type reference voltage is the voltage at the terminal 108 , and the second type reference voltage is the voltage at the fifth terminal 122 of the reference voltage voltage divider circuit 46 . The first discrimination level 194 shown in FIG. 7 is the voltage that appears at the second terminal 109 of the reference voltage divider circuit 46 and the voltage that appears at the sixth terminal 119 of the reference voltage divider circuit 46. If the signal output of the first maximum value selection circuit 59 does not reach the first discrimination level 194, the drafting head 2
It is determined that the magnitude less than the unit scale at the rotation angle is either 0 minutes or 30 minutes. The signal output L of the first maximum value selection circuit 59 is equal to or higher than the first discrimination level 194, and the signal output L of the first maximum value selection circuit 59 is at the second discrimination level 194.
If the rotation angle of the drafting head 2 does not reach 5, the rotation angle of the drafting head 2 will be less than 5 minutes, 25 minutes, 35
Distinguish between minutes or 55 minutes. The first discrimination level 194 can further discriminate the signal output M of the second maximum selection circuit 77. If the signal output of the second maximum value selection circuit 77 does not reach the first discrimination level 194, the drafting head 2
It is determined that the magnitude less than the unit scale at the rotation angle is either 15 minutes or 45 minutes. When the signal output of the second maximum value selection circuit 77 is higher than the first discrimination level 194 and lower than the second discrimination level 195, the rotation angle of the drafting head 2 is smaller than the unit scale by 10 minutes, 20 minutes, 40 minutes or
It is determined that the time is within 50 minutes. The second discrimination level 195 shown in FIG. 7 is the voltage appearing at the third terminal 110 of the reference voltage divider circuit 46. If the signal output of the first maximum value selection circuit 59 is equal to or higher than the first discrimination level 194 and does not reach the second discrimination level 195, the magnitude less than the unit scale at the rotation angle of the drafting head 2 is 5. minutes, 25
minutes, 35 minutes, or 55 minutes. When the signal output of the first maximum value selection circuit 59 is at the second discrimination level 195 or higher, the rotation angle of the drafting head 2 is smaller than the unit scale by 10 minutes;
Distinguish whether it is 15 minutes, 20 minutes, 40 minutes, 45 minutes or 50 minutes. The third discrimination level 196 shown in FIG. 7 is the voltage appearing at the fourth terminal 116 of the reference voltage circuit 46. The signal output of the third phase inversion amplifier circuit 72 is at the second discrimination level 195 or higher and the third discrimination level 19
If the rotation angle of the drafting head 2 does not reach 6, it is determined that the rotation angle of the drafting head 2 is less than the unit scale of 5 minutes or 55 minutes. When the signal output of the third phase inversion amplifier circuit 72 is equal to or higher than the third discrimination level 196, the magnitude less than the unit scale at the rotation angle of the drafting head 2 is 0.
Distinguish that it is a minute. If the drafting head 2 rotates counterclockwise CCW and the angle of rotation of the drafting head 2 less than the unit scale is 0 minutes or more and less than 2.5 minutes, it is indicated by a thick line in Fig. 7. First maximum value selection circuit 5
The level of the output signal L of 9 is the first discrimination level 194
, the output signal of the third comparator 112 becomes low level, and the output signal of the fourth comparator 114 becomes high level. Note that the output signal L of the first maximum value selection circuit 59 takes the maximum value of the first angle detection signal shown by the dashed line in FIG. Furthermore, the output signal M of the second maximum value selection circuit 77 shown by the thick dotted line in the figure, which will be described below, is the same as the third angle detection signal shown by the dotted line in the figure and the third angle detection signal shown by the solid line in the figure. The maximum value of the angle detection signals of No. 4 is taken. That is, in the present invention, the 5-minute unit is determined using four signals, the first to fourth angle detection signals. Since the level of the output signal M of the second maximum value selection circuit 77 exceeds the first discrimination level 194,
The output signal of comparator 120 becomes low level. Therefore, one input terminal 172 of the first exclusive OR circuit 146 has a high level, and the other input terminal 1
71 is supplied with a low level signal, one input terminal 170 of the second exclusive OR circuit 147 is supplied with a low level signal, the other input terminal 158 is supplied with a high level signal, and the third exclusive OR circuit 147 is supplied with a low level signal. 148, one input terminal 159 has a high level, the other input terminal 156
is supplied with a low level signal. Therefore, the control terminal 151a of the first demultiplexer 151, the control terminal 152a of the second demultiplexer 152, and the third demultiplexer 15
A high level signal is supplied to the control terminal 153a of No. 3, and these demultiplexers 151 and 152
and 153 do not operate, so as is clear from truth tables 1 and 2, demultiplexers 151 and 152
The output terminals 181 to 190 of and 153 output high-level signals, and the angle display light emitting diodes 27 to 31 and 33 to 37 do not light up. Control terminal 155 of fourth demultiplexer 154
is supplied with a low level signal, while input terminal 1
68 is supplied with a low level signal. Therefore, as is clear from the combination at the top of the truth table 1, one output terminal 191 of the fourth demultiplexer 154 outputs a low level signal, thereby lighting up the angle display light emitting diode 26. The other output terminal 3 of the fourth demultiplexer 154
2 outputs a high level signal, whereby the angle display light emitting diode 32 remains off. Then, if the angle less than the unit scale of drafting head 2 is
If the time is 2.5 minutes or more and less than 7.5 minutes, the level of the output signal L of the first maximum value selection circuit 59 is equal to or higher than the first discrimination level 194 and does not exceed the second discrimination level 195, so the third comparator The output signal of 112 becomes high level, and the fourth comparator 1
The output signal of 14 becomes high level. Since the level of the output signal M of the second maximum value selection circuit 77 is higher than the first discrimination level 194, the output signal of the seventh comparator 120 is at a low level. Therefore, the control terminal 151a of the first demultiplexer 151, the control terminal 152a of the second demultiplexer 152, and the fourth demultiplexer 15
A high level signal is supplied to the control terminal 155 of No. 4, and these demultiplexers 151, 152 and 154 do not operate. Therefore, the angle display light emitting diode 26,
28, 29, 30, 32, 34, 35, and 36
is off. On the other hand, the third demultiplexer 153 control terminal 1
53a is supplied with a low level signal, one input terminal 167 is supplied with a low level signal from the sixth comparator 82, and the other input terminal 178 is supplied with a low level signal.
A high level signal is supplied from the fourth exclusive OR circuit 149. Therefore, as is clear from the combination in the second row from the top of the truth table 2, only the third output terminal 189 outputs a low level signal, thereby lighting up the angle display light emitting diode 27. Light emitting diodes 31, 33 and 37 for angle display
remains off. Then, if the angle of less than the unit scale of the drafting head 2 is
If it is more than 7.5 minutes and less than 12.5 minutes,
Since the level of the output signal of the first maximum value selection circuit 59 becomes equal to or higher than the second discrimination level 195, the output signal of the third comparator 112 becomes a high level, and the output signal of the fourth comparator 114 becomes a low level. Since the level of the output signal M of the second maximum value selection circuit 77 exceeds the first discrimination level 194, the output signal of the seventh comparator 120 becomes a low level. Therefore, the control terminal 151a of the first demultiplexer 151, the control terminal 153a of the third demultiplexer 153, and the fourth demultiplexer 15
A high level signal is supplied to the control terminal 155 of No. 4, and these demultiplexers 151, 153 and 154 do not operate. Therefore, the angle display light emitting diode 26,
27, 29, 31, 32, 33, 35 and 37 do not light up. On the other hand, in the second demultiplexer 152,
A low level signal is supplied to the control terminal 152a, while a low level signal is supplied from the sixth comparator 82 to the input terminal 166, and
The other input terminal 177 is supplied with a high level signal from the fourth exclusive OR circuit 149 . Therefore, as is clear from truth table 2, the third
Only the output terminal 185 outputs a low level signal,
As a result, the angle display light emitting diode 28 lights up. Then, if the angle of less than the unit scale of the drafting head 2 is
If it is more than 12.5 minutes and less than 17.5 minutes,
Since the level of the output signal of the first maximum value selection circuit 59 exceeds the second discrimination level 195, the output signal of the third comparator 112 becomes a high level, and the output signal of the fourth comparator 114 becomes a low level. Since the level of the output signal of the second maximum value selection circuit 77 is lower than the first discrimination level 194, the output signal of the seventh comparator 120 becomes high level. Therefore, the control terminal 152a of the second demultiplexer 152, the control terminal 153a of the third demultiplexer 153, and the fourth demultiplexer 15
A high level signal is supplied to the control terminal 155 of No. 4, and these demultiplexers 152, 153 and 154 do not operate. On the other hand, the control terminal 151a of the first demultiplexer 151 is supplied with a low level signal, while the input terminal 176 is supplied with a high level signal. Therefore, as is clear from truth table 2, the first
Only the output terminal 182 of the demultiplexer 151 outputs a low level signal, thereby lighting up the angle display light emitting diode 29. Even when the angle below the unit scale of the rotation angle of the drafting head 2 is 17.5 minutes or more, the angle display light emitting diodes 30, 31, 3 are activated in accordance with each discrimination level.
2, 33, 34, 35, 36, or 37 are sequentially driven to turn on. As shown in FIG. 9a, when the first angle detectors 21 and 22 are operating within normal temperature, the reference level at the first terminal 108 is 2V;
The voltage at the output terminal 105 of the third buffer amplifier 92 is 3V. The reference level at the first terminal 108 fluctuates in conjunction with the output fluctuations of the angle detectors 21 and 22, and the voltage at the output terminal 105 is from a constant voltage 5V positive power supply. Since it is formed by unrelated voltage dividing resistors, it remains constant and does not fluctuate even with temperature changes. As can be understood from Fig. 5, the voltage dividing resistor 10
2, 103 and 104 are angle detectors 21 and 22
The voltages at the seventh terminal 47 and the eighth terminal 124 are constant regardless of temperature changes. As is clear from the connection relationship of the voltage dividing resistors 93, 94 and 95 (see FIG. 5), the first terminal 108,
The voltages at the second terminal 109 and the third terminal 110 change in conjunction with fluctuations in the first type reference voltage. As is clear from the connection relationship of the voltage dividing resistors 96, 97 and 98 (see FIG. 5), the fourth terminal 116,
The voltages at the fifth terminal 122 and the sixth terminal 119 also change in conjunction with changes in the second type reference voltage. When the outputs of the first angle detector 21 and the second angle detector 22 decrease by, for example, 20% due to a temperature change, the first type reference voltage changes as shown in FIG. 9b.
Changes to 2.2V. In this case, the voltage at the second terminal 109 (first discrimination level 194) and the voltage at the third terminal 110 (second discrimination level 195) are also
Changes to 2.36V and 2.68V. This allows the first discrimination level 194 and the second
The rotation angle less than the unit scale detected by the discrimination level 195 does not change. The phenomenon established for the first angle detector 21 and the second angle detector 22 also applies to the third angle detector 23 and the fourth angle detector 24 in exactly the same manner. That is, the rotation angle less than the unit scale detected by the first discrimination level 194 and the third discrimination level 196 does not change even if the outputs of the third angle detector 22 and the fourth angle detector 24 change due to temperature changes. . As described above, according to the present invention, since the discrimination level changes in conjunction with the fluctuation of the angle detection signal of the angle detector, the temperature change of the angle detector, aging change, the angle detector and the main optical protractor board Or, even if there is dust attached to the indicating optical protractor, the error will be automatically compensated, and the rotation angle less than the unit scale displayed by the discrimination level will not change, so the rotation angle less than the unit scale will be accurate. Can be displayed.

[Brief explanation of drawings]

FIG. 1 is a plan view of a drafting head equipped with a drafting head rotation angle display device according to the present invention, FIG. 2 is a partially cutaway sectional view of the drafting head, and FIG. 3 is a rotation angle display of the drafting head. A plan view of the main optical protractor and the instruction optical protractor in the device, and FIG. 4 is a sectional view showing the positional relationship of the angle detector and rotational direction detector with respect to the main optical protractor and the instruction optical protractor. , Fig. 5 is a circuit diagram of the angle display electronic circuit according to the present invention, Fig. 6 is a circuit diagram of a constant voltage power supply, Fig. 7 is a waveform diagram at the output terminal of the maximum value selection circuit, and Fig. 8 is the above-mentioned angle display. FIG. 9 is a diagram illustrating the outline of the temperature compensation method in the rotation angle display device of the drawing head. 1... Drafting head rotation angle display device, 2...
Drafting head, 12... protractor, 21... first angle detector, 22... second angle detector, 23... third
Angle detector, 24...Fourth angle detector, 46...
Reference voltage divider circuit.

Claims (1)

[Claims] 1. On the drawing board, the signal level changes sinusoidally with one cycle of the unit scale on the drawing head and the protractor dial of the drawing head, which can be rotated clockwise or counterclockwise. first and second angle detectors that output angle detection signals with a phase difference of /2 period; and a second angle detector that outputs angle detection signals with a phase difference of 90° with respect to the first and second angle detectors. 3rd and 4th
an angle detector; a first reference voltage and third and fourth reference voltages for level discrimination by adding the first and second angle detection signals;
a reference voltage divider circuit that creates a second reference voltage for level discrimination by adding angle detection signals of the angle detector and also creates a plurality of discrimination levels that change in conjunction with these reference voltages; A circuit that generates a discriminated signal based on a detection signal, a circuit that controls display of a rotation angle using a signal discriminated based on a discrimination level, a plurality of display elements that display angles less than a unit scale, and the plurality of display elements described above. A rotation angle display device for a drafting head, comprising a circuit for controlling the display of angles less than a unit scale.