JPH0465680A - Peak detecting circuit - Google Patents

Abstract

PURPOSE:To enable a consideration for current driving ability at the output stage of operational amplifier unnecessary by providing a current detecting means consisting of transistors between the output terminal and inversion input terminal of the operational amplifier. CONSTITUTION:The 1st and 2nd transistors Trs Q1, Q2 are provided between the output terminal and inversion input terminal of the operational amplifier 1, and the current made to flow in both Trs Q1, Q2 are respectively amplified by a current mirror circuit of Trs Q3, Q5 and Q4, Q6. From the output of this current mirror circuit, a polarity of the current inputted to the inversion input terminal of operational amplifier 1 through a capacitor 4 is detected to output the detected signal. Thus, the peak of input/output waveforms to a signal input terminal 3 can be naturally detected but also the current according to the voltage inputted to the signal input terminal 3 is not in the condition to flow into the output stage of operational amplifier 1, and the consideration for current driving ability at the output stage of operational amplifier 1 is unnecessary.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a peak detection circuit that outputs an output signal whose level changes at the peak of an input signal waveform.

[Conventional technology]

FIG. 3 is a wiring diagram of a conventional peak detection circuit, and the configuration thereof will be explained below.

As shown in the figure, the output voltage at the non-inverting input horn terminal of the operational amplifier 1 is the power supply voltage Vc of the operational amplifier 1.

A capacitor 4 is provided between the signal input terminal 3 and the inverting input terminal of the operational amplifier 1, and the output terminal 5 of the operational amplifier 1 and the inverting input terminal The anode and cathode of the first diode 6 are respectively connected to the first diode 6, and the second diode 7 is connected antiparallel to the first diode 6.

Next, the operation of the circuit shown in FIG. 3 will be explained with reference to the signal waveform diagram shown in FIG. 4.

Now, when a voltage vIN having a waveform as shown by the solid line in FIG. 4(a) is input to the signal input terminal 3 as an input signal,
The inverting input terminal of the operational amplifier 1 is connected to the inverting input terminal of the operational amplifier 1 through the capacitor 4 by 90° from the voltage vIN as shown by the broken line in FIG.
A current of 11N flows with a phase-advanced waveform.

Then, during the period when this current IN is positive, the second diode 7 is conductive, and the output voltage of the reference power supply 2 is V, as shown in FIG. 4(b). A voltage lower than o/2 by the forward voltage vF of the second diode 7 (-V.0/2-V F2)
appears at output terminal 5.

Next, during the period when the current 11 is negative, the first diode 6 becomes conductive, and as shown in FIG. 4(b), the output voltage V of the reference power supply 2 increases. A voltage (-vcc/2+V, 1) higher than o/2 by the forward voltage VF of the first diode 6 appears at the output terminal 5.

Therefore, during the positive period and negative period of the current I11, the reference power supply 2
The output voltage V. o/2 as a reference, the output voltages become negative and positive, respectively, and as a result, a detection signal whose level changes at the peak of the waveform of the input voltage vIN to the signal input terminal 3 is output from the output terminal 5.

[Problem to be solved by the invention]

In the conventional case, 1. Since a current 'IN with a waveform as shown in FIG. 4(a) flows through the output stage of the operational amplifier 1 through the second diode 6.7, when designing the first operational amplifier,
There is a problem in that the current driving capability of the output stage must be taken into account, making the design of the operational amplifier 1 extremely complicated.

This invention was made to solve the above-mentioned problems, and it is possible to prevent the current through the capacitor from flowing to the output stage of the operational amplifier, thereby eliminating the complexity of designing the operational amplifier. The purpose is to

[Means for solving the problem]

The peak detection circuit of the present invention includes an operational amplifier whose non-inverting input terminal is connected to a reference power supply, a capacitor connected to a signal input terminal and an inverting input terminal of the operational amplifier, and an output terminal of the operational amplifier and the inverting input terminal. The input current includes a transistor provided between the input terminal and the operational amplifier that amplifies the output current of the operational amplifier and causes the amplified output current to flow to the inverting input terminal, and is input to the inverting input terminal via the capacitor based on the current flowing through the transistor. The current detecting means detects the polarity of the signal input terminal, and outputs a detection signal whose level changes when the input terminal waveform peaks to the signal input terminal.

[Effect]

In this invention, since the current detecting means is provided with a transistor provided between the output terminal and the inverting input terminal of the operational amplifier, the current from the input terminal to the signal input terminal flows to the transistor, unlike the conventional one. Since no current due to the input voltage to the signal input terminal flows through the output stage of the operational amplifier, there is no need to consider the current driving capability of the output stage of the operational amplifier.

〔Example〕

FIG. 1 shows a wiring diagram of an embodiment of the peak detection circuit of the present invention.

The difference between FIG. 1 and FIG. 3 is that 1. In place of the second diode 6.7, a transistor is provided between the output terminal and the inverting input terminal of the operational amplifier 1 to amplify the output current of the operational amplifier 1 and flow it to the inverting input terminal. The current detecting means 11 detects the polarity of the input terminal to the inverting input terminal based on the current flowing through the transistor, and outputs a detection signal whose level changes at the peak of the input voltage waveform to the signal input terminal 3. .

By the way, this current detection means 11 is configured as follows.

That is, the bases of the first NPN transistor Q1 and the second PNP transistor Q2, which correspond to the aforementioned transistors, are both connected to the output terminal of the operational amplifier 1.
The emitters of the transistor Q1 and the second transistor Q2 are both connected to the inverting input terminal of the operational amplifier 1, and the emitters are connected to the power supply terminal +81 of the voltage VCC.
The collector of the third NPN type transistor Q3 and the collector of the first transistor Q1 are connected, and the collector of the fourth NPN type transistor Q4 whose emitter is grounded is connected to the collector of the second transistor Q2.

A fifth transistor Q5 of PNP type and a sixth transistor Q6 of NPN type are provided for each of the current mirror circuits, and the base and collector of the third transistor Q3 are connected to the base of the fifth transistor Q5,
The emitter of the fifth transistor Q5 is connected to the power supply terminal B via the resistor R1, the collector and base of the fourth transistor Q4 are connected to the base of the sixth transistor Q6, and the emitter of the sixth transistor Q6 is connected to the resistor R2. It is grounded through.

and a power supply terminal + to which a voltage of Vcc/2 is supplied.
The bases of the seventh NPN transistor Q7 and the eighth PNP transistor Q8 are connected to 82, and the collector of the seventh transistor Q7 is connected to the power supply terminal B1.
The collector of the eighth transistor Q8 is grounded, and the collector of the seventh transistor Q8 is grounded.
The eighth emitter is also the fifth emitter. Sixth transistor Q5. Q
6 and the signal output terminal 12, and a current detection means 11 is constituted by each transistor Q1 to Q8 and resistors R1 and R2.

Next, the operation will be explained with reference to the signal waveform diagram in FIG.

Now, when a voltage VIN with a waveform as shown by the solid line in FIG. 2(a) is input to the signal input terminal 3 as a human input signal, it is input to the inverting input terminal of the operational amplifier 1 via the capacitor 4 as in the conventional case. is the voltage v as shown by the broken line in the same figure (a)
A current 'IN whose waveform is 90 degrees ahead of IN flows.

During the positive period of this current IIN, the second transistor Q2 is turned on, and a current as shown by the broken line in FIG. 2(b) flows from the capacitor 4 to the second transistor Q2. ．． Sixth transistor Q4. Q6 turns on, and as the sixth transistor Q6 turns on, the seventh transistor Q7 turns on, and the collector of the seventh transistor Q7,
Since the current via the emitter is supplied to the sixth transistor Q6, the emitter of the seventh transistor Q7 has a voltage lower than the base voltage vcc/2 of the seventh transistor Q7 by the base-emitter voltage vBE7 of the seventh transistor Q7. (-vcc/2-vBE7), and a voltage of (VCo/2-vBE□) appears at the signal output terminal 12.

2″-ro7・Current 1,,; N(') Positive period 5°61
・1st, 3rd, 5th. Eighth transistor Ql, Q3. Q
5. Q8 is off.

Next, during the period when the current 'IN is negative, the first transistor Q1 is turned on, and a current flows from the collector and emitter of the first transistor Q1 to the capacitor 4 as shown by the solid line in FIG. 2(b). , along with this, the third. Fifth transistor Q3. Q5 is turned on, the fifth transistor Q5 is turned on, the eighth transistor Q8 is turned on, and the power terminal 81 is turned on.
Since the current flowing through the emitter and collector of the fifth transistor Q5 flows to the ground via the eighth transistor Q8, the emitter of the eighth transistor Q8 is lower than the base voltage V cc/2 of the eighth transistor Q8. The voltage between the base and emitter of R8CCBF2 becomes higher by the voltage V (-v/2+V), and the signal output terminal 12 has (V/2+V)C.
The voltage of CBF2 appears.

Therefore, as shown in FIG. 2(C), during the positive period and negative period of the current IIN, the 7th. Base voltage V of the eighth transistors Q7 and Q8. o/2 as a reference, the signal output terminal 12
As a result, a detection signal whose level changes at the peak of the waveform of the input terminal VIN to the signal input terminal 3 is output from the signal output terminal 12.

At this time, the current IIN having the waveform shown in FIG. In addition, there is no need to consider the current drive capability of the output stage,
Can be designed freely.

In this way, the first . A second transistor Ql, Q2 is provided, and the current flowing through both transistors Ql, Q2 is transferred to a transistor Q3.
．． Q5 and Q4. The current mirror circuit of Q6 amplifies each current, and the polarity of the current that is input to the inverting input terminal of operational amplifier 1 via a capacitor is detected from the output of the current mirror circuit and a detection signal is output. Not only is it possible to detect the peak of the input voltage waveform to the input terminal 3, but there is no current flowing through the output stage of the operational amplifier 1 due to the input voltage to the signal input terminal 3, unlike in the conventional case. , there is no need to consider the current driving capability of the output stage of the operational amplifier 1.

Note that the current detection means is not particularly limited to the configuration shown in FIG.

〔Effect of the invention〕

As described above, the peak detection circuit of the present invention includes a transistor provided between the output terminal and the inverting input terminal of an operational amplifier, and based on the current flowing through this transistor, the peak detection circuit of the operational amplifier is Since it is equipped with a current detection means that detects the polarity of the current input to the inverting input terminal, it is possible to detect the peak of the voltage waveform input to the signal input terminal, and it is also possible to detect the peak of the voltage waveform input to the signal input terminal. There is no need to consider the current drive capability of the output stage, and the complexity of designing conventional operational amplifiers can be eliminated.

[Brief explanation of the drawing]

Fig. 1 is a wiring diagram of an embodiment of the peak detection circuit of the present invention, Fig. 2 is a signal waveform diagram for explaining the operation of Fig. 1, Fig. 3 is a wiring diagram of a conventional peak detection circuit, and Fig. 4. is a signal waveform diagram for explaining the operation of FIG. 3; In the figure, 1 is an operational amplifier, 2 is a reference power supply, 3 is a signal input terminal, 4 is a capacitor, 11 is a current detection means, and Ql
, Q2 is the first. This is the second transistor. Note that the same reference numerals in each figure indicate the same or corresponding parts.

Claims (1)

[Claims] (1) an operational amplifier whose non-inverting input terminal is connected to a reference power supply; a capacitor connected to a signal input terminal and an inverting input terminal of the operational amplifier; and between the output terminal of the operational amplifier and the inverting input terminal. A transistor is provided to amplify the output current of the operational amplifier and send it to the inverting input terminal, and the polarity of the input current input to the inverting input terminal via the capacitor is detected based on the current flowing through the transistor. , current detection means for outputting a detection signal whose level changes at the peak of the input voltage waveform to the signal input terminal.