JPH0466103B2 - - Google Patents
Info
- Publication number
- JPH0466103B2 JPH0466103B2 JP60135580A JP13558085A JPH0466103B2 JP H0466103 B2 JPH0466103 B2 JP H0466103B2 JP 60135580 A JP60135580 A JP 60135580A JP 13558085 A JP13558085 A JP 13558085A JP H0466103 B2 JPH0466103 B2 JP H0466103B2
- Authority
- JP
- Japan
- Prior art keywords
- collector
- region
- conductivity type
- base
- concentration
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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- Bipolar Transistors (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は高耐圧半導体装置に関し、特に誘導負
荷の下で動作する半導体装置において、高いコレ
クタ・エミツタ間耐圧を得る事のできるバイポー
ラトランジスタに関するものである。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a high-voltage semiconductor device, and particularly to a bipolar transistor that can obtain a high collector-emitter breakdown voltage in a semiconductor device that operates under an inductive load. It is.
従来、この種のバイポーラトランジスタとして
は第3図に示す構造が知られている。すなわち、
ベース2にエミツタ1を多数個設け、これを並列
接続するがこれらの特性の均一化をはかるためエ
ミツタに直列に抵抗(例えば多結晶シリコン抵
抗)11を挿入し負帰還作用で局部電流集中を制
御する方法がとられ安全動作領域の拡大を図つて
いる。なお図において4はコレクタ低濃度層、5
はコレクタ高濃度層、6はベース電極、7はエミ
ツタ電極、8はコレクタ電極、9は表面保護膜で
ある。
Conventionally, the structure shown in FIG. 3 is known as this type of bipolar transistor. That is,
A large number of emitters 1 are provided on the base 2, and these are connected in parallel.In order to equalize these characteristics, a resistor (for example, a polycrystalline silicon resistor) 11 is inserted in series with the emitters to control local current concentration by negative feedback. Measures are being taken to expand the safe operating range. In the figure, 4 is the collector low concentration layer, and 5 is the collector low concentration layer.
6 is a collector high concentration layer, 6 is a base electrode, 7 is an emitter electrode, 8 is a collector electrode, and 9 is a surface protective film.
上述した従来技術のバイポーラトランジスタで
はたしかに局部電流集中防止には役立つている
が、素子に直列に抵抗が入るためコレクタ・エミ
ツタ間飽和電圧、ベースエミツタ間飽和電圧が高
いという欠点がある。
Although the above-mentioned conventional bipolar transistors are certainly useful in preventing local current concentration, they have the drawback of high collector-emitter saturation voltage and base-emitter saturation voltage because a resistor is inserted in series with the element.
本発明は上記従来技術の欠点を除去するため、
負帰還抵抗を用いることなくして、コレクタ電流
の集中を防ぐことができ、結果として高耐圧化の
達成された高耐圧半導体装置を提供することを目
的とする。 In order to eliminate the drawbacks of the above-mentioned prior art, the present invention has the following features:
It is an object of the present invention to provide a high breakdown voltage semiconductor device that can prevent concentration of collector current without using a negative feedback resistor and achieves high breakdown voltage as a result.
本発明の高耐圧半導体装置は、第1導電形のコ
レクタ領域と該コレクタ領域に接触する第2導電
形のベース領域と該ベース領域に接触し前記コレ
クタ領域とは離間した第1導電形のエミツタ領域
からなる半導体装置において、前記コレクタとな
る第1導電形半導体基板に第2導電形でかつ前記
コレクタ基板濃度よりは高濃度な埋込み層をベー
ス領域と離間して部分的に備えて構成される。
A high voltage semiconductor device of the present invention includes a collector region of a first conductivity type, a base region of a second conductivity type in contact with the collector region, and an emitter of a first conductivity type in contact with the base region and spaced apart from the collector region. In a semiconductor device comprising a region, the first conductivity type semiconductor substrate serving as the collector is partially provided with a buried layer of a second conductivity type and having a higher concentration than the collector substrate, spaced apart from the base region. .
次に、本発明について図面を参照して説明す
る。第1図は本発明の一実施例の断面図で縦型の
バイポーラトランジスタを示している。第1図に
おいて、1はエミツタ領域、2はベース領域、3
はコレクタ低濃度層4にこの層より高濃度で反対
導電型を有しベース領域と離間して部分的に形成
された電流集中防止用の埋込み層である。また5
はコレクタ高濃度層、6はベース電極、7はエミ
ツタ電極、8はコレクタ電極、9は表面保護膜、
10はベース中央部である。
Next, the present invention will be explained with reference to the drawings. FIG. 1 is a cross-sectional view of one embodiment of the present invention, showing a vertical bipolar transistor. In FIG. 1, 1 is an emitter region, 2 is a base region, and 3 is an emitter region.
is a buried layer for preventing current concentration, which is partially formed in the collector low concentration layer 4 at a higher concentration than this layer and has an opposite conductivity type and is spaced apart from the base region. Also 5
is a collector high concentration layer, 6 is a base electrode, 7 is an emitter electrode, 8 is a collector electrode, 9 is a surface protective film,
10 is the center portion of the base.
コレクタ電流の集中防止用の埋込層3は、たへ
えばコレクタ低濃度層4のエピタキシヤル成長工
程中にこのエピタキシヤル層とは反対導電型の不
純物をイオンインプラテーシヨンあるいはガス拡
散によつて導入することで形成することができ
る。また、コレクタ電流の集中防止領域3は順バ
イアス時の特性を劣化させないように素子表面か
ら見たベースパターン内に形成する。 The buried layer 3 for preventing concentration of collector current is formed by, for example, impurities having a conductivity type opposite to that of the epitaxial layer during the epitaxial growth process of the collector low concentration layer 4 by ion implantation or gas diffusion. It can be formed by introducing Further, the collector current concentration prevention region 3 is formed within the base pattern as viewed from the element surface so as not to deteriorate the characteristics during forward bias.
第2図は本発明の他の実施例の断面図で横型の
バイポーラトランジスタを示している。本実施例
はコレクタ高濃度層5a及びコレクタ電極8aの
位置並びに構造が異なる他は同じで、特に発明の
主要部は同一である。なお、電流集中を防ぐこと
が素子の破壊耐量の向上になる理由について説明
すると、一般に、トランジスタが動作状態からし
や断状態に変化する時、ベース電極6からの距離
が長いベース中央部10のキヤリアの掃けが悪い
としや断によつて生じる高電界によるドリフト電
流はベース中央部10で大きく、この部分で消費
される単位時間、単位体積当りのエネルギーPは
近似的にP=E・J(E:電界ベクトル、J:電
流密度ベクトル)と書け、またJ≒qμNE(q:
電荷素量、μ:移動度、N:多数キヤリア密度)
であるから、結局P≒qμN|E|2となり電流集
中を防ぐ事によりNが大きくならず、エネルギー
消費Pも小さく、素子の破壊耐量は向上する。 FIG. 2 is a cross-sectional view of another embodiment of the present invention, showing a horizontal bipolar transistor. This embodiment is the same except that the positions and structures of the collector high concentration layer 5a and the collector electrode 8a are different, and in particular, the main parts of the invention are the same. In addition, to explain the reason why preventing current concentration improves the breakdown resistance of the element, generally speaking, when a transistor changes from an operating state to a desensitized state, the central part of the base 10, which is a long distance from the base electrode 6, The drift current due to the high electric field caused by poor carrier sweeping or breakage is large in the center part 10 of the base, and the energy P per unit time and unit volume consumed in this part is approximately expressed as P=E・J( E: electric field vector, J: current density vector), and J≒qμNE (q:
elementary charge, μ: mobility, N: majority carrier density)
Therefore, P≒qμN|E| 2 , and by preventing current concentration, N does not increase, energy consumption P is also small, and the breakdown resistance of the element is improved.
以上説明したように本発明はコレクタ領域にコ
レクタとは反対導電形の埋込み層を導入する事
で、コレクタを流れる多数キヤリアに対するエネ
ルギーバリアを形成する事によつて、ベース中央
部への電流集中を防ぎ、この部分で消費されるエ
ネルギーを減少させる事ができ、その結果高耐圧
化できる。
As explained above, the present invention introduces a buried layer of conductivity type opposite to that of the collector in the collector region, thereby forming an energy barrier against the majority of carriers flowing through the collector, thereby reducing current concentration at the center of the base. The energy consumed in this part can be reduced, and as a result, high voltage resistance can be achieved.
第1図は本発明の一実施例の断面図、第2図は
本発明の他の実施例の断面図、第3図は従来の縦
型高耐圧半導体装置の一例の断面図である。
1……エミツタ、2……ベース、3……電流集
中防止用埋込層、4……コレクタ低濃度層、5,
5a……コレクタ高濃度層、6……ベース電極、
7……エミツタ電極、8,8a……コレクタ電
極、9……表面保護膜、10……ベース中央部、
11……抵抗(多結晶シリコン抵抗)。
FIG. 1 is a sectional view of one embodiment of the present invention, FIG. 2 is a sectional view of another embodiment of the invention, and FIG. 3 is a sectional view of an example of a conventional vertical high voltage semiconductor device. 1... Emitter, 2... Base, 3... Buried layer for preventing current concentration, 4... Collector low concentration layer, 5,
5a... Collector high concentration layer, 6... Base electrode,
7... Emitter electrode, 8, 8a... Collector electrode, 9... Surface protective film, 10... Center part of base,
11...Resistance (polycrystalline silicon resistance).
Claims (1)
に接触する第2導電形のベース領域と該ベース領
域に接触し前記コレクタ領域とは離間した第1導
電形のエミツタ領域からなる半導体装置におい
て、前記コレクタとなる第1導電形半導体基板に
第2導電形でかつ前記コレクタ基板濃度よりは高
濃度な埋込み層をベース領域と離間して部分的に
備えた事を特徴とする高耐圧半導体装置。1. A semiconductor device comprising a collector region of a first conductivity type, a base region of a second conductivity type in contact with the collector region, and an emitter region of a first conductivity type in contact with the base region and spaced apart from the collector region, A high breakdown voltage semiconductor device, characterized in that a semiconductor substrate of a first conductivity type serving as a collector is partially provided with a buried layer of a second conductivity type and having a higher concentration than the collector substrate, spaced apart from a base region.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60135580A JPS61294856A (en) | 1985-06-21 | 1985-06-21 | High withstand voltage semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60135580A JPS61294856A (en) | 1985-06-21 | 1985-06-21 | High withstand voltage semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61294856A JPS61294856A (en) | 1986-12-25 |
| JPH0466103B2 true JPH0466103B2 (en) | 1992-10-22 |
Family
ID=15155136
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60135580A Granted JPS61294856A (en) | 1985-06-21 | 1985-06-21 | High withstand voltage semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS61294856A (en) |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2374742A1 (en) * | 1976-12-20 | 1978-07-13 | Radiotechnique Compelec | MULTI-LAYER TRANSISTOR FOR HIGH VOLTAGES AND ITS MANUFACTURING PROCESS |
| JPS5467383A (en) * | 1977-11-08 | 1979-05-30 | Nec Corp | Semiconductor device |
| JPS5598854A (en) * | 1979-01-24 | 1980-07-28 | Mitsubishi Electric Corp | Semiconductor device |
-
1985
- 1985-06-21 JP JP60135580A patent/JPS61294856A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61294856A (en) | 1986-12-25 |
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