JPH0468577U - - Google Patents

Info

Publication number
JPH0468577U
JPH0468577U JP11299890U JP11299890U JPH0468577U JP H0468577 U JPH0468577 U JP H0468577U JP 11299890 U JP11299890 U JP 11299890U JP 11299890 U JP11299890 U JP 11299890U JP H0468577 U JPH0468577 U JP H0468577U
Authority
JP
Japan
Prior art keywords
conductive pattern
composite
glass substrate
substrate
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11299890U
Other languages
Japanese (ja)
Other versions
JP2529037Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1990112998U priority Critical patent/JP2529037Y2/en
Publication of JPH0468577U publication Critical patent/JPH0468577U/ja
Application granted granted Critical
Publication of JP2529037Y2 publication Critical patent/JP2529037Y2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

図は本考案に係る複合基板構造を示す断面図で
ある。 図において、1はコンポジツト基板、2はガラ
ス基板、3はスルーホール、4はチツプ抵抗又は
、チツプ形積層コンデンサである。
The figure is a sectional view showing a composite substrate structure according to the present invention. In the figure, 1 is a composite substrate, 2 is a glass substrate, 3 is a through hole, and 4 is a chip resistor or a chip-type multilayer capacitor.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ガラス基板とコンポジツト基板とを絶縁接着す
ると共に両基板に形成した導電パターンの一部を
電気的に接続して複合基板を構成し、少なくとも
チツプ抵抗又はチツプ形積層セラミツクコンデン
サは前記ガラス基板上の導電パターンにはんだ付
け接続したことを特徴とする複合基板構造。
A glass substrate and a composite substrate are insulated and bonded together, and a part of the conductive pattern formed on both substrates is electrically connected to form a composite substrate, and at least a chip resistor or a chip-shaped multilayer ceramic capacitor is connected to the conductive pattern on the glass substrate. A composite board structure characterized by soldering connections to patterns.
JP1990112998U 1990-10-26 1990-10-26 Composite board structure Expired - Lifetime JP2529037Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1990112998U JP2529037Y2 (en) 1990-10-26 1990-10-26 Composite board structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1990112998U JP2529037Y2 (en) 1990-10-26 1990-10-26 Composite board structure

Publications (2)

Publication Number Publication Date
JPH0468577U true JPH0468577U (en) 1992-06-17
JP2529037Y2 JP2529037Y2 (en) 1997-03-12

Family

ID=31860531

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1990112998U Expired - Lifetime JP2529037Y2 (en) 1990-10-26 1990-10-26 Composite board structure

Country Status (1)

Country Link
JP (1) JP2529037Y2 (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5928996A (en) * 1982-08-06 1984-02-15 三洋電機株式会社 Balance ring of dehydrator

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5928996A (en) * 1982-08-06 1984-02-15 三洋電機株式会社 Balance ring of dehydrator

Also Published As

Publication number Publication date
JP2529037Y2 (en) 1997-03-12

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term