JPH0468652B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention is a method of drawing a figure or the like on a tablet board by sequentially detecting the position of the stylus on the tablet board. A part that includes a tablet board and a stylus in a graphic display device or graphic creation device in a broad sense in which data is obtained and various images are obtained on a cathode ray tube display based on this data, for example The present invention relates to a position detection device suitable for use as a component of a tablet, and in particular to one in which the position of a stylus on a tablet plate is detected by an electrostatic method.

BACKGROUND TECHNOLOGY AND PROBLEMS The above-mentioned position detection device has a position detection plate constituting a tablet plate and a stylus whose position on the position detection plate is detected. It has been proposed that the position of the stylus is detected using an electrostatic method.

In such a position detection device, for example, the position detection plate constituting the tablet board is made up of a plurality of strip conductors arranged at regular intervals, and the strip conductors are connected at regular intervals. A constant voltage is sequentially supplied to the stylus in the order of the array, and the stylus is configured with voltage detection means that generates an output signal according to the position of the strip conductor to which the voltage is applied. The output signal detects the position in the arrangement direction of the plurality of strip conductors on the position detection plate forming the tablet plate of the voltage detection means forming the stylus.

Specifically, the voltage detection means is constructed with an electrode grounded through a fixed capacitor, and the magnitude of the voltage detected by this electrode is determined by the voltage detection means of the strip conductor to which the voltage is applied. When a constant voltage is sequentially supplied to a plurality of strip conductors in the order of their arrangement at constant time intervals as a function of their position, the detected output signal from the voltage detection means is When the voltage is applied to the strip conductor closest to the voltage detecting means, the voltage changes stepwise and takes the maximum level, and the overall level reaches a certain positive value, for example from zero, and from this positive The value returns to zero again. Then, from the point in time when voltage is first supplied to a reference strip conductor placed at one end, the level of the output signal obtained when the detection output signal of this voltage detection means passes through a predetermined bandpass filter is determined. The time required to reach a predetermined level or to cross a specific level thereafter corresponds to the position of the plurality of strip conductors on the position detection plate of the voltage detection means in the arrangement direction. Therefore, the detection output signal from this voltage detection means is processed appropriately to form a position detection signal corresponding to the above-mentioned required time, and based on this position detection signal,
The positions of the plurality of strip conductors on the position detection plate of the voltage detection means in the arrangement direction are detected.

However, in such a position detection device, when the voltage detection means is placed very close to the position detection plate, the voltage detection means is shielded by a plurality of strip conductors, and its output side However, if the space between the voltage detection means and the position detection plate becomes large to a certain extent, voltage detection may be affected by external noise induced by other surrounding equipment or the human body. The detection output signal from the means includes a normal signal component based on the voltage applied to the strip conductor of the position detection plate, and a component induced by external noise, that is,
A noise component is added. Therefore, the detection output signal from the voltage detection means changes as described above during the period in which a constant voltage is sequentially supplied to the plurality of strip conductors of the position detection plate due to the influence of the mixed noise component. No, along with that,
From the time when a voltage is applied to the strip conductor provided at one end of the reference to the time when the level of the output signal obtained by passing the detection output signal from the voltage detection means through a predetermined bandpass filter reaches a predetermined level, or Thereafter, the time at which a specific level is crossed no longer corresponds to the position in the arrangement direction of the plurality of strip conductors on the position detection plate of the voltage detection means, and there is a possibility that correct position detection will not be performed.

Purpose of the Invention In view of the above, the present invention provides the following advantages: When a constant voltage is sequentially supplied to the plurality of strip conductors of the position detection plate,
The voltage of each strip conductor is detected by the voltage detection means, a detection output signal is obtained from the voltage detection means, and when a position detection signal is formed based on this detection output signal, the detection from the voltage detection means It is an object of the present invention to provide a position detection device that can always obtain a correct position detection output by eliminating the influence of noise components mixed into an output signal.

Summary of the Invention A position detection device according to the present invention includes a position detection plate in which a plurality of strip conductors are arranged in parallel at predetermined intervals, and a predetermined voltage is sequentially supplied to these strip conductors at predetermined time intervals. a voltage detecting means which, when placed on the position detection board, generates a detection output signal corresponding to the position of the strip conductor to which a predetermined voltage is supplied; A signal extracting means such as a bandpass filter for extracting signal components, and a point in time when a predetermined voltage is supplied to the reference one of the plurality of strip conductors mentioned above, and a point in time when the output signal of the signal extracting means reaches a predetermined level;
Or, in addition to a counting circuit that counts the time until a certain level is then crossed.
and a noise level determination circuit section that determines whether the level of the noise component contained in the detection output signal from the voltage detection means is higher than a predetermined level, based on the time data counted by the above-mentioned counting circuit. The position in the arrangement direction of the strip conductors on the position detection plate of the voltage detection means is detected, and when the level of the noise component of the detection output signal from the voltage detection means is higher than a predetermined level, the count circuit detects the position of the strip conductor on the position detection plate. The counted time data is made invalid.

Embodiment FIG. 1 shows an example of a position detection device according to the present invention, in which a position detection plate 10 constituting a tablet board has strip conductors Y ₁ , Y ₂ , . . . on an insulating layer 11.
Y _n are arranged in parallel at regular intervals, and
On the insulating layer 12 deposited on this insulating layer 11, strip conductors X ₁ , Y 1 , Y _{2 , .} . .
X ₂ ,...X _o are arranged in parallel at regular intervals,
Although not shown, the structure is such that an insulating layer is further deposited on the insulating layer 12.

The strip conductors X ₁ , X ₂ , . . . of this position detection plate 10
At one end of X _o and strip conductors Y ₁ , Y ₂ , . . . Y _n there are switches 32 ₁ , 32 _{2 ,} .
₁ , 34 ₂ , . . . 34 _n are provided. and,
Within a certain period, the shift register 31
output terminals N ₁ , N ₂ , ...N _o of switch 32 ₁ ,
Pulse signals are sequentially supplied to switches _{31 1} , 32 ₂ , . . . at regular time intervals to switches 32 ₂ , .
32 _o is sequentially switched from the terminal A side to the terminal B side at regular time intervals, thereby causing the strip conductors X ₁ ,
A constant positive voltage +Vcc is sequentially applied from the power supply terminal 35 to X ₂ and X _o at constant time intervals. Similarly, within another fixed period, the output terminal of the shift register 33
M ₁ , M ₂ , ... M _n to switches 34 ₁ , 34 ₂ ,
A pulse signal is sequentially supplied to the switches 34 ₁ , 34 ₂ , _{34 n} at regular time intervals.
are sequentially switched from the terminal A side to the terminal B side at regular time intervals, and as a result, the strip conductors Y ₁ , Y ₂ ,
. . . A constant positive voltage +Vcc is sequentially applied from the power supply terminal 35 to Y _n at constant time intervals.

On the other hand, a basic clock pulse Co of, for example, 1280 kHz is obtained from the clock pulse generation circuit 41, and this clock pulse Co is supplied to a frequency dividing circuit 42 and frequency-divided.
A clock pulse Cs as shown in the figure is obtained,
This clock pulse Cs is supplied to shift register 31 and shift register 33 as respective shift pulses.

Further, as shown in FIG. 2, a synchronizing signal Hs whose pulse width is equal to one period of the clock pulse Cs obtained from the frequency dividing circuit 42 is supplied to the terminal 43 at a constant period.
The clock pulse Cs obtained from the frequency dividing circuit 42 is supplied to the data terminal D of the D flip-flop circuit 44 through the D flip-flop circuit 44.
As shown in FIG. 2, the clock pulse Cs rises at the rising edge of the periodic signal Hs immediately after the leading edge of the synchronizing signal Hs, and is supplied to the clock terminal CK of the clock pulse Cs from the D flip-flop circuit 44. A signal St that falls immediately after rising is obtained. Further, the synchronizing signal Hs is supplied to the T flip-flop circuit 45 through the terminal 43,
As shown in FIG. 2, a signal Sx that is at a high level in every other period Tx of the periods divided by the synchronization signal Hs and a low level in the remaining every other period Ty; A signal Sy that is inverted with respect to Sx is obtained.

Then, the signal St obtained from the D flip-flop circuit 44 and the signal Sx obtained from the T flip-flop circuit 45 are supplied to an AND gate circuit 46, and the signal St in the period Tx is taken out. This extracted signal Stx is supplied to the shift register 31 as its start pulse. Similarly, the signal St obtained from the D flip-flop circuit 44 and the signal St obtained from the T flip-flop circuit 4
5, the signal Sy obtained from AND gate circuit 4
7, one of the signals St during period Ty is extracted, and this extracted signal Sty is supplied to the shift register 33 as its start pulse.

Therefore, in every other period Tx, the clock pulse Cs obtained from the frequency dividing circuit 42 is applied to the output terminals N ₁ , N ₂ , . . . _{No of} the shift register 31, as shown in FIG. Pulse signals Px ₁ , Px ₂ , ... Px _o having a pulse width of one period are
These pulse signals Px ₁ , Px ₂ , . . . Px _o are obtained sequentially at time intervals of one period of the clock pulse Cs, and are supplied to switches 32 ₁ , 32 ₂ , . . . 32 _o ,
As described above, the voltage +Vcc from the power supply terminal 35 is sequentially applied to the strip conductors X ₁ , X ₂ , . _. . In addition, in the remaining every other period Ty, pulse signals Py ₁ , Py ₂ , . . . _{Py n are} similarly obtained sequentially at the output terminals M ₁ , M ₂ , . The signals Py ₁ , Py ₂ , ...Py _n are the switches 34
₁ , 34 ₂ , . . . 34 _n , and the strip conductors Y ₁ , Y _{2 ,} .
A voltage +Vcc from 5 is given.

Voltage detection means 2 constituting a stylus for drawing figures etc. on a position detection plate 10 constituting a tablet board
0 is equipped with a detection electrode 20', which is placed on the position detection plate 10 with its head facing the outside of the shield case 21, and has a fixed capacitance inside the shield case 21. Grounded through C _L. Furthermore, the detection electrode 2
0' is connected to the gate of a field effect transistor 22 inside the shield case 21, and a bias resistor R is connected between the gate of the transistor 22 and ground.

Then, _a voltage +Vcc _is sequentially applied to _{the strip conductors X 1 ,} X ₂ , _... As the capacitance formed between the strip conductor and the detection electrode 20' changes sequentially at regular time intervals, the level of the signal voltage Vo obtained at the detection electrode 20' changes, and the strip conductor ₁ , X ₂ , ... X _o or the detection electrode 20' of the strip conductor Y ₁ , Y ₂ , ... Y _n
When the voltage +Vcc is applied to the one closest to the position of , the level of the signal voltage Vo becomes maximum. The signal voltage Vo obtained at the detection electrode 20' is impedance-converted by a field effect transistor 22, and is supplied to a tuned amplifier circuit 51, which forms a bandpass filter and has a synchronous frequency of, for example, 6.25 kHz.

Here, if the detection electrode 20' is brought sufficiently close to the position detection plate 10 and the signal voltage Vo obtained from it is not mixed with noise components of a predetermined level or higher induced by external noise, the tuning From the amplifier circuit 51, as shown in FIG. 2, at two points delayed by a predetermined time from the point when the signal voltage Vo reaches its maximum, the ground level changes from positive to negative after having a large level peak. A transversely varying signal Sc is obtained. This signal Sc is supplied to the Schmitt trigger circuit 52 and
As shown in the figure, the signal Sc falls from a high level to a low level when it crosses a certain positive voltage threshold Vs, and then falls from a low level when the signal Sc crosses the ground level from positive to negative. A signal Sz rising to a high level is obtained. The signal St obtained from the D flip-flop circuit 44 is supplied to the set terminal S of the RS flip-flop circuit 53, and the signal Sz obtained from the Schmit trigger circuit 52 is supplied to the reset terminal R of the RS flip-flop circuit 53. supplied,
From the RS flip-flop circuit 53, at the beginning of the period Tx or Ty, the reference one of the strip conductors X ₁ , X ₂ , ... X _o or the strip conductors Y ₁ , Y ₂ , ... Y _n , for example, rises at the rising edge of the signal St, which is the time t1 when the voltage +Vcc is applied to the nearest strip conductor X ₁ to strip conductor Y ₁ , and then the signal Sc from the tuned amplifier circuit 51 reaches the voltage threshold
The second falling at the first rising edge of the signal Sz, indicated by the upward arrow, is the time t2 when it crosses the ground level from positive to negative for the first time after crossing Vs.
A signal Gc shown at the bottom of the figure is obtained.

Then, the 1280kHz clock pulse Co obtained from the clock pulse generation circuit 41 and the signal Gc obtained from the RS flip-flop circuit 53 are supplied to the AND gate circuit 54, and the period when the signal Gc is at a high level, that is, from time t1 to time t1, is supplied to the AND gate circuit 54. t2
During the period up to, the clock pulse Co is extracted. On the other hand, the synchronizing signal Hs is supplied to the clear terminal CLR of the counter 55 through the terminal 43,
The counter 55 is cleared at the leading edge of the synchronization signal Hs,
And, the RS flip immediately after this clearing
During the high level period of the signal Gc obtained from the flop circuit 53, the clock pulse Cc obtained from the AND/Gero circuit 54 is supplied to the clock terminal CK of the counter 55 and counted.
As a result, the time from time t1 to time t2 is counted, and output data corresponding to this time is obtained. The time from time t1 to time t2, therefore, the output data of the counter 55 corresponding to this time is the position detection plate 10 of the detection electrode 20'.
Strip conductor in the X or Y direction on top
The distance from the reference one of X ₁ , X ₂ , ... X _o or Y ₁ , Y ₂ , ... Y _n (the nearest strip conductor X ₁ or Y ₁ ) , X direction or Y
Therefore, the counter 55 counts from the fall of the signal Gc obtained from the RS flip-flop circuit 53 in the middle of every other period Tx to the leading edge of the subsequent synchronization signal Hs. In the period Ty, the output data indicating the position of the detection electrode 20' on the position detection plate 10 in the X direction at that time is held, and the RS flip-flop circuit 53 in the middle of every other remaining period Ty is held. During the period from the fall of the signal Gc obtained from the above to the leading edge of the subsequent synchronizing signal Hs, output data indicating the position of the detection electrode 20' on the position detection plate 10 in the Y direction at that time is held. It turns out. The output data of this counter 55 is then supplied to a data processing circuit 57.

On the other hand, the signal Sc from the synchronous amplifier circuit 51 is also supplied to the amplitude-limiting amplifier circuit 100, and the signal Sc is amplified from the amplitude-limiting amplifier circuit 100.
A signal S'c as shown in FIG. 3 is obtained in which the large level peak portion is amplitude limited. this signal
S'c is fed to a Schmitt trigger circuit 101 such that the two amplitude-limited peaks of the signal S'c exceed a certain positive voltage threshold V's, for example approximately equal to the aforementioned voltage threshold Vs. A signal S′z is obtained, which falls from high level to low level at a point in time, and then rises from low level to high level when signal S′c crosses the ground level from positive to negative. It is supplied to the clock terminal CK of the counter 102. Note that the above-mentioned amplitude limiting amplifier circuit 100 and Schmitt trigger circuit 101
As will be described later, the noise level determining circuit unit determines whether the level of the noise component is higher than a predetermined level.

Also, the synchronization signal Hs is simply supplied to the clear terminal CLR of the counter 102 through 43, and the counter 102 is cleared at the leading edge of the synchronization signal Hs.
The counter 102 is then supplied after each clear, as indicated by the arrow in FIG.
Two rises of the signal S'z from low level to high level are counted, and the content of the count value, that is, data Dz indicating "2" in this case.
is supplied to the data comparison circuit 103. The data comparison circuit 103 also receives a count value represented by the data Dz from the counter 102 obtained when the signal voltage Vo obtained from the detection voltage 20' is not mixed with noise components of a predetermined level or higher.
In this case, reference data Dr representing "2" is supplied from the reference data generation circuit 105. Furthermore, the signal St obtained from the D flip-flop circuit 44 is supplied to the data comparison circuit 103 as a trigger signal to the monostable multivibrator 104, and the signal St obtained from the D flip-flop circuit 44 is supplied from the monostable multivibrator 104 as a trigger signal. A data discrimination pulse P obtained just before the end of the data discrimination pulse P is supplied within the data discrimination pulse P, and during the period of this data discrimination pulse P, the data Dz from the counter 102 and the reference data Dr are compared in the data comparison circuit 103, and the comparison output Sco is can get. This comparison output Sco is assumed to take a high level only when the data Dz and the reference data Dr match.
In this case, since the data Dz and the reference data Dr both represent "2" and match, a comparison output Sco that takes a high level during the period of the data discrimination pulse P is obtained as shown in FIG. .

The comparison output Sco having a high level and the data discrimination pulse P are supplied to the AND gate circuit 106, and an AND output which takes a high level during the period of the data discrimination pulse P as shown in the bottom row of FIG. P' is obtained and is supplied to data processing circuit 57 as a signal instructing it to treat the output data from counter 55 as valid.
Note that the data processing circuit 57 is also supplied with the signal Sx (or signal Sy).

Therefore, the data processing circuit 57 receives a signal Sx (obtained from the T flip-flop circuit 45) that distinguishes the period Tx in which the position in the X direction is detected and the period Ty in which the position in the Y direction is detected. or Sy) and the output data of the counter 55,
A signal P' instructing to treat the output data from the counter 55 obtained from the AND gate circuit 106 as valid is supplied, and the output terminal of the data processing circuit 57 is connected to the position detection plate 10 of the detection electrode 20'. Position data indicating the position in the upper X and Y directions is obtained, and the position of the detection electrode 20' is detected.

On the other hand, if the detection electrode 20' is arranged apart from the position detection plate 10, and therefore the signal voltage Vo obtained from the detection electrode 20' is mixed with a noise component of a predetermined level or higher induced by external noise, is affected by the noise component, and the synchronous amplifier circuit 51 often generates more (for example, 3
A signal Scn as shown in FIG. 4 is obtained having two large level peaks. This signal Scn is also supplied to the Schmitt trigger circuit 52, but in this signal Scn, after its large level peak exceeds the voltage threshold Vs, the point at which it first crosses the ground level from positive to negative is , no longer corresponds to the position of the detection electrode 20' on the position detection plate 10 in the X direction or the Y direction. Therefore, the output data of the counter 55 that counts the above-mentioned time does not correspond to the position of the detection electrode 20' on the position detection plate 10. Board 10
There is a risk that the content indicating the correct position above will not be present.

At this time, the amplitude limiting amplifier circuit 100 to which the signal Scn is supplied outputs a signal as shown in FIG. 4 in which the large level peak portion of the signal Scn is amplitude limited.
S′cn is obtained. Then, this signal S'cn is supplied to the Schmitt trigger circuit 101, and the signal S'cn
The three amplitude-limited peaks of
As shown in Figure 4, the signal S'cn falls from high level to low level when it exceeds V's, and then rises from low level to high level when the signal S'cn crosses the ground level from positive to negative. signal
S'zn is obtained, and this signal S'zn is supplied to the clock terminal CK of the counter 102. In this way, when the noise component mixed into the signal voltage Vo from the detection electrode 20' is above a predetermined level, the noise level determination circuit section formed by the amplitude limiting amplifier circuit 100 and the Schmitt trigger circuit 101 It is determined that the level of the noise component is higher than the specified level, and the Schmitt trigger circuit 101 outputs a signal having more rise portions from low level to high level than when the level of the noise component is below the specified level. You will get it.

Then, as in the case described above, the counter 102
Then, three rises of the signal S'zn from low level to high level, which are indicated by arrows in FIG. 4, are counted, and the content of the count value, that is, data Dz indicating "3" is data “2” from the reference data generation circuit 105 is supplied to the comparison circuit 103 and during the period of the data discrimination pulse P from the monostable multivibrator 104.
is compared with reference data Dr representing At this time,
Since the data Dz from the counter 102 represents "3" and does not match the reference data Dr, the comparison output Sco of the data comparison circuit 103 is
As shown in FIG. 4, it does not take a high level.
Therefore, the AND output from the AND gate circuit 106 to which the comparison output Sco and the data discrimination pulse P are supplied, that is, the signal P' instructing to treat the output data from the counter 55 as valid cannot be obtained. . In this way, when the signal P' is not supplied to the data processing circuit 57, the output data from the counter 55 supplied to the data processing circuit 57 is not treated as valid, but is invalidated.
The output terminal of the data processing circuit 57 is in a state in which no position data is obtained.

As described above, if there is a risk that a noise component of a predetermined level or higher will be mixed into the signal voltage Vo from the detection electrode 20' and erroneous position detection will be performed, the position detection plate of the detection electrode 20' Since the output data of the counter 55 that counts the time corresponding to the position on the top 10 is invalidated and no position data is obtained, the position data obtained is always correct.

In addition, in the position detection device as in the above example, the strip conductors X ₁ , X ₂ , ...X _{o are} connected to the detection electrode 20'.
The signal voltage Vo obtained from the strip conductors Y ₁ , Y ₂ ,…
...If the level is different from the signal voltage Vo obtained from Y _n , the above Schmitt trigger circuit 10
1 in parallel, set a voltage threshold corresponding to a different signal voltage level for each, and switch the use according to each signal voltage Vo, the noise component in the signal voltage Vo can be reduced. can make appropriate judgments regarding the level of

Effects of the Invention As is clear from the above description, according to the position detection device according to the present invention, when voltage is sequentially supplied to the strip conductors of the position detection plate, the position detection device detects the voltage of each strip conductor. When a noise component of a predetermined level or higher is included in the detection output signal from the voltage detection means arranged on the board, the noise level determination circuit section determines that the level of the noise component is higher than the predetermined level, Since the position detection data under such conditions is automatically invalidated, the influence of external noise on the position detection operation is avoided, and only the position data that correctly indicates the position of the voltage detection means on the position detection board is always used. can be obtained.

Note that, as shown in the above embodiment, when the noise level determination circuit section is formed by the amplitude limiting amplifier circuit and the Schmitt trigger circuit, the level of the noise component in the detection output signal from the voltage detection means is set to a predetermined level. There is an advantage in that it is possible to accurately determine whether or not the above is true without causing any malfunction.

[Brief explanation of drawings]

FIG. 1 is a schematic configuration diagram showing an example of a position detection device according to the present invention, and FIGS. 2, 3, and 4 are
2A and 2B are waveform diagrams for explaining the operation of the example shown in FIG. 1. FIG. In the figure, 10 is a position detection plate, 20 is a voltage detection means, 20' is a detection electrode, 31 and 33 are shift registers, 32 ₁ to 32 _o and 34 ₁ to 34 _n are switches, 51 is a tuned amplifier circuit, 52 and 101 is a Schmitt trigger circuit, 55 and 102 are counters, 57 is a data processing circuit, 100 is an amplitude limiting amplifier circuit, 103 is a data comparison circuit, 104 is a monostable multivibrator, 105 is a reference data generation circuit, X ₁ to X _o and Y ₁ to _{Y n} are strip conductors.

Claims (1)

[Claims] 1. A position detection plate in which a plurality of strip conductors are arranged in parallel at predetermined intervals, and a predetermined voltage is applied to the plurality of strip conductors in the order in which they are arranged at predetermined time intervals. a voltage detection means that, when placed on the position detection plate, generates a detection output signal according to the position of the one of the plurality of strip conductors to which the predetermined voltage is supplied; a signal extraction means for extracting a signal component of a predetermined frequency from the detection output signal, and an output signal of the signal extraction means is set at a predetermined level from the time when the predetermined voltage is supplied to a reference one of the plurality of strip conductors; a counting circuit that counts the time until the voltage reaches or crosses a specific level, and determines whether the level of the noise component contained in the detection output signal from the voltage detection means is above a predetermined level. and a noise level determination circuit unit configured to detect the position of the plurality of strip conductors on the position detection plate of the voltage detection means in the arrangement direction based on the time data counted by the count circuit. In addition, when the noise level determination circuit determines that the level of the noise component contained in the detection output signal from the voltage detection means is higher than a predetermined level, the time data counted by the count circuit is invalidated. A position detection device that is said to be