JPH0469741A - Shift path error detecting system - Google Patents

Abstract

PURPOSE:To specify a faulty LSI by retrieving a boundary identification F/F, while executing the shift operation of each LSI for forming a shift path, and comparing the retrieved boundary identification F/F with its expected constant value. CONSTITUTION:Each LSI is provided with boundary identification flip-flop circuits (F/F) (x), (y), respectively, (y) is the F/F connected to shift-in, and (x) is the F/F positioned in the next thereof. In such a state, the F/F on a shift path is shifted by a shift operating instruction 215, and when the values of a pointer register 211 and a shift register 212 coincide with each other by a comparator 21, the values of (x) and (y) are set to a boundary identification register 111. This set value and an expected value register 112 are verified by a comparator 11, and in the case there is abnormality, the chained and propagated values of a stack faulty F/F of the pre-stage are set as x' and y', and noncoincidence is detected by one of them and reported to a firmware. In such a manner, the faulty LSI is specified to one piece.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a shift path error detection method for identifying an LSI chip with a stack failure in a data processing device having a shift path connecting a plurality of LSI chips.

[Prior art] Conventionally, when performing this type of initialization, the initialization signal was distributed to each of the individual units 1-8.
In order to reduce the number of r10 bins, initialization is performed by distributing initialization data to reds 1 through shift paths. In this case, the method to check whether there is a stack failure in the shift path is to use the firmware and shift path control unit to check the shift 1 to in data and shift out data.
I was nicking it and going.

[Problems to be solved by the invention]

In the conventional two-way shift 1 to bus error detection method, initialization immediately after power is turned on is performed using the shift path, and the flip-flop circuit (hereinafter referred to as F/F
) is discarded as shift-out data during initialization shift-in.

During the above operation, F/F is applied to any LSI on the shift path.
Assuming that there is a stack failure in F, the part that is normally initialized is from [/F immediately after shift-in to before the stack F/F, and the value of the F/F is unchanged even from shift 1. There is no change, and everything thereafter is filled with fixed values.

In addition, in the Zino 1-out operation of the LSI health check, in addition to the chain propagation after the stack F/F, the stack value error also spreads to the previous F/F, and the entire shift path is the same value. Shift 1 ~ In 1 ~ is performed, and the faulty LSI cannot be identified. This indicates that the resolution of the shift path error detection formula used during initialization is poor.

The purpose of the present invention is to discover 11 chain propagation (due to F/F stuck faults spanning 1-8I), resulting in faults 1. ,
- To provide a means to uniquely identify an SI.

(Means for Solving the Problems) The shift path ■ line detection method of the present invention is connected to the position where shift 1~in]~ is performed at the end of the shift path in each 1-8I depth, and in shift 1~ mode. If it is held at a fixed value, the F/F of 2 pins 1 to 1 will be held at a fixed value.
means for identifying the boundaries of the LSI chips; first storage means for storing information regarding all shift paths 1 to number including the F/l- of each ISI depth; LSI connected to the position to be shifted out first
Starting from the depth, the corresponding L
Bit reading means for reading out the shift pass bit number of the SI chip from the first storage means; Second storage means for holding and covering the read IsI chip position; and the shift pass bit read by the bit reading means. a shift-out means for performing a shift-out for a few minutes; a storage means for retaining the value of the last two bits of the bit string shifted out by the shift-out means; Comparing means for comparing the value and the value fixed in the 2-bit boundary identification F/F to detect whether or not they match; A method for identifying an IsI chip with a stuck failure is provided.

[Effect]

A circuit that searches for a boundary identification F/F while performing a shift operation of each LSI forming a shift path, and a circuit that compares the searched boundary identification F/F with its expected fixed value. : We discovered chain propagation due to stuck faults in F/Fs spanning IsI, and as a result, failed LSI
It is possible to specify one.

(Embodiment) Next, an embodiment of the shift path error detection method of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, in which a pointer memory 2. Pointer register 211° shift counter register 212. Comparator 21. Boundary identification register 1
It consists of 11 expected count registers 12 degrees and a comparator 11.

FIG. 2 is a schematic diagram of a shift path configuration showing an embodiment of the present invention, in which each LSI has a boundary identification F/FX, V, respectively, and y is an F/F connected to shift 1 to in. , X is the next F/F. The configuration is such that the shift-out and shift-in of each LSI are connected, and the plurality of LSIs are connected by one shift-1 bus.

Next, the operation of the present invention will be specifically explained.

When the power of the data processing device is turned on, the F/F values on the Schiffmill path shown in Figure 2, including the boundary identification F/F, are not constant due to the characteristics of individual elements and need to be initialized. . Therefore, the input condition of the boundary identification F/F5 is X≠
In this method, the boundary identification F/F 5 is set for all LSIs at the clock after the power is turned on. Next, the firmware stops the clock of the F/F on the shift path, and initializes the shift counter register 212 in FIG. 1 by applying reset 1 to signals 213.

Furthermore, the firmware calculates the LSI pointer value L S I (N) pointer [n ] is transferred to the pointer register 211, and the pointer register temporarily stores it.

Next, shift I~operation instruction 2151 by firmware
From this, the F/F of shift path "2" is shifted. Along with this, the shift counter register 212 is changed to the adder 214.
control the output of This operation is repeated, and when the values of the pointer register 211 and the shift register 212 match in the comparator 21, the output 3 sets the value 1 of the 2 bits x and y that will be shifted later as a boundary. Set x', y' () in the identification register 111. The set values x', yl and the expected value register 112 are verified by the comparator 11, and the result 4 is notified to the firmware. This is the first LSI (N
) error detection has been completed.

As a result of the verification, if the boundary identification F/F is normal, the process returns to the steps from shift 1 to initialization of the counter register 212 described above, and the process is repeated until the most recent LSI (A).

Also, if there is an abnormality, the chain-propagated values of the stack fault F/F in the previous stage are set as x' and y', and x
A mismatch is detected in either l or y' and reported to the firmware. The firmware uses pointer register 21
The address of the pointer memory at the time when the pointer value was transferred to 1 is checked in the table, and the corresponding 1-$1 is shown, and it is possible to specify and report one value.

〔Effect of the invention〕

As described above, the present invention provides a circuit that searches for a boundary identification F/F while performing a shift operation of each LSI, and a circuit that compares the value of the searched boundary identification F/F with its expected constant value. As a result, it is possible to discover chain propagation due to stuck faults in F/Fs that span LSIs, and as a result, it is possible to identify a single faulty LSI.

[Brief explanation of drawings]

Figure 1 shows the boundary identification F/F of the shift path error detection method.
FIG. 2 is a block diagram schematically showing a circuit for comparing and determining. FIG. 2 is a schematic diagram of the shift path configuration of the shift path error detection method according to the present invention. 1... Shift 1 - Out 1 - Data 11... Comparator 111... Boundary identification register 112... Expected value register 2... Pointer memory 21... Comparator 211... Pointer register 212 ...Shift counter register 213...Reset 1 to signal 214...Adder 215...Shift 1 operation instruction signal 3...Signal 4 indicating that the shift counter has pointed to the identification F/F. ...Signal 5 indicating the verification result of the identification F/F that has been shifted out...Boundary identification F/F

Claims (1)

[Claims] In a data processing device having a shift path in which a plurality of LSI chips are connected, each LSI chip is connected to a position to be shifted out at the end of the shift path, and has a fixed value when not in shift mode. means for identifying the boundaries of each LSI chip by a 2-bit flip-flop circuit held in the memory; a first storage means for storing the total number of shift pass bits including the flip-flop circuit of each LSI chip; Starting from the LSI chip connected to the first shifted out position of the shift path, calculate the number of shift pass bits of the LSI chip in the order of the connected shift passes.
a bit reading means for reading from the first storage means, a second storage means for holding the LSI chip position read by the bit reading means, and a number of shift pass bits read by the bit reading means. , a shift-out means for performing a shift-out, a storage means for holding the value of the last two bits of the bit string shifted out by the shift-out means, a value held in the storage means, and a boundary identification flip-flop for the two bits. A comparison means detects a discrepancy by comparing a fixed value with a second storage means, and a comparison means compares the result of the comparison means with a second storage means. If they match, it is normal; if they do not match, it is a stack failure. A shifted path error detection method having an error detection means that can identify an LSI chip.