JPH0469752B2 - - Google Patents

Info

Publication number
JPH0469752B2
JPH0469752B2 JP60076669A JP7666985A JPH0469752B2 JP H0469752 B2 JPH0469752 B2 JP H0469752B2 JP 60076669 A JP60076669 A JP 60076669A JP 7666985 A JP7666985 A JP 7666985A JP H0469752 B2 JPH0469752 B2 JP H0469752B2
Authority
JP
Japan
Prior art keywords
printed wiring
circuits
block
wiring board
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP60076669A
Other languages
Japanese (ja)
Other versions
JPS61235765A (en
Inventor
Yoshihisa Karashima
Takao Takahashi
Hisatomo Ooki
Hiroshi Hatori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Denshi Kiki Co Ltd
Lincstech Circuit Co Ltd
Original Assignee
Hitachi AIC Inc
Nippon Denshi Kiki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi AIC Inc, Nippon Denshi Kiki Co Ltd filed Critical Hitachi AIC Inc
Priority to JP60076669A priority Critical patent/JPS61235765A/en
Publication of JPS61235765A publication Critical patent/JPS61235765A/en
Publication of JPH0469752B2 publication Critical patent/JPH0469752B2/ja
Granted legal-status Critical Current

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  • Testing Of Short-Circuits, Discontinuities, Leakage, Or Incorrect Line Connections (AREA)

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明はプリント配線板の検査方法に関し、特
に、回路の欠陥部を溶断して不良品を選別するプ
リント配線板の検査方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a printed wiring board inspection method, and more particularly to a printed wiring board inspection method in which defective parts of a circuit are fused to select defective products. .

(従来の技術) 絶縁基板に印刷回路を設けたプリント配線板
は、現在、種々の電気機器に組み込まれている
が、電気機器の小型化に伴い、小型で高密度のも
のが用いられるようになつてきた。
(Prior art) Printed wiring boards, which have printed circuits on insulating substrates, are currently incorporated into various electrical devices, but as electrical devices become smaller, smaller, higher-density boards are being used. I'm getting old.

プリント配線板は、小型で高密度にするために
は、ライン幅の狭い構造となり、ラインに切り欠
け等の損傷部があると、持ち運びの際あるいは使
用時等に容易に断線し易い欠点があつた。
Printed wiring boards have a structure with narrow lines in order to be compact and high-density, and if the lines have damaged parts such as notches, they can easily break when being carried or used. Ta.

そのため、通常は製造工程の段階において、拡
大鏡を用いて目視検査等を行い、断線不良の不良
品をチエツクし選別している。
Therefore, visual inspection using a magnifying glass is usually performed during the manufacturing process to check and sort out defective products with broken wires.

(発明が解決しようとする問題点) しかしながら、この方法では、検査に要する時
間が長くなり量産が困難であり、また、目視であ
るため検査ミスを生じ易い欠点があつた。
(Problems to be Solved by the Invention) However, this method has disadvantages in that the time required for inspection is long, making mass production difficult, and since inspection is performed visually, inspection errors are likely to occur.

これ等の欠点を解決するために、絶縁基板に印
刷された個々の回路に通電流を流して欠陥部分を
溶断する方法が考えられる。が、単独の回路数の
多いプリント配線板の場合、過電流をその回路数
分だけ通電しなければならず、検査時間はあまり
短縮されず、自動化の長所を生かせない欠点があ
る。
In order to solve these drawbacks, a method can be considered in which a current is passed through each circuit printed on an insulating substrate to blow out the defective portion. However, in the case of a printed wiring board with a large number of individual circuits, the overcurrent must be applied for the number of circuits, so the inspection time is not reduced much and the advantages of automation cannot be utilized.

本発明の目的は、以上の欠点を改良し、断線不
良となり易い欠陥回路を有するプリント配線板を
短時間にかつ確実にチエツクでき、自動化の可能
なプリント配線板の検査方法を提供するものであ
る。
An object of the present invention is to improve the above-mentioned drawbacks, and to provide a method for inspecting printed wiring boards that can be automated and that can quickly and reliably check printed wiring boards that have defective circuits that are prone to disconnections. .

(問題点を解決するための手段) 本発明は、上記の目的を達成するために、プリ
ント配線板の回路に通電流を流し欠陥部を溶断す
るプリント配線板の検査方法において、任意個数
の回路を直列接続してブロツク化し、該ブロツク
に過電流を流して前記回路の欠陥部を溶断するこ
とを特徴とするプリント配線板の検査方法を提供
するものである。
(Means for Solving the Problems) In order to achieve the above object, the present invention provides a method for inspecting a printed wiring board in which a current is passed through the circuits of the printed wiring board to melt down defective parts. The present invention provides a method for inspecting a printed wiring board, characterized in that circuits are connected in series to form blocks, and defective portions of the circuits are blown out by passing an overcurrent through the blocks.

(作用) 本発明によれば、多数の独立した回路を幾つか
にまとめてブロツク化し、ブロツク内の回路を互
いに直列接続し、ブロツク毎に過電流を流して回
路の欠陥部を溶断しているために、過電流の通電
回数を減少でき、検査に要する時間を短縮でき
る。また、過電流により欠陥部を溶断するため、
検出ミスを防止でき自動化が可能となる。
(Function) According to the present invention, a large number of independent circuits are grouped into several blocks, the circuits in the blocks are connected in series with each other, and an overcurrent is applied to each block to blow out defective parts of the circuit. Therefore, the number of overcurrent energizations can be reduced, and the time required for inspection can be shortened. In addition, because the defective part is fused due to overcurrent,
Detection errors can be prevented and automation possible.

なお、通常、ブロツクは複数個となるが、回路
が少ない場合には全体を直列接続して1ブロツク
としてもよい。
Note that normally there are a plurality of blocks, but if the number of circuits is small, they may all be connected in series to form one block.

(実施例) 以下、本発明の実施例を図面に基づいて説明す
る。
(Example) Hereinafter, an example of the present invention will be described based on the drawings.

第2図において、1はプリント配線板であり、
互いに電気的に独立して多数の回路2が印刷され
ている。
In FIG. 2, 1 is a printed wiring board,
A large number of circuits 2 are printed electrically independent of each other.

また、第3図において、3はピンボードであ
り、回路2のランド4の位置に対応して接触ピン
5が貫設されている。そして両端の接触ピン5を
除いて、互いに隣り合う接触ピン5が接続コード
6により一つおきに電気的に接続されている。
Further, in FIG. 3, reference numeral 3 denotes a pin board, through which contact pins 5 are provided corresponding to the positions of the lands 4 of the circuit 2. Except for the contact pins 5 at both ends, every other contact pin 5 adjacent to each other is electrically connected by a connection cord 6.

第1図は、本発明方法により不良品を検出する
場合の回路図を示す。プリント配線板1の回路2
は、ピンボード3の接触ピン5を回路2のランド
4に接触することにより、複数個が直列接続さ
れ、ブロツク7−1〜7−5に区分けされてい
る。端部に設けられた接触ピン5は、一方は電源
8に接続され、他方は切替スイツチ9の一端に接
続されている。また、切替スイツチ9の他端は電
源8に接続されている。
FIG. 1 shows a circuit diagram when defective products are detected by the method of the present invention. Circuit 2 of printed wiring board 1
are connected in series by contacting the contact pins 5 of the pin board 3 with the lands 4 of the circuit 2, and are divided into blocks 7-1 to 7-5. One end of the contact pin 5 provided at the end is connected to a power source 8, and the other end is connected to one end of a changeover switch 9. Further, the other end of the changeover switch 9 is connected to a power source 8.

上記実施例に基づいて不良品を検出するには、
先ず、切替スイツチ9をブロツク7−1に接続し
て過電流を所定時間、ブロツク7−1に流す。こ
の時、ブロツク7−1内の回路2が一つでも溶断
すれば、不良品として処理する。ブロツク7−1
内の回路2が溶断されない場合には、切替スイツ
チ9をブロツク7−2に接続して同様な処理を行
う。以下、ブロツク7−5まで上記処理を繰り返
す。
To detect defective products based on the above example,
First, the changeover switch 9 is connected to the block 7-1, and an overcurrent is applied to the block 7-1 for a predetermined period of time. At this time, if even one circuit 2 in the block 7-1 is blown out, it is treated as a defective product. Block 7-1
If the circuit 2 in the block 7-2 is not fused, the changeover switch 9 is connected to the block 7-2 and the same process is performed. Thereafter, the above processing is repeated up to block 7-5.

すなわち、上記実施例によれば、互いに独立し
た回路2を複数個まとめて1ブロツクにし、接触
ピン5を用いてこのブロツク内の回路2を直列接
続し、一回の通電により1ブロツク内の回路2の
欠陥部を検出できる。そのために、欠陥部の検出
に要する時間は大幅に短縮され、検出ミスもなく
なる。
That is, according to the above embodiment, a plurality of mutually independent circuits 2 are combined into one block, and the circuits 2 in this block are connected in series using the contact pin 5, and the circuits in one block are connected in series by one energization. 2 defects can be detected. Therefore, the time required to detect defective parts is significantly shortened and detection errors are eliminated.

例えば、独立した回路を300個有するプリント
配線板を検査する場合、回路を15個づつ20ブロツ
クに分ける。15個の回路を直列接続すると、抵抗
はほぼ0.5〜1〔Ω〕となる。それ故、電圧15〔V〕
の定電圧定電流の電源を用いて、1ブロツク当た
り15〜30〔A〕の過電流を最大0.1秒間流す。切替
スイツチの切替えに要する時間は、半導体を用い
た場合には、通常、最大0.05秒間である。従つ
て、20ブロツクの検査に要する時間は(0.1+
0.05)×20=3秒である。これに対して、300個の
回路を個個に過電流を流して検査する場合には、
回路の通電時間だけで30秒かかる。
For example, when inspecting a printed wiring board with 300 independent circuits, divide the circuits into 20 blocks of 15 each. If 15 circuits are connected in series, the resistance will be approximately 0.5 to 1 [Ω]. Therefore, the voltage is 15 [V]
Using a constant voltage constant current power supply, an overcurrent of 15 to 30 [A] is applied to each block for a maximum of 0.1 seconds. The time required for switching the changeover switch is usually a maximum of 0.05 seconds when semiconductors are used. Therefore, the time required to inspect 20 blocks is (0.1 +
0.05)×20=3 seconds. On the other hand, when testing 300 circuits by applying overcurrent to each one,
It takes 30 seconds just to energize the circuit.

(発明の効果) 以上の通り、本発明によれば、回路を複数のブ
ロツクに区分けし、ブロツク毎に過電流を流して
欠陥部を溶断する方法により不良品の検査を行な
つているために、検査時間を大幅に短縮でき、か
つミスなく検査でき、自動化の可能なプリント配
線板の検査方法が得られる。
(Effects of the Invention) As described above, according to the present invention, defective products are inspected by dividing a circuit into a plurality of blocks and blowing out defective parts by passing an overcurrent in each block. , a printed wiring board inspection method that can significantly shorten inspection time, perform error-free inspection, and can be automated is obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はプリント配線板の平面図、第2図はピ
ンボードの側面断面図、第3図は本発明の実施例
の回路図を示す。 1……プリント配線板、2……回路、7−1〜
7−n……ブロツク、8……電源。
FIG. 1 is a plan view of a printed wiring board, FIG. 2 is a side sectional view of a pin board, and FIG. 3 is a circuit diagram of an embodiment of the present invention. 1...Printed wiring board, 2...Circuit, 7-1~
7-n...Block, 8...Power supply.

Claims (1)

【特許請求の範囲】[Claims] 1 プリント配線板の回路に過電流を流し欠陥部
を溶断するプリント配線板の検査方法において、
任意個数の回路を直列接続してブロツク化し、該
ブロツクに過電流を流して前記回路の欠陥部を溶
断することを特徴とするプリント配線板の検査方
法。
1. In a printed wiring board inspection method in which an overcurrent is applied to the printed wiring board circuit to melt down defective parts,
1. A method for inspecting a printed wiring board, which comprises connecting an arbitrary number of circuits in series to form a block, and passing an overcurrent through the block to blow out a defective portion of the circuit.
JP60076669A 1985-04-12 1985-04-12 Inspecting method for printed circuit board Granted JPS61235765A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP60076669A JPS61235765A (en) 1985-04-12 1985-04-12 Inspecting method for printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60076669A JPS61235765A (en) 1985-04-12 1985-04-12 Inspecting method for printed circuit board

Publications (2)

Publication Number Publication Date
JPS61235765A JPS61235765A (en) 1986-10-21
JPH0469752B2 true JPH0469752B2 (en) 1992-11-09

Family

ID=13611820

Family Applications (1)

Application Number Title Priority Date Filing Date
JP60076669A Granted JPS61235765A (en) 1985-04-12 1985-04-12 Inspecting method for printed circuit board

Country Status (1)

Country Link
JP (1) JPS61235765A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002357628A (en) * 2001-06-04 2002-12-13 Denki Kagaku Kogyo Kk Inspection method for metal-based circuit boards

Also Published As

Publication number Publication date
JPS61235765A (en) 1986-10-21

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