JPH047103B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device such as a GTO (gate turn-off) thyristor or a power transistor, and more particularly to a semiconductor device that can improve lead wire bonding workability.

In the case of GTO thyristors that turn on and off currents of several tens of amperes or more, the bonding wires inside the package are usually connected in parallel to allow large currents to flow.

In other words, the bonding wires connected to the cathode must be connected in parallel to allow a large main current to flow, and the bonding wires connected to the gate must be connected in parallel in order to have a particularly large cut-off withstand capacity. Multiple copies are required.

When such a GTO thyristor is incorporated into a so-called transistor-type package, all bonding wires cannot be directly connected to the external leads in a normal transistor-type package because the area of the bonding part of the external lead is small.

Figures 1 and 2 show the lead wiring structure inside the package of a conventional GTO thyristor. 1st
The figure is a plan view, and FIG. 2 is a cross-sectional view taken along the - line.

In these figures, 10 is a semiconductor chip (GTO thyristor), 11 is a support base on which the semiconductor chip is fixed, 12 and 13
16 and 17 are external leads planted on the support base 11 via insulating materials 12A and 13A such as glass, and 16 and 17 are insulating stands for intermediate electrodes fixed to the support base 11 adjacent to the semiconductor chip 10. It is.

Intermediate electrodes 18, 14 and 15 are fixed on the intermediate electrode insulating stands 16 and 17, respectively, one end of which is conductively connected to each of the external leads 12 and 13, and has a substantially rectangular bonding area. and 19 are bonding wires (aluminum) connecting the electrode region of the semiconductor chip 10 and each of the intermediate electrodes 14, 15.

As is clear from the figure, in the conventional GTO thyristor, its electrode regions are connected to external leads 12, 13 via intermediate electrodes 14, 15. Further, the electrode region of the semiconductor chip 10 and the intermediate electrode 1
4 and 15 are connected with bonding wires 18 and 19, etc., and the intermediate electrodes 14 and 15 are connected to the external lead 1.
2 and 13 are connected by welding.

In order to pass a current of several tens of amperes or more, a plurality of Al (aluminum) wires with a diameter of about 0.3 mm are usually used as bonding wires. Bonding wires 18, 19 and semiconductor chip electrode regions and intermediate electrodes are usually bonded by ultrasonic bonding.

The intermediate electrode insulating stands 16 and 17 are necessary for the purpose of fixing the intermediate electrodes 14 and 15 so that they do not move during this ultrasonic bonding work, and for the purpose of simply supporting the intermediate electrodes. The lead wiring structure inside the package described above has a larger number of parts than a normal transistor type package, and as will be described in detail below, the Al ultrasonic bonding area is arranged in two directions on the opposite side when viewed from the semiconductor chip 10. It has the disadvantage of poor workability because it separates into two parts.

In other words, in normal Al ultrasonic bonding,
Since the conditions for the first bond and the second bond are different, the first bond is performed separately on the chip side, and the second bond is performed on the electrode side. Further, the directions of the first bond and the second bond are determined to be a fixed direction by the bonding device.

Therefore, the lead wiring structure shown in Figs.
When performing Al ultrasonic bonding, one Al
If the bonding wire 18 is bonded in the direction shown in FIG. 1, then when bonding the Al bonding wire 19 on the opposite side,
In order to align the first bond and the second bond in the same direction, it is necessary to rotate the support base 11 by 180 degrees.

Rotating the support base 11 in this manner during the bonding operation greatly impairs work efficiency and reduces production efficiency, which is a major problem in manufacturing.

Similar problems occur with packages such as large capacity power transistors.

An object of the present invention is to provide a semiconductor device, such as a GTO thyristor or a power transistor, which has a simple structure and a packaging structure that makes it easy to maintain good workability during manufacturing.

In order to achieve the above object, in the present invention, the intermediate electrodes are arranged in the same direction as viewed from the semiconductor chip, that is, on one side of the semiconductor chip, and the intermediate electrode that is away from the semiconductor chip is placed on the side of the semiconductor chip. By attaching it at a higher position than the closer intermediate electrode, unnecessary contact between the bonding wire and the intermediate electrode is prevented. Furthermore, in the present invention, by interposing a spacer between the intermediate electrode and the support base during Al ultrasonic bonding, the insulating stand for the intermediate electrode can be omitted, and the lead wiring structure inside the package can be simplified. We aim to make the work easier.

An embodiment of the present invention is shown in FIGS. 3 and 4. FIG. FIG. 3 is a plan view, and FIG. 4 is a sectional view taken along the line -2. In these figures, the same reference numerals as in FIGS. 1 and 2 represent the same or equivalent parts.

As is clear from a comparison with the conventional example shown in FIGS. 1 and 2, in this embodiment, intermediate electrodes 14 and 15 having substantially rectangular bonding regions are arranged on the same side with respect to the semiconductor chip 10. In addition, these intermediate electrodes 14 and 15 are connected to external leads 1, respectively.
2 and 13 for support.

In this case, for example, the intermediate electrodes 14 and 15 are fixed to the external leads 12 and 13 by silver brazing,
and supported.

In this way, since the intermediate electrodes 14 and 15 are on the same side as viewed from the semiconductor chip 10, all the necessary Al ultrasonic bonding is done in the same direction for the first bond and the second bond. That is, since there is no need to rotate the support base 11 during the bonding work, the workability of the bonding work is significantly improved.

Further, in the present invention, since the bonding regions of the intermediate electrodes 14 and 15 are arranged parallel to each other, the bonding wires 18 and 1
9 are arranged parallel to each other and substantially perpendicular to each bonding region, bonding can be performed on both sides of the electrode region of the semiconductor chip connected to one intermediate electrode 14 by the bonding wire 18, as in this embodiment. The other intermediate electrode 1 is connected by a wire 19.
Even in a structure in which two electrode regions connected to the bonding wires 5 are arranged, short circuits between the bonding wires can be prevented.

Furthermore, in such a configuration, as shown in FIG. 6, the two intermediate electrodes 14 and 15 are fixed to the corresponding external leads 12 and 13 at approximately the same height and approximately in parallel. If so, there is a risk that the bonding wire 18 may come into contact with the intermediate electrode 15 or the bonding wires 18 and 19 may come into contact with each other.

Therefore, in this embodiment, two intermediate electrodes 14,
15 to the external leads 12 and 13, the intermediate electrode 1 that is separated from the semiconductor chip 10
4 is attached at a position closer to the semiconductor chip 10 and higher than the other intermediate electrodes 15.

In this way, by providing a difference in the mounting heights of the two intermediate electrodes 14 and 15, the distance between the bonding wire 18 and the intermediate electrode 15 becomes longer.
Therefore, the risk of their mutual contact is reduced and
Improves work efficiency. Also, bonding wire 1
The possibility of contact between 8 and 19 is also reduced.

Note that during ultrasonic bonding work, it is recommended to insert and arrange spacers 54, preferably made of metal, between each of the intermediate electrodes 14, 15 and the support base 11, as shown in FIG. good.

This prevents the intermediate electrodes 14 and 15 from being bent or deformed downward due to the load during bonding, and good bonding is achieved.

Use of such a spacer eliminates the need for intermediate electrode insulating stands (16, 17 in FIG. 1), reduces the number of parts, and simplifies the packaging structure.

As described above, the present invention provides a GTO thyristor package structure that is simple in structure and has excellent workability. In addition, although the case where the present invention is applied to a GTO thyristor has been described above as an example, it is clear that exactly the same effect can be obtained when applied to a power transistor.

[Brief explanation of drawings]

Figure 1 is a plan view showing a conventional semiconductor device, Figure 2 is a plan view showing a conventional semiconductor device;
The figure is a sectional view taken along the - line, FIG. 3 is a plan view showing an embodiment of the present invention, FIG. 4 is a sectional view taken along the - line, and FIG. FIG. 6 is a cross-sectional view for explaining the effects of the present invention. 10...Semiconductor chip, 11...Support base,
12, 13...External lead, 12A, 13A...
Insulating material, 14, 15... Intermediate electrode, 16, 17...
... Insulation stand for intermediate electrode, 18, 19 ... Bonding wire, 54 ... Spacer.

Claims (1)

[Scope of Claims] 1. A support base on which a semiconductor chip is fixedly mounted; at least two external leads electrically insulated from the support base and planted on the support base; an intermediate electrode having a rectangular bonding area and fixedly supported on each of the external leads so that the bonding areas are arranged parallel to each other on the same side as viewed from the semiconductor chip; and an electrode of the semiconductor chip. and a plurality of bonding wires ultrasonically bonded so as to electrically connect the bonding area of the intermediate electrode and the bonding area of the intermediate electrode, and the distance between the intermediate electrode farther from the semiconductor chip and the supporting base is the same as that of the supporting base. A semiconductor device characterized in that the distance is greater than the distance between an intermediate electrode and a support base. 2. The semiconductor device according to claim 1, wherein each intermediate electrode is supported apart from the support base.