JPH0471279B2 - - Google Patents

Info

Publication number
JPH0471279B2
JPH0471279B2 JP58064104A JP6410483A JPH0471279B2 JP H0471279 B2 JPH0471279 B2 JP H0471279B2 JP 58064104 A JP58064104 A JP 58064104A JP 6410483 A JP6410483 A JP 6410483A JP H0471279 B2 JPH0471279 B2 JP H0471279B2
Authority
JP
Japan
Prior art keywords
circuit
output
unit
load
microcomputer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58064104A
Other languages
English (en)
Japanese (ja)
Other versions
JPS59188959A (ja
Inventor
Hideo Maejima
Ikuro Masuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58064104A priority Critical patent/JPS59188959A/ja
Publication of JPS59188959A publication Critical patent/JPS59188959A/ja
Publication of JPH0471279B2 publication Critical patent/JPH0471279B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers

Landscapes

  • Design And Manufacture Of Integrated Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Microcomputers (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP58064104A 1983-04-11 1983-04-11 半導体集積回路装置及びマイクロコンピュータ Granted JPS59188959A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58064104A JPS59188959A (ja) 1983-04-11 1983-04-11 半導体集積回路装置及びマイクロコンピュータ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58064104A JPS59188959A (ja) 1983-04-11 1983-04-11 半導体集積回路装置及びマイクロコンピュータ

Publications (2)

Publication Number Publication Date
JPS59188959A JPS59188959A (ja) 1984-10-26
JPH0471279B2 true JPH0471279B2 (2) 1992-11-13

Family

ID=13248433

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58064104A Granted JPS59188959A (ja) 1983-04-11 1983-04-11 半導体集積回路装置及びマイクロコンピュータ

Country Status (1)

Country Link
JP (1) JPS59188959A (2)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3672030D1 (de) * 1985-01-30 1990-07-19 Toshiba Kawasaki Kk Halbleitervorrichtung und methode zu deren herstellung.
JPS62245656A (ja) * 1986-04-18 1987-10-26 Oki Electric Ind Co Ltd 信号処理用lsi回路

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5698783A (en) * 1980-01-09 1981-08-08 Nippon Telegr & Teleph Corp <Ntt> Semiconductor memory device
JPS59104256U (ja) * 1982-12-29 1984-07-13 松下電器産業株式会社 マイクロコンピユ−タの入出力拡張装置

Also Published As

Publication number Publication date
JPS59188959A (ja) 1984-10-26

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