JPH0471955A - Electronic control device for motorcycle - Google Patents

Abstract

PURPOSE:To eliminate a conventional separate memory erase means and simplify the constitution of an electronic control device by erasing a failure recording from a failure code memory through the predetermined operation of a component operation element inherently provided for a motorcycle. CONSTITUTION:An anti-skid electronic control device 5 is inputted with output signals from front and rear wheel brake switches 10 and 11, and a starter switch 12, in addition to the detected signals of front and rear wheel speed sensors 6 and 7, and other sensors 8, and control front and rear wheel brake actuators 1, 2 and 3, thereby adjusting a braking force. If any of components fails, the type of the failure is saved in a failure code memory 23. In this case, when a memory erase signal is inputted to a control circuit 14, a failure record is erased from the failure code memory 23, and a memory erase signal therefor is generated, for example, by intermittently turning on the starter switch 12 four to eight times repeatedly within three to four seconds.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to an electronic control device that stores failures that have occurred in components of a motorcycle through electronic control, and can also erase this memory.

(Prior Art) Motorcycles are equipped with various electronic control devices. For example, the control device for anti-skid is
Usually, it is equipped with a rotation sensor that detects the rotational speed of the wheel and an electronic control circuit that inputs the detection signal of this rotation sensor, and this control circuit outputs a signal based on the detection signal to the actuator to adjust the braking force. It looks like this.

Further, in the event that a failure occurs in the rotation sensor, etc., a failure code memory is provided to store the type of failure, and a memory erasing means is provided for erasing the record of the failure from the failure code memory. ing.

(Problems to be Solved by the Invention) Incidentally, since the above-mentioned control device is constituted by a large number of electronic components, it is required to make it as simple as possible.

(Object of the Invention) The present invention has been made in view of the above-mentioned circumstances, and an object of the present invention is to provide an electronic control device for a motorcycle with a simple configuration.

(Structure of the Invention) A feature of the present invention for achieving the above object is that an electronic control circuit for electronically controlling the component parts of a motorcycle is provided, and if any of the above component parts or the control circuit breaks down. When a fault occurs, a fault code memory is provided which stores the type of fault by inputting a signal based on this fault, and when a memory erasing signal is input to the control circuit, the record of the fault is erased from the fault code memory. In an electronic control device for a motorcycle designed to

First, the memory erase signal is generated by a predetermined operation of the starter operator.

Second, the memory erasing signal is generated by predetermined operation of at least two of the front wheel brake, rear wheel brake, and starter.

(for production) The effects of the above configuration are as follows.

Operators of parts installed on motorcycles lO, 11,
By performing a predetermined operation on 12, the record of the failure is erased from the failure code memory 23.

Therefore, - there is no need for a separate memory erasing means, which was conventionally provided.

In the above case, if the predetermined operations on the controls 10, 11, and 12 are unique and cannot normally be performed while driving, the operations on the controls may cause unintentional storage in the fault code memory 23. This prevents the data from being permanently deleted.

(Example) Embodiments of the present invention will be described below with reference to the drawings.

A motorcycle has a front wheel and a rear wheel on its body, and the rear wheel is driven by an engine so that it can run. Further, a front wheel brake and a rear wheel brake are provided, and the front wheel brake is a hydraulic front wheel brake actuator shown in FIG. 2 that generates a braking force by operating the handle lever.
This braking force is used to brake the front wheels. On the other hand, the rear wheel brake is provided with a hydraulic rear wheel brake actuator 2 shown in FIG. 2 that generates a braking force when the brake pedal is depressed, and the rear wheels are braked by this braking force.

Further, other actuators 3 are provided in the motorcycle.

By the way, when the wheels of a motorcycle are locked during sudden braking, a phenomenon occurs in which the vehicle body easily skids.

Therefore, a so-called anti-skid electronic control device 5 is provided, which controls the braking force to allow the wheels to rotate to a certain extent and prevent the above phenomenon from occurring. It is composed of

That is, a heavy wheel rotation sensor 6 that detects the rotation speed of the front wheels;
A rear wheel rotation sensor 7 that detects the rotational speed of the rear wheels and other sensors 8 are provided. Also, when the front wheel brake handle lever is operated, a front wheel brake switch 1 is an operator that outputs a signal in conjunction with this operation.
0. A rear wheel brake switch 11 which is an operator that outputs a signal in conjunction with the operation of the brake pedal of the rear wheel brake, and a starter switch 12 which is an operator of the starter that is turned on when starting the engine. is provided.

In addition, each of the above sensors 6.7.8 and switches 10.11
．． A control circuit 14 is provided which inputs each signal from 12 and outputs a signal to each actuator 1, 2, and 3 based on the signal to adjust the braking force.

The control circuit 14 includes a sensor system input interface circuit I5 that inputs detection signals from each of the sensors 6.7.8, and ON/OF signals from each switch 10, 11.12.
A switch system input interface circuit 16 is provided to input the F signal, and a central control circuit 18 is provided to input the output signals of these circuits 15 and 16 and output the signals to the actuator drive circuit 17. The driving states of the actuators 1, 2, 3, etc. are displayed on the indicator 20 via the indicator circuit 19 in response to signals from the central control circuit 18. Additionally, 21 is a power supply circuit, and 22 is a ROM/RAM.

Furthermore, when a failure occurs in any one of the above-mentioned components, a failure code memory 23 is provided which inputs a signal based on the failure and stores the type of failure. That is, for example, when the front wheel rotation sensor 6 detects that the front wheel is rotating at a certain impossible speed, the type of failure indicating that the front wheel rotation sensor 6 is malfunctioning is stored in the failure code memory 23. . The details of the type of failure are displayed by the indicator 20, which allows the operator to understand what type of failure has occurred, which can be useful for subsequent repairs.

Furthermore, when a memory erasing signal is input to the control circuit 14, the record of the fault is erased from the fault code memory 23.

The memory erase signal is generated by a predetermined operation of the starter switch 12. This predetermined operation is, for example, repeatedly turning on the starter switch 12 intermittently 4 to 8 times within 3 to 4 seconds.

In addition, instead of the above-mentioned predetermined operation, first, the front wheel brake switch IO may be operated three times within 4 seconds, and then the rear wheel brake switch 11 may be operated three times in succession.

Second, for 4 seconds, the front wheel brake switch 10
The operation of the rear wheel brake switch 11 may be repeated three times alternately.

Furthermore, the starter switch 12 and the front wheel brake switch 1
0 combination above 1. Alternatively, the second operation may be performed.

In addition, the starter switch 12 and the rear brake switch 1
The first or second operation may be performed in one combination.

Note that the predetermined operations for the above-mentioned controls 10, 11, and 12 are unique and cannot normally be performed while driving, as described above. This prevents memories from being unintentionally erased.

That is, each operator can be used without any problem.

In FIG. 1, the figure shows a flowchart for erasing the record of a failure stored in the failure code memory 23, and (P-1) to (p-9) in the figure indicate each step.

When attempting to erase the data, first the power is turned on (P-1), and then it is determined whether or not it is in the test mode (P-2). In this case, the front wheel brake switch 10. Rear wheel brake switch 11. The above test can be carried out by operating the starter switch 12 according to a predetermined operation. Alternatively, the test mode may be set by grounding the terminal 24 of the switch input interface circuit 16.

If it is not the above test mode, normal control is performed (P-3).On the other hand, if it is determined that the test mode is in the above (P-2), the indicator 2
At 0, a fault code is displayed.

Next, in (P-5), other sensors 8, front wheel brake switch ]0. If the switch input by the rear wheel brake switch 11, that is, the above-described predetermined operation for these is not performed, the process returns to (P-4), but if this operation is performed, the pattern of the input signal is read ( P-6), and a comparison with a predetermined pattern is performed (P-7). If the two do not match in this comparison, the process returns to (P-4), but if they match, The record of the failure in the failure code memory 23 is erased (P-8), and normal control returns (P-3).

According to the above flowchart, the items stored in the fault code memory 23 are erased at once, but the following may be used to erase the memories one by one.

That is, in the above (P-8), for example, the oldest ones are deleted one by one, and (P-4) to (P-8) are repeated until they are all deleted in (p-9). Then, when everything is erased, the process returns to (P-3).

Note that although the above is based on the illustrated example, the indicator 20 may be installed on a motorcycle, and when trying to see what is stored in the fault code memory 23,
It may be provided separately from the motorcycle to be connected to the control circuit 14.

(Effects of the Invention) According to the present invention, by performing a predetermined operation on an operator of a part originally provided in a motorcycle, a record of a failure is erased from a failure code memory. Therefore, there is no need for a separate memory erasing means that was conventionally provided, and the configuration of the electronic control device of the motorcycle can therefore be simplified.

By the way, if the operations on the above-mentioned controls are made unique and cannot normally be performed while the vehicle is running, it will be possible to prevent the memories in the fault code memory from being unintentionally erased due to the operations on the above-mentioned controls. Ru.

That is, the configuration of the electronic control device of the motorcycle can be simplified by using each operator without any other problems.

[Brief explanation of drawings]

The figures show an embodiment of the invention, with FIG. 1 being a flowchart and FIG. 2 being a block diagram of the electronic control unit. 5. Control device, lO.. Curved axis brake switch (front wheel brake operator), 11.. Rear wheel brake switch (rear wheel brake operator), 12. Starter switch (starter operator), 14. Control circuit, 23.・Fault code memory diagram 1

Claims (1)

[Claims] 1. An electronic control circuit for electronically controlling the component parts of a motorcycle is provided, and when a failure occurs in either the component part or the control circuit, a signal based on the failure is input. In the electronic control device for a motorcycle, the electronic control device for a motorcycle is provided with a fault code memory that stores the type of the fault, and when a memory erasing signal is input to the control circuit, the record of the fault is erased from the fault code memory. An electronic control device for a motorcycle in which a memory erasing signal is generated by a predetermined operation of a starter operator. 2. An electronic control circuit is provided to electronically control the components of a motorcycle, and when a failure occurs in either of the components or the control circuit, a signal based on this failure is input and the type of failure is stored. In an electronic control device for a motorcycle, a fault code memory is provided, and when a memory erasing signal is input to the control circuit, a record of a failure is erased from the fault code memory. , a rear wheel brake, and a starter by a predetermined operation of at least two operators of the starter.