JPH0472498U - - Google Patents
Info
- Publication number
- JPH0472498U JPH0472498U JP11512990U JP11512990U JPH0472498U JP H0472498 U JPH0472498 U JP H0472498U JP 11512990 U JP11512990 U JP 11512990U JP 11512990 U JP11512990 U JP 11512990U JP H0472498 U JPH0472498 U JP H0472498U
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- pulse signal
- timer
- dimming
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000007493 shaping process Methods 0.000 claims description 5
- 230000010355 oscillation Effects 0.000 claims description 3
- 239000004065 semiconductor Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Circuit Arrangements For Discharge Lamps (AREA)
- Discharge-Lamp Control Circuits And Pulse- Feed Circuits (AREA)
Description
【図面の簡単な説明】
第1図a,bはそれぞれ本考案の第1の実施例
のブロツク図及び集積回路部の回路図、第2図及
び第3図はそれぞれ本考案の第2及び第3の実施
例の集積回路部の回路図、第4図及び第5図は従
来のインバータ蛍光灯の第1の例のブロツク図及
びこの例の動作を説明するための駆動回路の動作
タイミング図、第6図は従来のインバータ蛍光灯
の第2の例のブロツク図である。
1……スイツチ回路、2……AC−DCコンバ
ータ、3A〜3E……波形整形回路、4,4A〜
4C……集積回路部、5……パワートランジスタ
、6……蛍光灯回路、7……保安灯、8,8A…
…タイマ回路、9,9A……駆動回路、41……
基本発振回路、42,42A……分周回路、43
,43A……選択回路、44……タイマ回路、4
5……選択回路、46……調光入力処理回路、4
7……出力回路、G1〜G6……AND回路、V
R1……半固定可変抵抗器。[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1a and 1b are a block diagram and a circuit diagram of an integrated circuit section of a first embodiment of the present invention, respectively, and FIGS. 2 and 3 are a circuit diagram of a second embodiment of the present invention, respectively. FIGS. 4 and 5 are a block diagram of a first example of a conventional inverter fluorescent lamp and an operation timing diagram of a drive circuit for explaining the operation of this example; FIGS. FIG. 6 is a block diagram of a second example of a conventional inverter fluorescent lamp. 1...Switch circuit, 2...AC-DC converter, 3A~3E...Waveform shaping circuit, 4,4A~
4C...Integrated circuit section, 5...Power transistor, 6...Fluorescent lamp circuit, 7...Security light, 8,8A...
...Timer circuit, 9,9A...Drive circuit, 41...
Basic oscillation circuit, 42, 42A... Frequency division circuit, 43
, 43A... selection circuit, 44... timer circuit, 4
5... Selection circuit, 46... Dimming input processing circuit, 4
7...Output circuit, G1 to G6...AND circuit, V
R1...Semi-fixed variable resistor.
Claims (1)
、オンのときこの交流商用電源を出力端へ伝達す
ると共に調光比率を設定するスイツチ回路と、こ
のスイツチ回路により設定される100%調光以
外の前記調光比率と対応して設けられ、前記スイ
ツチ回路からの交流商用電源の波形を整形して出
力する波形整形回路と、基本周波数のパルス信号
を出力する基本発振回路と、前記パルス信号を異
なる複数の分周比率で分周し複数の分周パルス信
号を出力する分周回路と、それぞれ前記複数の分
周パルス信号のうちの1つを選択し予熱パルス信
号、100%調光パルス信号、及び少なくとも1
つの調光比率別パルス信号として出力する第1の
選択回路と、前記スイツチ回路により前記交流商
用電源がオンになるとそれぞれ所定の期間順次能
動レベルとなる複数のタイマパルス信号を出力す
るタイマ回路と、それぞれ前記複数のタイマパル
ス信号のうちの少なくとも最初の期間のタイマパ
ルス信号を選択し予熱タイマパルス信号とし、こ
の予熱タイマ信号の選択したタイマパルス信号に
続く少なくとも1つを選択して100%調光タイ
マパルス信号として出力すると共に、これら予熱
タイマパルス信号及び100%調光タイマパルス
信号の選択した前記タイマパルス信号を選択して
調光比率別タイマパルス信号として出力する第2
の選択回路と、前記調光比率別タイマパルス信号
が非能動レベルのとき前記各波形整形回路の出力
信号をそれぞれ各出力端へ伝達する調光入力処理
回路と、前記予熱パルス信号、100%調光パル
ス信号、及び各調光比率別パルス信号と前記予熱
タイマパルス信号、100%調光タイマパルス信
号、及び前記調光入力処理回路の各出力パルス信
号とをそれぞれ対応して入力しこれら信号の論理
積処理を行う複数のAND回路と、これら各AN
D回路の出力信号を増幅する出力回路と、この出
力回路の出力信号によりオン、オフし蛍光灯を含
む蛍光灯回路を駆動する半導体スイツチ素子とを
有することを特徴とするインバータ蛍光灯。 2 基本発振回路、分周回路、タイマ回路、第1
及び第2の選択回路、調光入力処理回路、複数の
AND回路、並びに出力回路を1つの集積回路と
して形成した請求項1記載のインバータ蛍光灯。[Claims for Utility Model Registration] 1. A switch circuit that turns on and off the input AC commercial power, transmits the AC commercial power to the output end when it is on, and sets the dimming ratio, and this switch circuit A waveform shaping circuit that is provided corresponding to the dimming ratio other than the set 100% dimming ratio and that shapes and outputs the waveform of the AC commercial power source from the switch circuit, and a basic waveform shaping circuit that outputs a pulse signal of the fundamental frequency. an oscillation circuit, a frequency dividing circuit that divides the pulse signal at a plurality of different frequency division ratios and outputs a plurality of divided pulse signals, and each selects one of the plurality of frequency divided pulse signals and generates a preheating pulse. signal, a 100% dimming pulse signal, and at least one
a first selection circuit that outputs a pulse signal for each dimming ratio, and a timer circuit that outputs a plurality of timer pulse signals that sequentially become active level for a predetermined period when the AC commercial power source is turned on by the switch circuit; A timer pulse signal having at least the first period among the plurality of timer pulse signals is selected as a preheating timer pulse signal, and at least one of the preheating timer signals following the selected timer pulse signal is selected to perform 100% dimming. A second timer pulse signal is output as a timer pulse signal, and a second timer pulse signal selected from among the preheating timer pulse signal and the 100% dimming timer pulse signal is selected and output as a timer pulse signal for each dimming ratio.
a selection circuit, a dimming input processing circuit that transmits the output signal of each waveform shaping circuit to each output terminal when the dimming ratio-specific timer pulse signal is at an inactive level, and a dimming input processing circuit that transmits the output signal of each of the waveform shaping circuits to each output terminal, and A light pulse signal, a pulse signal for each dimming ratio, the preheating timer pulse signal, a 100% dimming timer pulse signal, and each output pulse signal of the dimming input processing circuit are input in correspondence with each other, and these signals are Multiple AND circuits that perform logical product processing, and each of these AND circuits
An inverter fluorescent lamp comprising: an output circuit that amplifies the output signal of the D circuit; and a semiconductor switch element that turns on and off according to the output signal of the output circuit and drives a fluorescent lamp circuit including the fluorescent lamp. 2 Basic oscillation circuit, frequency divider circuit, timer circuit, 1st
The inverter fluorescent lamp according to claim 1, wherein the second selection circuit, the dimming input processing circuit, the plurality of AND circuits, and the output circuit are formed as one integrated circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11512990U JPH0472498U (en) | 1990-10-31 | 1990-10-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP11512990U JPH0472498U (en) | 1990-10-31 | 1990-10-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0472498U true JPH0472498U (en) | 1992-06-25 |
Family
ID=31862871
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP11512990U Pending JPH0472498U (en) | 1990-10-31 | 1990-10-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0472498U (en) |
-
1990
- 1990-10-31 JP JP11512990U patent/JPH0472498U/ja active Pending
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