JPH0483652U - - Google Patents

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Publication number
JPH0483652U
JPH0483652U JP12646690U JP12646690U JPH0483652U JP H0483652 U JPH0483652 U JP H0483652U JP 12646690 U JP12646690 U JP 12646690U JP 12646690 U JP12646690 U JP 12646690U JP H0483652 U JPH0483652 U JP H0483652U
Authority
JP
Japan
Prior art keywords
resistor
light emitting
emitting diodes
control circuit
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP12646690U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP12646690U priority Critical patent/JPH0483652U/ja
Publication of JPH0483652U publication Critical patent/JPH0483652U/ja
Pending legal-status Critical Current

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  • Accessory Devices And Overall Control Thereof (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は実施例による多重制御回路、第2図は
シリアルデータの構成図、第3図はSWセンスデ
ータ出力期間時のドライバ入出力関係図、第4図
は実施例のタイムチヤート、第5図は従来例を示
すオペレーシヨンパネルの正面図、第6図は従来
例による多重制御回路である。 1……ドライバIC、2……第1の回路、3…
…第2の回路。
FIG. 1 is a multiplex control circuit according to the embodiment, FIG. 2 is a configuration diagram of serial data, FIG. 3 is a driver input/output relationship diagram during the SW sense data output period, FIG. 4 is a time chart of the embodiment, and FIG. The figure is a front view of a conventional operation panel, and FIG. 6 is a conventional multiplex control circuit. 1... Driver IC, 2... First circuit, 3...
...Second circuit.

Claims (1)

【実用新案登録請求の範囲】 1 複数の発光ダイオードの各一端をドライバの
各出力端に接続し、この発光ダイオードの各他端
にそれぞれ第1の抵抗の一端を接続し、この抵抗
の各他端をスイツチング素子を介して接地する第
1の回路と、 複数のスイツチの各一端を前記発光ダイオード
の各一端に接続するとともに、このスイツチの各
他端を第2の抵抗を介して接地する第2の回路と
を備えてなることを特徴とする多重制御回路。 2 第2の抵抗の抵抗値が第1の抵抗の抵抗値よ
り大である請求項1記載の多重制御回路。
[Claims for Utility Model Registration] 1. One end of each of a plurality of light emitting diodes is connected to each output end of a driver, one end of a first resistor is connected to each other end of the light emitting diodes, a first circuit that connects one end of each of the plurality of switches to one end of each of the light emitting diodes, and a second circuit that connects one end of each of the plurality of switches to one end of each of the light emitting diodes and grounds each other end of the switch through a second resistor; 1. A multiplex control circuit comprising: 2 circuits. 2. The multiplex control circuit according to claim 1, wherein the resistance value of the second resistor is greater than the resistance value of the first resistor.
JP12646690U 1990-11-30 1990-11-30 Pending JPH0483652U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP12646690U JPH0483652U (en) 1990-11-30 1990-11-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12646690U JPH0483652U (en) 1990-11-30 1990-11-30

Publications (1)

Publication Number Publication Date
JPH0483652U true JPH0483652U (en) 1992-07-21

Family

ID=31874022

Family Applications (1)

Application Number Title Priority Date Filing Date
JP12646690U Pending JPH0483652U (en) 1990-11-30 1990-11-30

Country Status (1)

Country Link
JP (1) JPH0483652U (en)

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