JPH0472725U - - Google Patents

Description

[Brief explanation of the drawing]

Fig. 1 is a block diagram of a phase-locked oscillator according to an embodiment of this invention, Fig. 2 is a circuit diagram of a correction voltage generation circuit, Fig. 3 is an explanatory diagram of the operation of the invention, and Fig. 4 is a conventional phase-locked oscillator. Figure 5 is an explanatory diagram of the operation of a conventional phase-locked oscillator, Figures 6 and 7 are
The figure is a block diagram showing another embodiment of the correction voltage generation circuit. In the figure, 1 is a reference signal input terminal, 2 is a signal output terminal, 3 is a local signal input terminal, 4 is a VCO, and 5 is a
is a mixer, 6 is a low-pass filter, 7 is a phase comparator, 8 is a loop filter, 9 is a limiting circuit, 10 is a coarse tuning signal input terminal, 11 is a D/A converter, 12 and 16 are adders, 13 is a frequency setting timing, 14 is a register, 15 is a correction voltage generation circuit, 15a, 15b are comparators with latch function, 15c, 15d are flip-flop circuits, 15e is a switch circuit, 15f is an up-down counter, 15g is a D/A converter, 15h is a command In the circuit, 15i is an operational amplifier, 15j is a compensator, and 15k is a resistor. Note that the same reference numerals in the figures indicate the same or equivalent parts.

Claims (1)

[Scope of utility model registration request] Using a phase comparator, loop filter, and VCO,
In a phase-locked oscillator that initializes a VCO with a coarse tuning signal, a voltage detection circuit is provided at the output of a loop filter, the coarse tuning signal is corrected according to this output voltage, and this corrected signal and the output voltage of the loop filter are A phase synchronized oscillator characterized in that the oscillation frequency of a VCO can be controlled by the added signal.