JPH0472973A - Data multiplex recorder and data reproducing device - Google Patents

Abstract

PURPOSE:To record the video signal onto a laser disk or the like similarly to the case with a conventional video signal by using a data and interleaving and multiplexing the result onto the video signal for a prescribed horizontal synchronization period in a vertical blanking period. CONSTITUTION:A data fed to a frame cut-off circuit 5 is cut off for a timing corresponding to each line of lines No.12-15 or No.275-278 based on a timing signal from a timing signal generating circuit 4 and fed to a multiplexer circuit 6. Then the data from the frame cut-off circuit 5 is multiplexed on the video signal in the multiplexer circuit 6, from which the multiplexed signal is outputted. The video signal multiplexed with the playing information is recorded on a laser disk similarly to the case with a conventional video signal.

Description

DETAILED DESCRIPTION OF THE INVENTION "Field of Industrial Application" The present invention relates to a data multiplexing recording device and a data reproducing device suitable for use in laser discs.

“Prior art” In recent years, pre-recorded performance information (MIDI signals, etc.)
Automatic musical instruments that perform automatically based on Here, various methods are possible for recording performance information, but today it is common to record performance information on a floppy disk or the like, convert it to MII)r faith, and output it.

By the way, if you could record the performance when recording the performance information and display this video on the display in synchronization with the automatic performance, you would be able to enjoy a highly immersive viewing experience, which would be extremely useful. suitable. In this way, it is theoretically possible to record the performance in synchronization with the automatic performance, but in order to make it popular as a consumer device, it is necessary to record the performance on existing video signal recording media such as laser discs. It is necessary to multiplex record information. That is, it is necessary to ensure upward compatibility with current laser discs and the like. Furthermore, when multiplexing digital signals onto a laser disk, read errors due to scratches, dust, etc. or bubbles in the resin portion of the laser disk are unavoidable, so it is also necessary to provide an error correction function.

Today, with technology for multiplexing digital signals onto video signals, for example, code signals such as picture numbers, chapter numbers, program status codes, etc. , technology for recording test signals, etc. is known (Pioneer Commissioning Supervision, Laser Disc Technical Book, ASCII Publishing Bureau). However, the digital signals that can be multiplexed using this technology are temporary information, and the amount of information is extremely small.

Therefore, it is impossible to record a large amount of continuous information such as performance information.

In addition, as a teletext broadcasting system for television broadcasting, a system that inserts character information within the vertical retrace period has been put into practical use (Yamada: Development of pre-correction system for coded transmission system teletext broadcasting, NHK Technical Research, Vol. Volume 37, No. 1). According to this technique, it is possible to superimpose a large amount of digital signals on a video signal, and it is also possible to correct errors using the BEST method.

The BEST method was developed as an error correction method for teletext broadcasting, and is a method in which the (273,191) difference set cyclic code (273 code bits, 191 information bits) is shortened (removed) by 41 information bits. Ta)
(272,190) This is a method of correcting bit errors using a shortened difference set cyclic code, and it can reliably correct errors in 8 bits out of 272 bits, and can correct 99.3% of errors in 10 bits. be.

``Problem to be solved by the invention'' By the way, the errors added during the transmission of television broadcast waves in the atmosphere are characterized by many random errors due to impulse noise such as automobile ignition plug noise, and the BEST method can solve this problem. It can almost certainly be corrected. However, for optical discs such as laser discs,
Because they become scratched with use, errors over a relatively long period of time (burst errors) occur. Therefore, recording performance information on a video disc together with a video signal using a method similar to the above-mentioned character multiplexing technique is extremely difficult to correct errors and is therefore impractical.

The present invention has been made in view of the above-mentioned circumstances, and provides a data multiplexing device that can multiplex performance information onto a video signal while maintaining upward compatibility with conventional video signals, and a data multiplexing device that can multiplex performance information onto a video signal and separate this performance information from the video signal. The object of the present invention is to provide a data demodulation device that can reproduce the data.

"Means for Solving the Problem" In order to solve the above problem, the configuration according to claim 1 includes an encoding means for encoding performance information according to a predetermined encoding rule, and an encoding means for encoding the performance information according to a predetermined encoding rule; interleaving means for interleaving performance information; data division means for dividing the interleaved performance information into data lengths that can be multiplexed in one horizontal synchronization period of a predetermined video signal;
data multiplexing means for multiplexing and outputting the divided shoulder-singing I within a vertical retrace period of the video signal, and recording the video signal output from the data multiplexing means on a predetermined recording medium. It is characterized by

Further, in the configuration according to claim 2, the video signal is reproduced from a predetermined recording medium and multiplexed with performance information, and the performance information is encoded according to a predetermined encoding rule and interleaved. A video signal characterized in that the video signal is performance information that is divided into predetermined data lengths that can be multiplexed within one horizontal synchronization period of the video signal and multiplexed within a vertical retrace period of the video signal. a separation means for separating the performance information from the video signal as an input signal; a deinterleaving means for converting the performance information separated by the separation means into performance information before the interleaving and outputting the performance information; a decoding means for decoding the performance information outputted from the deinterleaving means into the performance information before the encoding and outputting the same; and a data conversion means for converting the performance information outputted from the decoding means into serial data and outputting the same. It is characterized by comprising means.

"Operation" In the configuration according to claim 1, the performance information is encoded via the encoding means, and then interleaved is applied to the performance information via the interleaving means. Furthermore, the interleaved performance information is divided by data dividing means into predetermined data lengths that can be multiplexed in one horizontal interval of a predetermined video signal. Then, the performance information is multiplexed within the vertical retrace period of the video signal by the data multiplexing means.

Further, in the configuration according to claim 2, the derivation information is separated from the video signal by the separating means 1, and then this performance information is transmitted to the deinterleaving means before being interleaved. The information is converted into information and decoded into performance information before being encoded via a decoding means. and,
The decoded performance information is converted into serial data by the serial data conversion means and output.

"First Embodiment" First, in this embodiment, it is assumed that performance information is multiplexed within a vertical section-line period of a video signal. on the other hand,
As shown in FIG. 3, on the laser disk, various test signals and the like have already been recorded during the vertical retrace period. Therefore, new signals can be multiplexed within the vertical retrace period of the video signal used on a laser disc, as shown in the figure, AH/field (here, H is the horizontal scanning period) can be multiplexed in the odd field, and AH/field (here, H is the horizontal scanning period) in the even field. So 5■4/field (the reverse is also possible). In this example,
Unify multiple periods in even and odd fields,
The 4H/field is used for multiplexing performance information.

A-2 Burst Errors in Laser Discs Next, burst errors that should be considered in laser discs will be explained. Regarding this point, see the Journal of the Society of Telecommunications (VOL, 40. No, 6. pp501-507)
, compact disc (hereinafter also referred to as CD)
The incidence of burst errors has been reported when used in various conditions. According to this report, the 7(-st) error for commonly used discs is about 3 frames at most, but for discs that are frequently used,
It has been found that the burst error does not extend to 32 frames.

The case where this result is applied to a laser disc will be explained. First, the linear velocity of CD is 1.2~1.4C+++/5
ec). Also, l frame is (1/ < 75
X 98 ) ) (see). Therefore, the highest burst error of 3 frames on a normally used disk is: 1.2 + (75X 98) x 3 = 0.49
(n+m). Similarly, the maximum burst error of 32 frames for a heavily used disk corresponds to 5.2 (mm).

On the other hand, the linear velocity of the laser disc is 10.1 to 11.4.
, C, 111/8 mo C], so 2 on the disk
The length of -1 is 10 x (2/ 59.94) ÷ 525 = 6.3
5X10-'[+n) will be 0.6 (mm). Therefore, it can be seen that the frame error of a commonly used disk corresponds to about 0.7H, and the frame error of a frequently used disk corresponds to an error of about 8H. Here, a "frequently used disk" specifically refers to a disk that has been used for three years and has been attached and detached tens of thousands of times, and has been subjected to harsh use that would be unthinkable under normal circumstances. It is something that Therefore, according to the inventor's study, it is considered that having an error correction ability equivalent to about 4 hours of fishing is practically sufficient.

According to the teletext multiplexing system, all information bits and check bits are multiplexed onto IH, so 0.7H
Even if it is a burst error of 4H, it is impossible to correct a burst error of 4H. In other words, it is unrealistic to use the same multiplexing method as for teletext broadcasting in laser discs, and it is clear that some kind of burst error countermeasure is required.

A-3 data format In this example, BES, which is used in teletext
A data format similar to that of the T method will be adopted, and will be used in conjunction with the interleaving method described later. First, in teletext broadcasting, as shown in FIG. 4, a total of 296-bit signals (including a synchronization signal) are multiplexed on the IH during the vertical retrace period. Here, the time allocated to one bit is approximately 17 S [nse, c).

On the other hand, in a laser disk, 2-bit per bit is
004: r+5ec) or more (clock frequency, f5(
Multiplexing is difficult unless a certain frequency (MHz) or lower) is secured, and in the end only about 258 bits can be multiplexed onto IH. On the other hand, <
272, 190) Since the number of code bits of the code is 272 bits (hereinafter, these 272 bits are referred to as 1 packet), it is not possible to multiplex l packets to 11-1,
It can be seen that it is necessary to divide 1 packet into several H packets and multiplex them.

Next, the amount of data to be multiplexed into the l field will be explained. First, the standard video signal is 59 pixels per second.
．． On the other hand, the transmission speed of the MIDI signal is 31.251 kbps), so the performance information to be multiplexed on the l field is 31.25 [kbps].
t:1159.94 = 521J5 Cbit). Moreover, if the BEST method error correction is adopted, B
The information bit of the EST method is 1 packet (272 bits)
Since it is 190 bits inside, it is at least 521.35/190.2.14C packet]...
...It can be seen that it is necessary to secure equation (1) in one field.

It is difficult to multiplex one packet onto IH, as if it were a double packet. Therefore, since 4H can be multiplexed per field, 3 packets of data will be multiplexed there. As a result, the number of bits multiplexed to IH is 272 x 3 C packets]/41:H) = 20
This becomes an integer of 4 (bits) (not including the synchronization part), and if a 24-bit synchronization signal is added to this, it becomes 228 bits.

On the other hand, as mentioned above, information of about 258 bits can be recorded on the IH, and it is thus understood that performance information supplied as a MIDI signal can be multiplexed onto a laser disc.

In this case, the clock frequency f is 4.4 (MHz
), and there are 3 packets per field, so
The condition of formula (1) is also satisfied. The MIDI data that can be multiplexed in one field' (4H minutes) is 3 packets, that is, 190 x 3 [packets] -570 (bit: 1), while the MID data actually sent in one field is
Since the I data is 521.35 bits, it can be seen that there is sufficient margin.

Next, we will explain how much interleaving is necessary to deal with burst errors. First, the error correction ability of the BEST method is about 10 bits out of 272 bits. As mentioned above, it is sufficient to consider the maximum 4H continuous burst error, so (272L3C packets))X272/10 = 22
,195.2(bit)22.195Cbit)/20
4 (bit) -1CI8.8(H) -27,2
C field] 1.3.61: frame] Therefore, in order to completely correct the 4H burst error, interleaving of at least 109H (=28 fields) is required.

In conclusion, in this embodiment, the burst error is corrected by multiplexing a 228-bit signal (including a synchronization signal) into the IH and interleaving it at 1098 or more.

A-4 Interleaving Method A-2 and A-3 above have clarified the details of burst errors that should be taken into account when it comes to laser disks. Next, an interleaving method that can correct such burst errors will be explained.

First, as mentioned above, the vertical blanking period of one field in which MIDI signals can be multiplexed is 4H, but the data multiplexed in that 4H vertical blanking period is 3 packets (-10
2 bytes - 816 bits (not including synchronization part). Therefore, if the data is simply arranged in chronological order, it will be as shown in FIG. 5 (a). In the figure, W represents 1 byte,
The subscript indicates the temporal order of occurrence of each byte. and,
In this embodiment, each byte Wl-W+02 is
The items shall be rearranged as shown in b). Zunai Tsuchi,
The first byte of the first field in FIG. 3A is set to the original position. Then, it is delayed by 1 field from the second byte that skips 7 ↓ in the same figure (A), and is written to the second position of the second field (hereinafter, the same figure (A)
, (b), the difference in the positions where the same data is written is called the interleave depth). Similarly, the third byte of the first field is delayed by two fields and written third (0), and the final 102nd byte is written to the 102nd of the 102nd field.

According to the above method, even if the worst 4H burst error occurs, each byte W1 to W102 is
8 per 4H by being rearranged along the
Now that it is clear that a bit error is sufficient, the structure of the embodiment will now be described with reference to the drawings.

■Configuration of encoder First, the configuration of the encoder in this embodiment will be explained with reference to FIG.

In the figure, l is an encoding circuit that converts MIDI signals (2
72,1!10) Convert to code performance information. This encoding circuit 1 may be similar to that used in encoders for teletext broadcasting, and is configured as shown in FIG. 6, for example. In FIG. 6, Sx1 to sX, 8+ are flip-flops, and both 7 and 7 latch binary logic data supplied in synchronization with a predetermined clock signal, and are configured to output the previously latched binary logic data. has been done. Thereby, flip-flops SXo to SX*+ constitute a seed shift register. Also, gI~g
+7 is an Exclusive-OR (exclusive OR) circuit.

Next, in FIG. 1, 2 is an interleave circuit, and for the performance information of the (272, 190) code output from the encoding circuit 1, L is shown in FIG.
) is used to perform the interleaving described in . Inside thereof S RA +−+−S RA 1at−+.

J'jJBIRA1~RA,. , are each 8-bit registers. (272, 190) The nine M■D■ signals are converted into codes and are stored in registers 5RAI-+ to 5RAI. 1
-1 is sequentially latched. And each register 5RA1
When data is latched in all of -4 to SRA 1-of-+, the contents of these registers are shifted to the register located on the right side of the diagram, and the contents of registers SRA i-+ to SR
Ar. , -7 are cleared. That is, the contents of register SRA+-+ are shifted to register RA, and the contents of register 5RAz-1 are shifted to register 5RA2-2.
will be shifted to Further, the contents of register 5RA2-2 are shifted to register RAv. Therefore, the time at which the contents of register SRA+-+ is transferred to register RA, is the time when the contents of register SRA,-, are transferred to register RA.
It can be seen that l field is longer than the time transferred to t. Similarly, each register SRA. , -1 table each register RA
(n-1) registers are inserted between (
n-1) Transfer time is delayed by field. Therefore, register RA.

~RAI. The contents of 2 are registers S RA , -, -S
RAIQ'! It can be seen that this is equivalent to rearranging the self-fusion of -1 along the lines shown in Fig. 5 (b).

Next, reference numeral 3 denotes a synchronization separation circuit, into which a video signal is input, and separates and outputs a horizontal synchronization signal and a vertical synchronization signal. Further, 4 is a timing signal generation circuit, which is synchronized with each synchronization signal supplied from the synchronization separation circuit 3, and the timing at which performance information is multiplexed (line No., 12 to I
5 and 275-278 horizontal sweep period, see Figure 3)
Outputs a timing signal to.

Next, 5 is a frame cutting circuit which sequentially reads and outputs the contents of registers RA+ to RA+ot within a period in which a timing signal is output from the timing signal generating circuit 4. Therefore, registers RA, ~RA,. , the contents of
Line No. 12-15 or Line No. 275-
The signal is cut every horizontal sweep period corresponding to each of the 278 lines and outputted via the frame cutting circuit 5.

Next, 6 is a multiplexing circuit, which multiplexes the signal output from the frame cutting circuit 5 onto a video signal and outputs the signal. and,
The output video signal is recorded on a laser disk (not shown) in the same way as a normal video signal.

According to the above configuration, a MIDI signal is converted into (272, 190) code performance information via the encoding circuit 1, further rearranged via the interleaving circuit 2, and sequentially passed through the frame cutting circuit 5 and the multiplexing circuit 6. The video signal is multiplexed via the video signal. Therefore, it can be seen that the performance information is multiplexed onto the video signal while providing an extremely high correction ability for burst errors.

(2) Structure of decoder Next, the structure of the decoder in this embodiment will be explained with reference to FIG. In the drawings, parts corresponding to those in FIG. 1 are designated by the same reference numerals, and their explanations will be omitted.

In the figure, 7 is a data extraction circuit which, when supplied with a video signal in which performance information is multiplexed, extracts and outputs performance information from the video signal in synchronization with the timing signal from the timing signal generation circuit 4. .

Next, 8 is a deinterleave circuit, which returns the interleaved performance information (see Figure 5 (b)) to its original form (
(See figure (a)). In the inner part)
So S RB +-+ ~ S RB l-101! +S
RB t-+~S RB 2-16I, """,
S RB tow−+ and RB, ~RB+o2 are
Each is an 8-bit register. Data extraction circuit 7
The performance information output via the register S RB +
-+~SRB+02-1 are latched in sequence. Then, when the data is latched in all registers SRB, -1 to SRB 102-1, the contents of these registers are shifted to the register located on the right side of the diagram, and the contents of register SRB+-+-9RBI02--1 are latched. The contents are cleared. That is, the contents of register SRB+o2□ are register RB. , and is shifted to register 5RBIol-1
The contents of register SRB,. , -3. Also, register SRB. , -2 contents are register SR+
shifted to o+. Therefore, register 5RB1o
, -I are transferred to registers RB , , , the contents of register S RB 102-1 are transferred to register R
It can be seen that the time taken to be transferred to B, o2 is longer by l field. Similarly, each register SRB,. (102-n) registers are inserted between 1 and each register RBn, and the transfer time is delayed by (-1-02-n) fields. Here, through the data extraction circuit 7, the register S
RB...~5FtB. The performance information latched at 1-+ has been rearranged in the interleave circuit 2 (see FIG. 1) in accordance with FIG. 5(b). Therefore, it can be seen that the contents of the registers RB, -RBIot are equal to -performance information arranged along the lines shown in FIG. 5(a).

Next, the performance information outputted from the deinterleaving circuit 8 is supplied to the decoding circuit IO via the CPU (central processing unit) 9. The decoding circuit 10 (272, 19-
0) This is an M-set cyclic code decoding circuit, and is a commercially available IC circuit for teletext decoders (Oki Electric MSM
6254 etc.) may be used.

The performance information supplied via the CPU 9 is sent to the decoding circuit 1.
The data is converted to -0, decoded, error corrected, and written to the memory 11 again via the CPU 9. memory 11
The performance information written in is sequentially read out by the start bit/stop bit adding circuit 12. The start bit/stop bit adding circuit 12 is connected to the memories 11 to 8.
Performance information is read out in units of bits, and a start bit and a stop bit are added to each unit of read performance information. Then, the performance information is converted into a serial signal (ie, Mrl I signal) and output. The output MIDI ID is then supplied to an external automatic musical instrument (not shown) such as a piano player.

According to the above configuration, the performance information multiplexed on the video signal is extracted via the data extraction circuit 7 and rearranged via the deinterleave circuit 8. The rearranged performance information is decoded via the CPU 9 and the decoding circuit 10, and then MIDIID-converted via the CPU 9, memory 11, and start bit/stop bit adding circuit 12 in sequence. Therefore, the performance information multiplexed on the video signal is MIDIID-converted while burst errors are corrected.

Note that since the performance information is transmitted via the interleaving circuit 2 and the deinterleaving circuit 8, the transmission time is longer than that of a video signal or an audio signal. Also, M
When driving a piano player or the like based on IDIID-, the timing of sound generation is further delayed by about 0.5 seconds. Therefore, taking these times into consideration, it is preferable to record the performance information at an earlier timing than the video and audio signals. Furthermore, in the above embodiment, the performance information is
When converting to DIID-, the performance information is converted into a start bit.
Although the start bit and stop bit were added by supplying the signal to the stop pit toy 1 addition circuit I2, the start bit and stop bit may be added by the CPU 9.

"Second Embodiment" A. Premise Theory of the Embodiment In this embodiment, as in the first embodiment, the period for multiplexing the performance information on the video signal is 4H per l field, and the maximum burst error base is It will be about 4 hours.

A-1 Data Format Next, the data format used in this embodiment will be explained with reference to FIG. In this embodiment, the data recorded on the laser disk is treated as one unit (one block) of 2352 bytes. The configuration of this l block is as shown in FIG. 9, and data is transmitted sequentially starting from the left side of the diagram. The first 12 bytes of l block contain
In order to distinguish between blocks, the synchronization unit 101
is provided. Here, the values of the first and last bytes of the synchronization part are r#oOJ (# indicates a hexadecimal number) (the values of other bytes are set to r#F'F'J).

Next, 102 is a header section with a data length of 4 bytes, which displays the address information of the block to which it belongs (minutes and seconds from the start time, or how many blocks it is), as well as various operation modes. . Further, 103 is a user data section having a length of 2048 bytes, and performance information is recorded here.

Next, 104 is an EDC section, which is a 4-byte ED-C (
s error detection code) is recorded. Here, the EDC includes a synchronization section 101, a header section 102, and a user data section 10.
It is obtained by performing predetermined calculations on each of the contents of 3. Further, 105 is an 8-byte space section provided for future expansion, in which data of r#oOJ is recorded. Next, 106 is an ECC section, and each section 10
FCC (error correction code) for 2 to 105 is recorded.

Further, in the data format shown in FIG. 9, the portion excluding the sinus period 101 is scrambled. This is caused by the data r4. P
This prevents PJ from continuing, and thereby the synchronization unit 10
This is to facilitate the detection of 1.

By the way, scramble method, EDC method and ECC method
Various formats are possible, but in this example, we use the so-called mode 1 data format in CD-ROM (Takeuchi et al., which uses a high-performance error correction method).
D-ROM system.

Journal of the Television Society, VOL, 40. NO, 6, 5
01 to 507 pages). The outline will be explained below.

(2) Scrambling method First, the scrambling method in this embodiment is a scramble using data of a so-called M-sequence (maximum long period sequence).

(2) EDC system As the EDC system, a 32-bit CI (Error Detection Code) is used. Its generating polynomial is as follows.

G (X) −(x lQ+ x ”+ x ′+
1)×(X'6+X2+X+1) Here, the selection of the term G(x) may be set as appropriate depending on the reliability required of the system.

■ECC method As the ECC method, a double-encoded Reed-Solomon code is used, similar to the CIRC used in the audio CD system.

A-2 Method for multiplexing performance information Next, a method for multiplexing performance information having the data format shown in FIG. 9 during the vertical flyback period will be described.

First, the size of the user data section in FIG. 9 is 2.0481:BYTE)-16,384 [bits]. The transmission time of the MXDI signal corresponding to this is 16.384 [biL)/3.125CkBYTE/5
ec)=0.655[5ec). This 4t is 59.94X0.655=39 of the video signal of the laser disc.
．． Corresponds to 3[:field]. Therefore, one block is made to correspond to 38 fields of the video signal.

The entire data in one block is 2352 bytes. Then, adding an 8-byte parity pit to every 24 bytes in one block and adding a 2A-bit synchronization pattern to each IH, the total is 2,532 CBYTE) + 8 [BYTE: ] x 9g + 2
4 (bit:]X4X38 (field) -28,
736[:bit). and,! ■If 192 bits (24 bytes) are multiplexed per (i.e. f = 3.7 (MHz:)
), 28,736 to multiplex one block
(bit)/192·149.71:I+:1 is required. That is, since the data corresponding to one block fits within one stone 2H (-4 [H] x 38 (field)), it can be seen that multiplexing is possible.

In this way, the ■ block is divided into 38 fields of the video signal (
-0, 63[:5ec)), and 192 bits (-24 bytes) per IH. Note that the waveform of the video signal when performance information is multiplexed is
Shown in Figure 0.

B. Configuration of Example Next, the configuration of the second embodiment will be explained with reference to the drawings.

■Configuration of encoder First, the configuration of the encoder in this embodiment will be explained with reference to FIG. In the drawings, parts corresponding to those in FIGS. 1 to 6 are denoted by the same reference numerals, and their explanations will be omitted.

In the figure, 21 is a data conversion circuit, and when the power performance information to be multiplexed on the video signal is supplied as the MrDf signal,
This performance information is converted into the format shown in FIG. 9 and output. In other words, the performance information equivalent to 2048 bytes is the user data section, and this includes the synchronization section, header section, and ED section.
We will visit the C section, space and ECC section. Next, 22
is a scrambling circuit, which scrambles the portion of the data output from the data conversion circuit 21 excluding the synchronization portion. Next, 23 is a CrRc processing circuit,
An 8-byte parity pit is added to every 24 bytes in the l block, and a 24-bit synchronization pattern is added to every data length (192 bits) corresponding to 1), and output to the frame cutting circuit 5.

The data supplied to the frame cutting circuit 5 is determined based on the timing signal from the timing signal generation circuit 4 on lines No. 12 to 15 or lines No. 275 to 27.
The signal is cut off at each timing corresponding to each line of 8 and supplied to the multiplex circuit 6.

In the multiplexing circuit 6, the data and video signal supplied via the frame cutting circuit 5 are multiplexed and output. The video signal multiplexed with performance information is recorded on a laser disc in the same way as a normal video signal.

” According to the configuration described in item 1, the MIDI signal is transmitted to the data conversion circuit 2.
1, it is converted into a data format similar to that of a CD-ROM, so it can be seen that an extremely high correction ability for burst errors is provided.

(2) Structure of decoder Next, the structure of the decoder in this embodiment will be explained with reference to FIG. In the drawings, parts corresponding to those in FIGS. 1 to 7 are designated by the same reference numerals, and their explanations will be omitted.

In the figure, reference numeral 24 denotes a CTRC decoding circuit, to which performance information multiplexed with the video signal is supplied via the data extraction circuit 7. In the CIRC decoding circuit 24, the CD-RO
The performance information is decoded using the same method as M, and the performance information in the format shown in FIG. 9 is output. Here, C
Of the performance information output from the IRC decoding circuit 24, the portion excluding the synchronization section 101 (see FIG. 9) remains scrambled.

Next, 25 is a descrambling circuit which descrambles each part of the performance information outputted from the CIRC decoding circuit 24, except for the synchronization part 101, and outputs the result. Further, 26 is an Ecc-EDC processing circuit, and the synchronization unit 1011
The header section 102 and the user data section 103 are subjected to error correction and output. The output performance information is passed through the start bit/stop bit addition circuit 12 to the M
, I D 1 signal.

According to the above configuration, the performance information multiplexed with the video information is
The MIDr signal is extracted via the data extraction circuit 7, error-corrected by successively passing through the CIRC decoding circuit 24, descrambling circuit 25, and ECC-EDC processing circuit 26, and then sent to the MIDr signal via the start bit/stop bit adding circuit 12. is output as Therefore, the MIDI signal is reproduced while being provided with an extremely high correction ability for burst errors.

Note that in this embodiment, the performance information is for each component 21.
.about.27, the transmission time is longer than that for video signals or audio signals. Therefore, the first
As in the embodiment described above, it is preferable to record the performance information at an earlier timing than the video and audio signals.

"Effects of the Invention" As explained above, according to the structure of claim 1, after the encoded and interleaved performance information is divided by the data dividing means, a predetermined portion within the vertical blanking period of the video signal is Since the signals are multiplexed during the horizontal synchronization period of , they can be recorded on a laser disk or the like in the same way as conventional video signals, and upward compatibility can be ensured.

Further, in the configuration according to claim 2, after the performance information is separated via the separating means, it is supplied to the serial data converting means via the deinterleaving means and the decoding means, and is converted into serial data. 4, the performance information multiplexed with the video signal is reproduced.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an encoder in a first embodiment of the present invention, FIG. 2 is a block diagram of a decoder section in the same embodiment, FIG. 3 is a diagram showing performance information multiplexing periods in the same embodiment, and FIG. 4 and 5 are diagrams showing the data format in the same embodiment, FIG. 6 is a circuit diagram of the encoding circuit 1, FIG. 7 is a block diagram of the encoder in the second embodiment, and FIG. 8 is a diagram showing the same implementation. FIG. 9 is a block diagram of the decoder in the example, and FIG. 9 is a diagram showing the data format in the same example. FIG. 1O is a diagram showing the data format of performance information divided into one horizontal synchronization period in the same example. 1... Encoding circuit (encoding means), 2 - Interleaving circuit (interleaving means), 3 Sync separation circuit (data multiplexing means 1 separation means), 4... Timing signal generation means (data multiplexing means (separating means), 5... frame cutting circuit (data dividing means), 6... multiplexing circuit (data multiplexing means)
, 7... data extraction circuit (separation means), 8...
...Deinterleaving circuit (deinterleaving means)
, 9...CPU (deinterleaving means, decoding means)
, 10... decoding circuit (decoding means), 12...
... Start bit/stop bit addition circuit (data conversion means), 21... Data conversion circuit (encoding means), 22... Scramble circuit (encoding means, interleaving means), 23... ...C■RC circuit (interleaving means), 24... CIRC decoding circuit (deinterleaving means), 25... Descrambling circuit (deinterleaving means, decoding means), 26
...EC-C-EDC processing circuit (decoding means).

Claims (2)

[Claims] (1) Encoding means for encoding performance information according to a predetermined encoding rule; interleaving means for interleaving the encoded performance information; and a method for converting the interleaved performance information into a predetermined video signal. The data dividing means divides the data into multiplexable data lengths during the horizontal synchronization period, and the data multiplexing means multiplexes and outputs the divided performance information within the vertical retrace period of the video signal. 1. A data multiplexing recording device, characterized in that a video signal output from a multiplexing means is recorded on a predetermined recording medium. (2) A video signal that is reproduced from a predetermined recording medium and multiplexed with performance information, wherein the performance information is encoded according to a predetermined encoding rule and interleaved, and the video signal is interleaved for one horizontal synchronization period of the video signal. The input signal is a video signal characterized in that it is performance information divided into predetermined data lengths that can be multiplexed into a predetermined data length and multiplexed within a vertical retrace period of the video signal, and the performance information is extracted from the video signal. separating means for separating the performance information; deinterleaving means for converting the performance information separated by the separation means into performance information before the interleaving; and converting the performance information output from the deinterleaving means into the code. A data reproducing device comprising: a decoding means for decoding and outputting the performance information before being encoded; and a data conversion means for converting the performance information outputted from the decoding means into serial data and outputting the serial data. Device.