JPH0473720B2 - - Google Patents
Info
- Publication number
- JPH0473720B2 JPH0473720B2 JP61153237A JP15323786A JPH0473720B2 JP H0473720 B2 JPH0473720 B2 JP H0473720B2 JP 61153237 A JP61153237 A JP 61153237A JP 15323786 A JP15323786 A JP 15323786A JP H0473720 B2 JPH0473720 B2 JP H0473720B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor pattern
- paper battery
- card
- contact
- electronic circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000004020 conductor Substances 0.000 claims description 31
- 229910052751 metal Inorganic materials 0.000 claims description 13
- 239000002184 metal Substances 0.000 claims description 13
- 230000002093 peripheral effect Effects 0.000 claims description 4
- 239000000758 substrate Substances 0.000 claims 1
- 238000004806 packaging method and process Methods 0.000 description 4
- 239000007787 solid Substances 0.000 description 4
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 229910000833 kovar Inorganic materials 0.000 description 1
- 229910052744 lithium Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
- Y02E60/10—Energy storage using batteries
Landscapes
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Battery Mounting, Suspending (AREA)
- Credit Cards Or The Like (AREA)
- Calculators And Similar Devices (AREA)
Description
【発明の詳細な説明】
[発明の目的]
(産業上の利用分野)
本発明は、ICチツプのような各種の回路素子
が高密度に実装されたバツテリーバツクアツプタ
イプのカード型電子回路ユニツトに関する。[Detailed Description of the Invention] [Object of the Invention] (Industrial Application Field) The present invention relates to a battery backup type card-type electronic circuit unit in which various circuit elements such as IC chips are densely mounted. .
(従来の技術)
従来からカードサイズの薄型電子回路ユニツト
として、配線板上にフラツトパツケージタイプの
ICや裸のICチツプをそのまま実装したものを、
表裏両面から絶縁性カバーで覆い、さらにその両
面に薄い金属板を重ね合わせた構造のものが使用
されている。(Prior technology) Conventionally, flat package type electronic circuit units have been used as card-sized thin electronic circuit units on wiring boards.
IC or bare IC chip mounted as is,
The structure used is that the front and back sides are covered with insulating covers, and then thin metal plates are layered on both sides.
そして、ICチツプとしてCMOSのような消費
電力の低いメモリチツプを実装したカード型電子
回路ユニツトとしては、配線板に貫通孔を設け、
その中にコイン型の電池を実装してバツテリーバ
ツクアツプした構造のものが知られている。 Card-type electronic circuit units with low power consumption memory chips such as CMOS mounted as IC chips are designed by providing through-holes in the wiring board.
It is known to have a structure in which a coin-shaped battery is mounted in the battery backup.
(発明が解決しようとする問題点)
しかしながらこのようなバツテリーバツクアツ
プタイプのカード型電子回路ユニツトにおいて
は、厚さ方向の回路素子の実装可能な領域が少な
いばかりでなく、コイン型電池の厚さが約1.6mm
とかなり厚いため、全体の厚さが厚くなつてしま
うという欠点があつた。(Problems to be Solved by the Invention) However, in such a battery backup type card type electronic circuit unit, not only is there a small area in the thickness direction where circuit elements can be mounted, but also the thickness of the coin type battery is small. is about 1.6mm
Since it is quite thick, it has the disadvantage that the overall thickness becomes thicker.
また、配線板上で電池の実装部分にはICチツ
プをはじめとする回路素子を搭載することができ
ず、水平方向の実装可能な領域が少ないため、実
装密度が低いという問題があり、特に回路素子と
してメモリチツプを実装してなるメモリカードに
おいては、メモリ容量を増大させることが難しか
つた。 In addition, it is not possible to mount circuit elements such as IC chips on the part where the battery is mounted on the wiring board, and the horizontal mounting area is small, resulting in the problem of low packaging density. It has been difficult to increase the memory capacity of memory cards in which memory chips are mounted as elements.
本発明はこれらの問題を解決するためになされ
たもので、バツテリーバツクアツプされた薄くて
実装密度の高いカード型電子回路ユニツトを提供
することを目的とする。 The present invention has been made to solve these problems, and an object of the present invention is to provide a battery-backed thin card-type electronic circuit unit with high packaging density.
[発明の構成]
(問題点を解決するための手段)
すなわち本発明のカード型電子回路ユニツト
は、各種回路素子を埋設した板状の配線基体の片
面の周辺部にグランド電位の導体パターンを形成
し、このグランド電位の導体パターンの内側のほ
ぼ全域に電源電位の導体パターンを形成するとと
もに、この電源電位の導体パターン上に、ペーパ
ー電池をその正電極が接触するように載せ、さら
にこのペーパー電池上に、内面が前記ペーパー電
池の負電極と接触し、かつその周縁部が前記リン
グ状導体パターンと接触するようにして金属製キ
ヤツプを被覆し気密に封止して成ることを特徴と
している。[Structure of the Invention] (Means for Solving the Problems) That is, the card-type electronic circuit unit of the present invention forms a conductor pattern at ground potential on the periphery of one side of a plate-shaped wiring base in which various circuit elements are embedded. Then, a conductor pattern with a power supply potential is formed over almost the entire area inside this conductor pattern with a ground potential, and a paper battery is placed on the conductor pattern with a power supply potential so that its positive electrode is in contact with the conductor pattern, and the paper battery is A metal cap is covered and hermetically sealed so that the inner surface is in contact with the negative electrode of the paper battery and the peripheral edge is in contact with the ring-shaped conductor pattern.
(作用)
本発明のカード型電子回路ユニツトにおいて
は、ペーパー電池が配線基体と金属製キヤツプと
の間に介挿され、その正負両電極が配線基体上に
形成された電源電位の導体パターンとグランド電
位の導体パターンとにそれぞれ接続されて回路素
子がバツテリーバツクアツプされており、電池の
搭載により実装可能な水平方向の領域が減少する
ことがない。(Function) In the card-type electronic circuit unit of the present invention, a paper battery is inserted between a wiring base and a metal cap, and its positive and negative electrodes are connected to a power supply potential conductor pattern formed on the wiring base and ground. The circuit elements are battery-backed up by being connected to the potential conductor patterns, so that the horizontal area in which the batteries can be mounted does not decrease.
また、板状の配線基体内に各種の回路素子が埋
設されているので、厚さ方向の実装密度の高いカ
ード型電子回路ユニツトを得ることができる。 Furthermore, since various circuit elements are embedded within the plate-shaped wiring base, it is possible to obtain a card-type electronic circuit unit with high packaging density in the thickness direction.
さらに配線基体の上に金属製キヤツプが被覆さ
れているので、搭載された回路素子が外界の電気
的影響から保護されている。 Furthermore, since the wiring base is covered with a metal cap, the mounted circuit elements are protected from external electrical influences.
(実施例)
以下、本発明を図面に示す実施例について説明
する。(Example) Hereinafter, an example of the present invention shown in the drawings will be described.
第1図は本発明のカード型電子回路ユニツトの
一実施例を示す断面図、第2図および第3図はそ
れぞれその表側および裏側から見た斜視図、第4
図は実施例の配線基体を構成する配線板の拡大斜
視図である。 FIG. 1 is a cross-sectional view showing one embodiment of the card-type electronic circuit unit of the present invention, FIGS.
The figure is an enlarged perspective view of a wiring board constituting the wiring base of the embodiment.
これらの図において、符号1はセラミツクのよ
うな絶縁基材をベースとする配線板を示し、この
表面にはICチツプのような能動素子を搭載する
ための複数の段付き非貫通孔2が形成されてお
り、この段付き非貫通孔2の底部および段部に
は、それぞれダイボンデイングパツド3およびワ
イヤボンデイングパツド4が形成されている。ま
た裏面には、外部装置と接続するための入出力端
子の取付用導体パツド5が形成されている。 In these figures, reference numeral 1 indicates a wiring board based on an insulating base material such as ceramic, and a plurality of stepped non-through holes 2 are formed on the surface of the board for mounting active elements such as IC chips. A die bonding pad 3 and a wire bonding pad 4 are formed at the bottom and step of the stepped non-through hole 2, respectively. Furthermore, conductor pads 5 for attaching input/output terminals for connection to external devices are formed on the back surface.
さらにこのような配線板1の表面の周辺部に
は、リング状の導体パターン6が形成され、この
リング状導体パターン6の内側の段付き非貫通孔
2を除いた表面のほぼ全域には、ベタ導体パター
ン7が形成されている。そしてこれらリング状導
体パターン6およびベタ導体パターン7は、それ
ぞれグランド電位および電源電位に保持される。 Further, a ring-shaped conductor pattern 6 is formed around the surface of the wiring board 1, and almost the entire surface of the ring-shaped conductor pattern 6 except for the stepped non-through hole 2 inside the ring-shaped conductor pattern 6 is formed with a ring-shaped conductor pattern 6. A solid conductor pattern 7 is formed. The ring-shaped conductor pattern 6 and the solid conductor pattern 7 are held at a ground potential and a power supply potential, respectively.
このような配線板1の段付き非貫通孔2のダイ
ボンデイングパツド3上には、能動素子8が1個
ずつ導電性接着剤で接着されており、これらの能
動素子8はワイヤボンデイングパツド4とAu線
のようなボンデイングワイヤ9で接続されてい
る。 On the die bonding pads 3 in the stepped non-through holes 2 of the wiring board 1, active elements 8 are bonded one by one with a conductive adhesive, and these active elements 8 are bonded to the wire bonding pads. 4 and is connected by a bonding wire 9 such as an Au wire.
このような構造を有する配線基体10上には、
コバールやFe/Ni42アロイのような配線板1を
構成するセラミツクと熱膨張係数がほぼ等しい金
属からなるキヤツプ11がかぶせられている。こ
の金属製キヤツプ11は、ハンダ等の導電性溶着
剤12により周端部がリング状導体パターン6に
固着されその内部が気密に封止されている。 On the wiring base 10 having such a structure,
A cap 11 made of a metal such as Kovar or Fe/Ni42 alloy having a coefficient of thermal expansion approximately equal to that of the ceramic constituting the wiring board 1 is covered. This metal cap 11 has its peripheral end fixed to the ring-shaped conductor pattern 6 with a conductive adhesive 12 such as solder, and the inside thereof is hermetically sealed.
さらにこの金属製キヤツプ11と配線基体10
との間の薄い間隙には、リチウムペーパー電池の
ような非常に薄い(厚さが0.5mm程度)ペーパー
電池13が介挿されている。そして、このペーパ
ー電池13の+側電極は、配線板1上の電源電位
に保持されたベタ導体パターン7に接触し、これ
に電気的に接続されている。また、一側の電極は
金属製キヤツプ11の内周面に接触しており、こ
の金属製キヤツプ11を介してグランド電位のリ
ング状導体パターン6に接続されている。 Furthermore, this metal cap 11 and the wiring base 10
A very thin (about 0.5 mm thick) paper battery 13, such as a lithium paper battery, is inserted into the thin gap between the two. The + side electrode of the paper battery 13 contacts the solid conductor pattern 7 held at the power supply potential on the wiring board 1 and is electrically connected thereto. Further, the electrode on one side is in contact with the inner peripheral surface of a metal cap 11, and is connected to the ring-shaped conductor pattern 6 at ground potential via the metal cap 11.
このように構成された実施例のカード型電子回
路ユニツトにおいては、金属製キヤツプ11と配
線基体10との間に極めて薄いペーパー電池13
が介挿されているので全体の厚さが増大すること
なく、実装された能動素子8がバツテリーバツク
アツプされている。 In the card-type electronic circuit unit of the embodiment configured as described above, an extremely thin paper battery 13 is placed between the metal cap 11 and the wiring base 10.
Since the active element 8 is inserted, the mounted active element 8 can be battery backed up without increasing the overall thickness.
また、このようなペーパー電池13の搭載によ
り、能動素子8の実装可能な水平方向の領域が減
少することがなく、高密度に実装することができ
る。 Further, by mounting the paper battery 13 in this manner, the horizontal area in which the active element 8 can be mounted does not decrease, and it is possible to mount the active element 8 with high density.
さらに、能動素子8が配線板1内部に埋め込ま
れた状態で搭載されているので、配線板1の厚さ
方向の実装可能な領域も最大限に利用されてお
り、非常に実装密度が高いものとなる。 Furthermore, since the active element 8 is mounted embedded inside the wiring board 1, the mounting area in the thickness direction of the wiring board 1 is utilized to the maximum, resulting in extremely high packaging density. becomes.
なお、以上の実施例においては、外部装置と接
続するための入出力端子の取付用導体パツド5が
配線板1の裏面に形成された例について記載した
が、このような例に限定されず、これらの取付用
導体パツド5を金属製キヤツプ11より外側の配
線板1表面に設けることもできる。 In the above embodiment, an example was described in which the conductor pad 5 for attaching an input/output terminal for connection to an external device was formed on the back surface of the wiring board 1, but the present invention is not limited to such an example. These mounting conductor pads 5 can also be provided on the surface of the wiring board 1 outside the metal cap 11.
[発明の効果]
以上の説明から明らかなように、本発明のカー
ド型電子回路ユニツトにおいては、厚さを増大さ
せることなく電池を搭載することができ、ICチ
ツプをはじめとする回路素子を高密度に実装する
ことができる。[Effects of the Invention] As is clear from the above description, in the card-type electronic circuit unit of the present invention, a battery can be mounted without increasing the thickness, and circuit elements such as IC chips can be Can be implemented in high density.
第1図は本発明のカード型電子回路ユニツトの
一実施例を示す断面図、第2図はそれを表側から
見た斜視図、第3図は同じく裏側から見た斜視
図、第4図は実施例の配線基体を構成する配線板
の拡大斜視図である。
1……配線板、2……段付き非貫通孔、5……
入出力端子取付用導体パツド、6……リング状導
体パターン、7……ベタ導体パターン、8……能
動素子、11……金属製キヤツプ、13……ペー
パー電池。
FIG. 1 is a cross-sectional view showing one embodiment of the card-type electronic circuit unit of the present invention, FIG. 2 is a perspective view of the same as seen from the front side, FIG. 3 is a perspective view of the same as seen from the back side, and FIG. FIG. 2 is an enlarged perspective view of a wiring board constituting the wiring base of the example. 1... Wiring board, 2... Stepped non-through hole, 5...
Conductor pad for attaching input/output terminals, 6... Ring-shaped conductor pattern, 7... Solid conductor pattern, 8... Active element, 11... Metal cap, 13... Paper battery.
Claims (1)
面の周辺部にグランド電位の導体パターンを形成
し、このグランド電位の導体パターンの内側のほ
ぼ全域に電源電位の導体パターンを形成するとと
もに、この電源電位の導体パターン上に、ペーパ
ー電池をその正電極が接触するように載せ、さら
にこのペーパー電池上に、内面が前記ペーパー電
池の負電極と接触し、かつその周縁部が前記リン
グ状導体パターンと接触するようにして金属製キ
ヤツプを被覆し気密に封止して成ることを特徴と
するカード型電子回路ユニツト。 2 配線基体が、能動素子を搭載するための段付
き非貫通孔または受動素子を搭載するための段な
し非貫通孔を有し、これらの各非貫通孔内に能動
素子または受動素子が搭載されている特許請求の
範囲第1項記載のカード型電子回路ユニツト。[Claims] 1. A conductor pattern with a ground potential is formed on the periphery of one side of a plate-shaped wiring substrate in which various circuit elements are embedded, and a conductor pattern with a power supply potential is formed almost entirely inside the conductor pattern with a ground potential. A paper battery is placed on the conductor pattern at the power supply potential so that its positive electrode is in contact with the conductor pattern, and a paper battery is placed on the paper battery so that its inner surface is in contact with the negative electrode of the paper battery and its peripheral edge is in contact with the negative electrode of the paper battery. A card-type electronic circuit unit, characterized in that the ring-shaped conductor pattern is covered with a metal cap and hermetically sealed so as to be in contact with the ring-shaped conductor pattern. 2. The wiring base has a stepped non-through hole for mounting an active element or a stepless non-through hole for mounting a passive element, and the active element or passive element is mounted in each of these non-through holes. A card-type electronic circuit unit according to claim 1.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61153237A JPS637984A (en) | 1986-06-30 | 1986-06-30 | Card type electronic circuit unit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61153237A JPS637984A (en) | 1986-06-30 | 1986-06-30 | Card type electronic circuit unit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS637984A JPS637984A (en) | 1988-01-13 |
| JPH0473720B2 true JPH0473720B2 (en) | 1992-11-24 |
Family
ID=15558051
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61153237A Granted JPS637984A (en) | 1986-06-30 | 1986-06-30 | Card type electronic circuit unit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS637984A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0795620B2 (en) * | 1989-12-25 | 1995-10-11 | 株式会社村田製作所 | Circuit board and mounting structure using it |
-
1986
- 1986-06-30 JP JP61153237A patent/JPS637984A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS637984A (en) | 1988-01-13 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |