JPH0473836B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to an image display device using a plurality of line cathodes as electron beam sources.

Conventional technology Conventionally, cathode ray tubes have been mainly used as display elements for color television image display, but conventional cathode ray tubes have a very long depth compared to the screen size, making it difficult to receive thin television images. It was impossible to create a machine. In addition, EL display elements, plasma display devices, liquid crystal display elements, etc. have recently been developed as flat display elements.
All of them are insufficient in terms of performance such as brightness, contrast, and color display.

Therefore, a new display device was proposed in Japanese Patent Application Laid-Open No. 135590/1983 to achieve a flat display device using electron beams.

This method generates an electron beam for each section when the screen is vertically divided into multiple sections, and displays multiple lines by deflecting each electron beam vertically for each section. However, it displays the television image as a whole.

First, a basic configuration example of the image display element used here will be explained with reference to FIG.

This display element is arranged in order from the back to the front.
A back electrode 1, a line cathode 2 as a beam source, vertical focusing electrodes 3, 3', a vertical deflection electrode 4, a beam flow control electrode 5, a horizontal focusing electrode 6, a horizontal deflection electrode 7, a beam accelerating electrode 8 and a screen plate 9. They are housed within the evacuated interior of a flat glass bulb (not shown). A line cathode 2 serving as a beam source is stretched horizontally so as to generate an electron beam distributed linearly in the horizontal direction, and a plurality of line cathodes 2 (here, Only four (2A to 2D are shown) are provided. In this embodiment, it is assumed that 15 pieces are provided. Let's call them 2i~2yo. These wire cathodes 2 are constructed by coating the surface of a tungsten wire with a diameter of 10 to 20 μΦ with an oxide cathode material for thermionic emission. These line cathodes 2A to 2Y are heated so as to generate a thermionic electron beam by passing an electric current through them, and as will be described later, the electron beams are generated sequentially for a certain period of time starting from the line cathode 2I. controlled to emit. The back electrode 1 suppresses generation of electron beams from line cathodes 2 other than the line cathode 2 that is controlled to emit electron beams for a certain period of time, and directs the generated electron beams only in the forward direction. It has the effect of pushing out. The back electrode 1 may be formed by a coating of a conductive material applied to the inner surface of the rear wall of the glass bulb. Also, instead of these back electrode 1 and line cathode 2,
A planar electron beam emitting cathode may also be used.

The vertical focusing electrode 3 is a conductive plate 11 having a horizontally long slit 10 facing each of the line cathodes 2I to 2Y, and extracts the electron beam emitted from the line cathode 2 through the slit 10, and focus in a direction. An electron beam for one horizontal line (360 pixels) is extracted at the same time. In the figure, only one section in the horizontal direction is shown. The slit 10 may be provided with crosspieces at appropriate intervals in the middle, or may be substantially configured as a slit by a row of many through holes arranged horizontally at small intervals (nearly touching intervals). may have been done. The vertical focusing electrode 3' is also similar.

A plurality of vertical deflection electrodes 4 are arranged horizontally in the middle of each of the slits 10, and are each composed of conductors 13 and 13' provided on the upper and lower surfaces of an insulating substrate 12. has been done. And the opposing conductors 13, 13'
A vertical deflection voltage is applied between them to deflect the electron beam in the vertical direction. In this embodiment, the electron beam from one line cathode 2 is vertically deflected to positions corresponding to 16 lines by a pair of conductors 13, 13'. And, by 16 vertical deflection electrodes 4, 15
Fifteen conductor pairs corresponding to each of the book line cathodes 2 are constructed, and the electron beam is ultimately deflected to draw 240 horizontal lines on the screen 9.

Next, the control electrodes 5 are composed of conductive plates 15 each having a vertically long slit 14, and a plurality of control electrodes 15 are arranged in parallel in the horizontal direction at predetermined intervals. In this embodiment, 180 conductive plates 15a to 15n for control electrodes are provided (only nine are shown in the figure). Each of the control electrodes 5 separates and extracts the electron beam into two picture elements in the horizontal direction, and controls the amount of electron beam passing therethrough in accordance with a video signal for displaying each picture element. Therefore, the conductive plates 15a to 15n for the control electrode 5 are
With this arrangement, 360 pixels can be displayed per horizontal line. In addition, in order to display images in color, each picture element is displayed using phosphors of three colors, R, G, and B, and each control electrode 5 has two picture elements of R, G, and B. Each video signal is applied sequentially. In addition, 180 conductive plates 15a to 15n for control electrodes 5
180 sets of video signals for one line (two picture elements per set) are simultaneously applied to each of the lines, and one line of video is displayed at one time.

The horizontal focusing electrode 6 is composed of a conductive plate 17 having a plurality of vertically long slits 16 (180 slits 16) facing the slits 14 of the control electrode 5, and collects electrons for each picture element divided in the horizontal direction. Each beam is focused horizontally into a narrow electron beam.

The horizontal deflection electrode 7 is made up of a plurality of conductive plates 18, 18' arranged vertically on both sides of the slit 16, and each electrode 18, 18' has six levels of horizontal deflection. A voltage is applied to horizontally deflect the electron beam for each pixel, and on the screen 9 two sets of R,
The G and B phosphors are sequentially irradiated to emit light. In this embodiment, the deflection range is two picture elements wide for each electron beam.

The accelerating electrode 8 is composed of a plurality of conductive plates 19 provided horizontally at the same position as the vertical deflection electrode 4, and accelerates the electron beam so that it collides with the screen 9 with sufficient energy.

The screen 9 is constructed by coating the back surface of a glass plate 21 with a phosphor 20 that emits light when irradiated with an electron beam, and adding a metal back layer (not shown). The phosphor 20 is arranged for each slit 14 of the control electrode 5, that is, for each horizontally divided electron beam.
Two pairs of phosphors in each of the three colors R, G, and B are provided and are applied in stripes in the vertical direction. In FIG. 1, the broken lines drawn on the screen 9 indicate divisions in the vertical direction that are displayed corresponding to each of the plurality of line cathodes 2, and the two-dot chain lines correspond to each of the plurality of control electrodes 5. Indicates the horizontal division displayed. As shown in an enlarged view in FIG. 6, one section partitioned by these two has R, G, and B phosphors 20 for two pixels in the horizontal direction, and 16 lines in the vertical direction. It has a width of
For example, the size of one section is 1 in the horizontal direction.
mm, and the vertical direction is 10 mm.

Note that in FIG. 5, the length in the horizontal direction is greatly enlarged relative to the length in the vertical direction for clarity.

Furthermore, in this embodiment, only one pair of R, G, and B phosphors 20 for two picture elements are provided for one control electrode 5, that is, for one electron beam. A single picture element or three or more picture elements may be provided. In that case, R, G, and B video signals for one picture element or three or more picture elements are sequentially applied to the control electrode 5, and horizontal deflection is performed in synchronization with this. will be done.

Next, the basic configuration of a drive circuit for displaying television images on this display element will be explained with reference to FIG. First, a driving portion for irradiating the screen 9 with an electron beam to emit raster light will be described.

The power supply circuit 22 is a circuit for applying a predetermined bias voltage (operating voltage) to each electrode of the display element,
-V ₁ to the back electrode 1, and -V 1 to the vertical focusing electrodes 3 and 3'.
DC voltages of V ₃ , V ₃ ', V ₆ to the horizontal focusing electrode 6, V ₈ to the accelerating electrode 8, and V ₉ to the screen 9 are applied.

Next, a composite video signal of a television signal is applied to the input terminal 23, and a synchronization separation circuit 24 separates and extracts a vertical synchronization signal V and a horizontal synchronization signal H.

The vertical deflection drive circuit 40 includes a vertical deflection counter 25, a memory 27 for storing vertical deflection signals, and a digital-to-analog converter 39 (hereinafter referred to as a DA converter). As input pulses to the vertical deflection drive circuit 40, a vertical synchronizing signal V and a horizontal synchronizing signal H shown in FIG. 8 are used. The vertical deflection counter 25 (8 bits) receives the vertical synchronization signal V.
The horizontal synchronizing signal H is counted. This vertical deflection counter 25 counts the effective scanning period (here, a period of 240 hours) excluding the vertical retrace period of the vertical period,
This count output is supplied to an address in memory 27. Vertical deflection signal data (here, 10 bits) corresponding to each address is output from the memory 27, and is converted by the DA converter 39 into vertical deflection signals v and v' shown in FIG. In this circuit 240H
There is a memory address for storing the vertical deflection signal corresponding to each line of minutes, and by storing regular data in the memory every 16H minutes, it is possible to obtain a 16-step vertical deflection signal.

On the other hand, the line cathode drive circuit 26 receives the vertical synchronization signal V
and the output of the vertical deflection counter 25 to create line cathode drive pulses I to Y. FIG. 9a shows the relationship between the vertical synchronizing signal V, the horizontal synchronizing signal H, and the lower five bits of the vertical deflection counter 25. 9th
FIG. b shows a method of creating line cathode drive pulses I' to Y' every 16H using these signals. In Figure 9, LSB indicates the lowest bit, and (LSB+1) is
It means the bit one higher than the LSB.

The first line cathode drive pulse I' consists of the vertical synchronizing signal V and the output of the vertical deflection counter 25 (LSB+
4) can be created using an R-S flip-flop, etc., and the line cathode drive pulses LO' to YO' can be created using a shift register, and the line cathode drive pulses LO' to YO' are output from the vertical deflection counter 25 (LSB+3).
It can be obtained by using the inverted version of the clock as the clock. These drive pulses I'~Yo' are inverted and made low potential only during each pulse period, and converted into line cathode drive pulses I~Yo that are at a high potential of about 20 volts during other periods, and each line cathode 2 I~
Added to 2yo.

Each line cathode 2i to 2yo is heated by a current flowing through it during the high potential period of the drive pulses I to YO, and the heated state is maintained so that electrons can be emitted during the low potential period of the drive pulses I to YO. Ru. As a result, electrons are emitted from the 15 line cathodes 2i to 2yo only during the 16H period in which low-potential drive pulses are applied to each of them. During the period when a high potential is applied, the potential at the line cathode 2 is lower than the potential at the position of the line cathode 2 determined by the bias voltage applied to the back electrode 1 and the vertical focusing electrode 3. Since the applied high potential becomes positive, no electrons are emitted from the line cathodes 2I to 2Y. Thus, in the line cathode 2, electrons are sequentially emitted from the upper line cathode 2a toward the lower line cathode 2y every 16H period during the effective vertical scanning period.

The emitted electrons are pushed forward by the back electrode 1, pass through the opposing slits 10 of the vertical focusing electrode 3, and are focused in the vertical direction to form a flat electron beam.

Next, the relationship between the line cathode drive pulses y to y and the vertical deflection signals v and v' will be explained with reference to FIG. The vertical deflection signals v, v′ are each line cathode pulse i~
During the 16H period of Yo, it changes by 1H and changes to 16 steps. The vertical deflection signals v and v' both have a center voltage of _V4 , and are configured to change in opposite directions so that v increases sequentially and v' decreases sequentially. These vertical deflection signals v and v' are applied to the electrodes 13 and 13' of the vertical deflection electrode 4, respectively, and as a result, the electron beams generated from the respective line cathodes 2a to 2o are deflected in 16 steps in the vertical direction. and as mentioned earlier, 1 on screen 9.
One electron beam is deflected to draw a 16-line raster one line at a time, starting from the top.

As a result of the above, electron beams are emitted for a period of 16 hours from the top of the 15 line cathodes 2I to 2Y, and each electron beam is sequentially emitted for one line from top to bottom within 15 sections in the vertical direction. As a result, the electron beam is vertically deflected one line at a time on the screen 9 from the first line at the top end to the 240th line at the bottom end, thereby drawing a raster of 240 lines in total.

The electron beam thus vertically deflected is horizontally deflected by 180 degrees by the control electrode 5 and the horizontal focusing electrode 6.
It is divided into sections and taken out. Figure 5 shows one of these categories. The amount of electron beam passing through each section is controlled by a control electrode 5, and horizontally focused by a horizontal focusing electrode 6 into a single narrow electron beam, which is then controlled by horizontal deflection means described below. The light is then deflected in six steps in the horizontal direction and is sequentially irradiated onto each of the R, G, and B phosphors 20 corresponding to two picture elements on the screen 9. FIG. 6 shows the vertical and horizontal divisions. The phosphors facing each of 15a to 15n of the control electrode 5 are R, G, and B for two picture elements, but for convenience of explanation, one picture element is shown as R, G, and B.
Let R ₁ , G ₁ , B ₁ be R ₂ , G ₂ , B ₂ .

Next, the horizontal deflection drive circuit 41 is composed of a horizontal deflection counter (11 bits), a memory 29 storing horizontal deflection signals, and a DA converter 38. The input pulse to the horizontal deflection drive circuit 41 is synchronized with the vertical synchronizing signal V and the horizontal synchronizing signal H, as shown in FIG. 11, and uses a pulse 5H having a repetition frequency six times that of the horizontal synchronizing signal H.

The horizontal deflection counter 28 is reset by the vertical synchronizing signal V and counts the horizontal six times pulse 6H. This horizontal deflection counter 28 is
6 times during 1H, 240H x 6/H = 1440 during 1V
The count output is supplied to an address in the memory 29. The memory 29 outputs horizontal deflection signal data (here, 8 bits) according to the address, and the D-A converter 38 outputs the data of the horizontal deflection signal corresponding to the address.
It is converted into horizontal deflection signals such as h and h' shown in the figure. This circuit has memory addresses for storing horizontal deflection signals corresponding to each of 6 x 240 lines, and by storing 6 pieces of regular data for each line in the memory, 6 step waves are generated in 1H period. horizontal deflection signals can be obtained.

This horizontal deflection signal is a pair of horizontal deflection signals h and h' that change in six steps as shown in FIG.
In both cases where the center voltage is _V7 , h sequentially decreases and h' sequentially increases, changing in opposite directions to each other. These horizontal deflection signals h, h' are applied to electrodes 18 and 18' of the horizontal deflection electrode 7, respectively. As a result, each horizontally divided electron beam is applied to the R, G,
It is horizontally deflected so that the phosphors of B, R, G, and B (R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , B ₂ ) are sequentially irradiated with H/6. Thus, in each line raster, the electron beam is divided into 180 sections in the horizontal direction.
Each phosphor 20 of R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , and B ₂ is sequentially irradiated with light.

Therefore, an electron beam is applied to each horizontal section of each line.
A color television image can be displayed on the screen 9 by modulating the video signals R ₁ , G ₁ , B ₁ , R _{2 ,} G ₂ , and B 2 .

Next, the modulation control portion of the electron beam will be explained.

First, the composite video signal applied to the television signal input terminal 23 is applied to the color demodulation circuit 30,
Here, the color difference signals of R-Y and B-Y are demodulated,
The G-Y color difference signals are matrix-synthesized, and further, they are combined with the luminance signal Y to generate R, G,
B primary color signals (hereinafter referred to as R, G, and B video signals) are output. These R, G, and B video signals are processed by 180 sample and hold circuit sets 31a to 3.
Added to 1n. Each sample hold circuit group 3
1a to 31n are for R ₁ , G ₁ , B ₁ , R ₂ respectively
It has six sample-and-hold circuits for G, _G2 , and _B2 . These sample and hold outputs are respectively applied to holding memory sets 32a-32n.

On the other hand, the reference clock oscillator 33 is constituted by a PLL (phase locked loop) circuit, etc., and in this embodiment generates a reference clock 6f _SC that is six times the color subcarrier f _SC and a reference clock 2f _SC that is twice the color subcarrier f SC. . The reference clock is controlled to always have a constant phase with respect to the horizontal synchronizing signal H. The reference clock 2f _SC is added to the deflection pulse generation circuit 42, and a signal 6 which is six times as large as the horizontal synchronizing signal H is generated.
Signal switching pulses r ₁ , g ₁ , b ₁ , r ₂ , g ₂ , b ₂ are obtained for each H and H/6. On the other hand, reference clock 6
f _SC is applied to the sampling pulse generation circuit 34, where it is delayed by one clock period by a shift register, and is then converted into a horizontal period (63.5 μsec).
During the effective horizontal scanning period (approximately 50μsec)
1080 sampling pulses R _a1 to B _o2 are sequentially generated, and then one transfer pulse t is generated. These sampling pulses R _a1 to B _o2 correspond to each picture element when one line of the video to be displayed is divided into 360 picture elements in the horizontal direction, and their positions are always constant with respect to the horizontal synchronizing signal H. controlled so that

These 1080 sampling pulses R _a1 to B _o2 are each connected to 180 sample and hold circuit sets 31a.
31n, and as a result, R ₁ , G ₁ , B ₁ , R for each two picture elements when one line is divided into 180 are added to each sample-and-hold circuit set 31a to 31n. ₂ , _G2 , and _B2 are individually sampled and held. The sample-held 180 pairs of R ₁ , G ₁ , B ₁ , R ₂ , G ₂ ,
After the sample and hold for one line is completed, the video signal of _B2 is transferred to 180 sets of memories 32a to 32n by a transfer pulse t, where it is held for the next horizontal period. This retained R ₁ , G ₁ ,
B ₁ , R ₂ , G ₂ , B ₂ signals are sent to the switching circuit 35
Added to a~35n. Switching circuit 35
a to 35n are R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , B ₂ respectively
It is composed of a tri-state or analog gate having individual input terminals and a common output terminal for sequentially switching and outputting these input terminals.

The output of each switching circuit 35a to 35n is
180 sets of pulse width modulation (PWM) circuits 37a to 3
7n, and here, the reference pulse signal is pulse width modulated according to the magnitude of the sampled and held R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , B ₂ video signal and is output. It is desirable that the repetition period of the reference pulse signal is sufficiently smaller than the pulse width of the signal switching pulses r ₁ , g ₁ , b ₁ , r ₂ , g ₂ , b ₂ , for example, 1:10 to 1:10. A ratio of about 1:100 is used.

The output of the pulse width modulation circuits 37a to 37n is used as a control signal for modulating the electron beam to the 180 conductive plates 15a to 15 of the control electrode 5 of the display element.
n separately. Each of the switching circuits 35a to 35n receives a switching pulse r ₁ , which is applied from the switching pulse generation circuit 36.
Switching is controlled simultaneously by g ₁ , b ₁ , r ₂ , g ₂ , and b ₂ . The switching pulse generation circuit 36 generates a signal switching pulse from the deflection pulse generation circuit 42 mentioned above.
It is controlled by r ₁ , g ₁ , b ₁ , r ₂ , g ₂ , b ₂ ,
Each horizontal period is divided into 6 and the switching circuits 35a to 35n are switched by H/6, and R ₁ , G ₁ , B ₁ ,
The switching signals r _{1 ,} g _{1 ,} b ₁ , r ₂ , b _{2 ,} Generate g ₂ .

What should be noted here is that the switching circuit 3
R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , B ₂ in 5a to 35n
video signal supply switching and horizontal deflection drive circuit 4
The irradiation switching horizontal deflection of the electron beams R ₁ , G ₁ , B ₁ , R ₂ , G ₂ , B ₂ to the phosphor according to No. 1 is synchronously controlled so that they completely match both in timing and order. It is that you are. As a result, when the electron beam is irradiating the R ₁ phosphor, the irradiation amount of the electron beam is controlled by the R ₁ video signal, and also for G ₁ , B ₁ , R ₂ , G ₂ , and B ₂ . Similarly controlled, R ₁ , G ₁ , B ₁ , R ₂ , G ₂ ,
B ₂ The emission of each phosphor is caused by the R ₁ , G ₁ , B ₁ ,
Each picture element is controlled by the R ₂ , G ₂ , and B ₂ video signals, and each picture element is displayed by emitting light according to the input video signal. Such control is performed simultaneously for 180 sets of one line (2 picture elements each) to display an image of 360 picture elements for one line, and then sequentially for 240 minutes of lines starting from the upper line. One image will be displayed.

The above operations are repeated for each field of the input television signal, and as a result,
The screen 9 is similar to a normal television receiver.
The television footage of the video is shown above.

Problems to be Solved by the Invention However, in the image display device configured as described above, the line cathode 2 deteriorates over time, and the spacer is required to accurately maintain the positional relationship between the back electrode 1 and the vertical focusing electrode 3. Due to charging and the like, the amount of electron beams emitted from the line cathodes varies depending on the line cathodes, resulting in images with different brightness for each line cathode, greatly degrading the image quality.

For this reason, the present inventors have proposed Japanese Patent Application No. 58-76945,
In Japanese Patent Application No. 59-71526, etc., we have proposed correcting variations in the amount of emitted electron beams, but this is a method of feeding back to the back electrode. Depending on the operating conditions of the line cathode and the vertical focusing electrode, there are regions in which the feedback operation does not occur, and there is a problem in that the line cathode cannot be used to its fullest potential. That is, as shown in Fig. 4, when the voltage of the vertical focusing electrode (hereinafter referred to as the _G1 electrode) immediately after the line cathode is 70V, the B zone is the feedback possible area, the A zone is the impossible area,
The C zone is an area where the screen becomes dark and is not suitable for use, but if the _G1 voltage, that is, V _G1 = 80V, there will be areas in the B zone that are included in the feedback impossible area. . This imposes restrictions on the setting of operating conditions, and also makes it impossible to meet the design requirement of using the area near the boundary between zone A and zone B in order to increase brightness.

In view of the above-mentioned problems, the present invention has been developed to make the brightness of each line cathode uniform regardless of the operating conditions of the electrodes, and to provide an image sensor equipped with a brightness compensation feedback circuit that can easily correct errors in brightness and emission detection values. The purpose is to provide a display device.

Means for Solving the Problems In order to achieve this object, the image display device of the present invention has a vertical focusing electrode located immediately before a control electrode that controls the amount of electron beam irradiated onto the screen and controls the emission intensity. (hereinafter referred to as the G ₃ electrode) detects the amount of emission of the line cathode emitted during the vertical blanking period, compares it with the ROM memory circuit that stores the initial setting brightness, and determines the G ₁ A circuit device that drives the electrodes to form a feed back system, during feed back
G After A/D converting the current flowing into the ₃ electrodes, it is stored in the RAM memory circuit, and the above is performed at the image display timing.
It is configured with a circuit device that reads the memory contents of the RAM memory circuit and controls the voltage of the _G1 electrode.

Function: In order to detect the amount of electron beam emission from the line cathode, the image display device of the present invention sequentially emits one cathode at a time during the vertical blanking period, and converts this into a current flowing into the _G3 electrode. The detected value is compared with the contents of the ROM memory circuit, and feedback is performed so that the difference becomes zero. The I _G3 at this time is A/D converted, stored in the RAM memory circuit, and used at the image display time.
By controlling the _G1 electrode with the contents of the RAM memory circuit, the initial setting emission written in the ROM memory circuit can be obtained over the entire screen display, eliminating variations in brightness between line cathodes. can.

Embodiment An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention, and an input signal from an input terminal 23 causes the circuit device of the conventional configuration block diagram (FIG. 7) to operate as described in the prior art. Detection pulse insertion circuit 71
Inserts a detection pulse for sequentially emitting cathodes one by one during the vertical blanking period when no signal is needed at the beam flow control electrode 5, and supplies it to the line cathode drive circuit 26. The reason why it is detected during the vertical blanking period is that during the image signal period, the electron beam blocked by the beam flow control electrode 5 due to the content of the image signal flows back to the _G3 electrode, making it impossible to accurately detect the amount of emission. . The G ₃ electrode is 3′ shown in FIG. 5, and has the same shape as the beam flow control electrode 5 integrated into one, and the G ₁ electrode 3
Since the vertically deflected electron beam is incident on the vertical deflection electrode 4 without being focused horizontally, the amount of emission can be detected with high accuracy. This amount of emission has a very high correlation with brightness, and by controlling I _G3 with high precision, the brightness on the screen 9 can be made uniform.

In addition to its conventional functions, the reference clock oscillator 33 outputs control pulses to perform the following operations of the present invention. The cathode electron beam emitted during the blanking period flows into the G ₃ electrode 3 ′ and enters the G ₃ power supply terminal 62 . At this time, a voltage of I _G3 ×R ₅₉ is generated on the G ₃ electrode side 62' of the resistor 59 depending on the magnitude of the beam current. The DC level of this signal is shifted by a capacitor 60, clamped by a clamp circuit 50, and amplified by a low-pass amplifier 51. Furthermore, turn switch 61 to side a, and the initial settings are made.
The contents of the ROM memory circuit 55 are transferred to the D/A converter 56.
The difference between the D/A result and the output of the low-pass amplifier 51 is detected. This difference is detected by a differential amplifier 57, and the _G1 electrode 3 is driven through a drive circuit 58. The relationship between the _G1 electrode voltage and the brightness is as shown in _FIG . The output voltage 64 of the amplifier 51 is controlled. The voltage 64 at this time is sampled by the A/D converter 52.
After holding, A/D conversion is performed and RAM memory circuit 53
to be memorized. During the image display period, the switch 61 is turned to side b, and the contents of the RAM memory circuit 53 are read out and converted into analog by the D/A converter 54, and the contents of the ROM memory circuit 55, which stores the initial data contents, are read out and converted into analog data by the D/A converter 54. The differential amplifier 57 is activated by
G ₁ equivalent to that with the feed back
An electrode voltage is generated and applied to the _G1 electrode 3 to homogenize the image over the entire area.

Next, we will further discuss its operation.

Although the basic operation has been described in the configuration of the embodiment, the overall operation will be described here with supplementary information.

The memory contents of the ROM memory circuit 55 are controlled by connecting another RAM for adjustment while the brightness compensation feedback circuit of the present invention is operating, and changing the memory contents while measuring the brightness of the screen so that the brightness is uniform. Fixes the contents of RAM at the time of the change and writes it to ROM. Fixing the contents of the ROM first in this way is necessary to make the brightness uniform with an accuracy of a few percent, since the correlation between I _G3 and brightness does not match perfectly. Next, the operation will be explained with reference to FIG. The line cathode drive pulse is different from the conventional line cathode drive pulse.
A detection pulse is inserted during the vertical blanking period, and the emission amount of one cathode is detected for each field. The level of I _G3 , which makes the brightness of line cathode 2 a uniform, is set by the feed signal at timing a.
It is detected backwards and stored in a predetermined location in RAM. At the next timing ₂ , the _G1 electrode 3 is controlled by the contents of this RAM, and at the next timing ₂ , when the previous two line cathodes are emitted during the vertical blanking period (timing b)
Controlled by the contents of RAM stored in This image display device, which has 15 line cathodes as described in FIG. 7, can update the contents of the RAM in 15 fields in 1/4 second.

Figure 3 shows the relationship between _G1 electrode voltage and brightness.
When increasing the _G1 electrode voltage, the brightness continues to increase,
The brightness increases to the maximum value of the emission capacity of the line cathode. Further increasing the _G1 electrode voltage,
The electron beam absorbed by the _G1 electrode increases and the brightness decreases. Therefore, when changing the _G1 electrode voltage, there is no region where control becomes impossible as shown in FIG. 4, and if it is used to the left of the peak value, maximum control can be achieved within the range of cathode capacity.

As described above, according to this embodiment, the emission capacity of the linear cathode 2 can be controlled to the maximum extent, and is not limited by the driving conditions of the back electrode 1 and the linear cathode 2. In addition, in the conventional example, since it was operated only by a feed back loop that operated in real time, it was not possible to completely correct the correlation between the detected emission current and brightness, and the accuracy of brightness uniformization was insufficient. However, in this embodiment, this correlation can be corrected when initializing the contents of the ROM memory circuit, so a highly accurate brightness screen can be obtained.

Effects of the Invention As described above, the present invention sequentially emits the line cathodes one by one during the vertical blanking period, and the amount of emission is controlled by the vertical focusing electrode (G ₃ electrode)
The detected emission amount is compared with the initial setting brightness data stored in the ROM memory circuit, and fed back to the vertical focusing electrode ( _G3 electrode) located immediately after the line cathode.
Stored in the RAM memory circuit and during the image display period.
By controlling the vertical focusing electrode ( _G1 electrode) located immediately after the line cathode according to the memory contents of the RAM memory circuit, the maximum emission of the line cathode can be achieved without being limited by the operating conditions of the line cathode and back electrode. Not only can the brightness be fed back up to the performance level, but the correlation between the emission detection value and the brightness can be easily corrected by initializing the ROM.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a brightness uniformity compensation circuit of an image display device according to an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of FIG. 1 of the present invention, and FIG. Figure 4 is a characteristic diagram showing the operating characteristics of the conventional example.
Figure 5 is an exploded perspective view of an image display element used in a conventional image display device, Figure 6 is an enlarged view of the phosphor surface of the image display element, and Figure 7 is the basic configuration of the drive circuit of the image display element. 8 is a waveform diagram for explaining the operation of the vertical deflection drive. FIG. 9 is a waveform diagram for explaining the operation of the line cathode drive circuit.
0 is a waveform diagram of each drive signal, and FIG. 11 is a waveform diagram for explaining the operation of the horizontal deflection drive circuit. 1... Back electrode, 2, 2 I~2 Y... Line cathode, 3,
3'... Vertical focusing electrode, 4... Vertical deflection electrode, 5... Beam flow control electrode, 7... Horizontal deflection electrode, 9... Screen, 10... Slit, 20... Fluorescent body, 23... Input terminal, 50... Clamp circuit, 51...Low pass amplifier, 52...A/D converter, 53...RAM memory circuit, 54, 56...D/A converter, 55...ROM
Memory circuit, 57...Differential amplifier, 58...Drive circuit, 59...Resistor, 60...Capacitor, 61...Switch, 62... _G3 power supply terminal.

Claims (1)

[Claims] 1. A plurality of line cathode electron beam generation sources, a screen having a phosphor that emits light when irradiated with the electron beam, and a plurality of vertical and horizontal focusing devices that focus the electron beams generated by the electron beam generation sources. A display comprising an electrode, an electrostatic deflection electrode that deflects the electron beam up to the screen, and a control electrode that controls the intensity of light emission by controlling the amount of the electron beam irradiated to the screen. The ROM is equipped with a ROM element, in which the line cathodes are sequentially emitted one by one during the vertical blanking period of the television signal, and the amount of emission is detected by a vertical focusing electrode located immediately before the control electrode that controls the emission intensity. It compares the content stored in the memory circuit and feeds back the comparison result to the vertical focusing electrode located immediately after the line cathode, and also stores the detected amount of emission in the RAM memory circuit, and stores it in the RAM memory circuit during the image display period. An image display device characterized in that the voltage of a vertical focusing electrode located immediately after the line cathode is controlled depending on the content.