JPH0474872B2 - - Google Patents
Info
- Publication number
- JPH0474872B2 JPH0474872B2 JP56190325A JP19032581A JPH0474872B2 JP H0474872 B2 JPH0474872 B2 JP H0474872B2 JP 56190325 A JP56190325 A JP 56190325A JP 19032581 A JP19032581 A JP 19032581A JP H0474872 B2 JPH0474872 B2 JP H0474872B2
- Authority
- JP
- Japan
- Prior art keywords
- germanium
- shows
- present
- film
- apd
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
- H10F30/00—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
- H10F30/20—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
- H10F30/21—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
- H10F30/22—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
- H10F30/225—Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier working in avalanche mode, e.g. avalanche photodiodes
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- Light Receiving Elements (AREA)
Description
【発明の詳細な説明】
本発明はゲルマニウム半導体装置の製造方法に
関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a germanium semiconductor device.
近年、光通信の実用化がめざましく波長1〜
1.6μm帯の受光材料としてゲルマニウムがあげら
れ、ゲルマニウム受光素子の開発が進められてい
るが、素子特性、信頼性の向上の点で、これら素
子はプレーナ化が望ましい。受光素子を含むゲル
マニウム半導体素子のプレーナ化を図るうえで重
要な技術の1つに、表面不活性化膜の形成があげ
られるが、ゲルマニウムはシリコンの場合とは異
なり、その熱酸化膜(GeO2)はトラツプ準位が
多く、ゲルマニウム半導体との界面における界面
準位密度も1012〜1014cm-2eV-1と非常に多い。ま
た、粗悪な熱酸化膜は水溶性を有し、ゲルマニウ
ム半導体装置の製造上好ましくない。そのため、
ゲルマニウム半導体の表面不活性化は従来から、
二酸化シリコン膜のような異種絶縁膜をCVD法
によつて形成してきたが、該絶縁膜とゲルマニウ
ム半導体との界面における界面準位密度は熱酸化
膜の場合と同様に1012〜1014cm-2eV-1であり、著
しい改善は図られていない。従つて本発明の目的
は、界面準位密度の小さいゲルマニウム半導体装
置の製造方法を提供することである。 In recent years, the practical application of optical communication has been remarkable, with wavelengths 1 and up.
Germanium is used as a light-receiving material in the 1.6 μm band, and germanium light-receiving elements are being developed, but planarization of these elements is desirable in terms of improving device characteristics and reliability. One of the important techniques for planarization of germanium semiconductor devices, including photodetectors, is the formation of a surface passivation film, but unlike silicon, germanium has a thermal oxide film (GeO 2 ) has many trap levels, and the interface state density at the interface with the germanium semiconductor is extremely high at 10 12 to 10 14 cm -2 eV -1 . In addition, a poor thermal oxide film is water-soluble, which is undesirable in the production of germanium semiconductor devices. Therefore,
Surface passivation of germanium semiconductors has traditionally been carried out using
A heterogeneous insulating film such as a silicon dioxide film has been formed by the CVD method, but the interface state density at the interface between the insulating film and the germanium semiconductor is 10 12 to 10 14 cm - as in the case of a thermal oxide film. 2 eV -1 , and no significant improvement has been made. Therefore, an object of the present invention is to provide a method for manufacturing a germanium semiconductor device with a low interface state density.
本発明のゲルマニウム半導体装置の製造方法ゲ
ルマニウム半導体表面に誘導体膜を形成した後、
酸素雰囲気にて熱処理を行い、該誘導体膜とゲル
マニウム半導体との界面に、酸化ゲルマニウムを
形成する工程を有することを特徴とする。 Method for manufacturing a germanium semiconductor device of the present invention After forming a dielectric film on the surface of a germanium semiconductor,
It is characterized by comprising a step of performing heat treatment in an oxygen atmosphere to form germanium oxide at the interface between the dielectric film and the germanium semiconductor.
本発明によれば、酸化ゲルマニウム膜が直接に
大気に触れることがないので大気中の水分を取り
込むことによる電気的界面不安定性がなく、また
蒸発しやすいといつた酸化ゲルマニウム特有の性
質を抑制しているので従来の熱酸化法に比べて著
しい界面特性の改善がある。第1図は上記効果を
実証した結果を示している。第1図はN型8×
1015cm-3キヤリア濃度のゲルマニウム半導体に通
常の熱分解CVD法により、二酸化シリコン膜を
形成し、該二酸化シリコン膜の上にAl電極を形
成した云わゆるMIS(Metal−Insu−lator−
Semiconductor)ダイオードの容量−電圧特性か
ら界面準位密度を導出した結果である。二酸化シ
リコン膜は450℃においてArで3%に希釈された
SiH4を毎分500c.c.,O2を毎分300c.c.,N2キヤリア
ガスを毎分80流して1200Åの厚さに形成した。
第1図において曲線1,2は本発明との比較のた
めの実験の結果、曲線3は本発明の場合を示し、
曲線1は、本発明によらない、すなわちゲルマニ
ウム半導体に二酸化シリコン膜を形成したのみの
場合の界面準位密度分布を示しているが、最小で
も3×1012cm-2eV-1程度である。曲線2は比較の
ための熱酸化による場合であり、450℃のもとで
O2を毎分2.5流量で5分間流した後、先の曲線
1の場合と同一条件で二酸化シリコン膜を形成し
た場合の界面準位密度分布を示しており、最小で
5×1011cm-2eV-1にまで低減された。曲線3は、
本発明の方法、すなわち、先の曲線1の場合と同
一条件で二酸化シリコン膜を形成した後、600℃
のもとでO2を毎分2.5流量で30分間流して熱処
理を施した場合の界面準位密度分布を示してお
り、最小で8×1010cm-2eV-1にまで低減された。
このように本発明によつて界面特性が改善される
ことが明らかである。 According to the present invention, since the germanium oxide film does not come into direct contact with the atmosphere, there is no electrical interface instability due to the absorption of moisture from the atmosphere, and the characteristic properties of germanium oxide, such as easy evaporation, can be suppressed. Because of this, there is a significant improvement in interfacial properties compared to conventional thermal oxidation methods. FIG. 1 shows the results of demonstrating the above effect. Figure 1 shows N type 8×
A so-called MIS (Metal - Insu - lator-
This is the result of deriving the interface state density from the capacitance-voltage characteristics of a diode (Semiconductor). Silicon dioxide film was diluted to 3% with Ar at 450°C.
A thickness of 1200 Å was formed by flowing SiH 4 at 500 c.c./min, O 2 at 300 c.c./min, and N 2 carrier gas at 80 c.c./min.
In FIG. 1, curves 1 and 2 show the results of experiments for comparison with the present invention, and curve 3 shows the case of the present invention.
Curve 1 shows the interface state density distribution not according to the present invention, that is, when only a silicon dioxide film is formed on a germanium semiconductor, but the minimum density distribution is about 3 × 10 12 cm -2 eV -1. . Curve 2 is the case of thermal oxidation for comparison, at 450℃.
It shows the interface state density distribution when a silicon dioxide film is formed under the same conditions as curve 1 above after flowing O 2 at a flow rate of 2.5 per minute for 5 minutes, and the minimum density is 5 × 10 11 cm - It was reduced to 2 eV -1 . Curve 3 is
After forming a silicon dioxide film using the method of the present invention, that is, under the same conditions as in curve 1 above,
The graph shows the interface state density distribution when heat treatment was performed by flowing O 2 at a flow rate of 2.5 per minute for 30 minutes under the conditions, and the density was reduced to a minimum of 8 × 10 10 cm -2 eV -1 .
It is thus clear that the present invention improves the interfacial properties.
以下に実施例としてゲルマニウム・アバランシ
エフオトダイオード(以下Ge−APDと称す)の
製造に応用して詳細に説明するが、実施例のみが
本発明を限定するものでない事は容易に理解され
なければならない。まず本発明との比較のための
実験例について述べる。第2図はその製造工程の
途中からを示した一例である。準備されたゲルマ
ニウム基板21はn型でキヤリア濃度が8×1015
cm-3である。該ゲルマニウム基板21に増倍特性
の改善のために設けられるp導電型のガードリン
グ部22、および受光部であるp+導電層23を
各々ベリリウム及びボロンのイオン打ち込み法に
より形成した(第2図a)。ベリリウムイオン打
ち込みの加速電圧とドース量は各々、100keV,
1×1014cm-2に選んだ。またボロンイオン打ち込
みの加速電圧とドース量は各々、40keV,2×
1013cm-2に選んだ。イオン打ち込みの後、650℃
で45分間窒素雰囲気中で加熱することにより、打
ち込みイオンの活性化を行なつた。このときのガ
ードリング部22の接合深さは約3μm、p+受光部
23の接合深さは約0.3μmである。次に、450℃
のもとでO2を毎分2.5流量で5分間流して該ゲ
ルマニウム表面に薄い酸化ゲルマニウム層24を
形成した後、直ちに二酸化シリコン誘導体膜25
を前述の条件で形成し、全体の厚さを2300Åにし
た(第2図b)。次に従来より周知の露光技術に
より電極形成用の窓あけを行ない、Al電極26
を形成してGe−APDを完成させた(第2図c)。 The following is a detailed explanation of the application to the production of a germanium avalanche photodiode (hereinafter referred to as Ge-APD) as an example, but it should be easily understood that the invention is not limited only to the example. It won't happen. First, an experimental example for comparison with the present invention will be described. FIG. 2 shows an example from the middle of the manufacturing process. The prepared germanium substrate 21 is n-type and has a carrier concentration of 8×10 15
cm -3 . On the germanium substrate 21, a p conductive type guard ring portion 22 provided to improve multiplication characteristics and a p + conductive layer 23 serving as a light receiving portion were formed by ion implantation of beryllium and boron, respectively (Fig. 2). a). The accelerating voltage and dose for beryllium ion implantation were 100keV and 100keV, respectively.
1×10 14 cm -2 was chosen. In addition, the acceleration voltage and dose amount for boron ion implantation are 40keV, 2×
10 13 cm -2 was chosen. After ion implantation, 650℃
The implanted ions were activated by heating in a nitrogen atmosphere for 45 minutes. At this time, the junction depth of the guard ring portion 22 is approximately 3 μm, and the junction depth of the p + light receiving portion 23 is approximately 0.3 μm. Next, 450℃
After forming a thin germanium oxide layer 24 on the germanium surface by flowing O 2 at a flow rate of 2.5 per minute for 5 minutes under
was formed under the conditions described above to give a total thickness of 2300 Å (Figure 2b). Next, a window for electrode formation is made using a well-known exposure technique, and the Al electrode 26 is
was formed to complete Ge-APD (Figure 2c).
次に本発明の実施例として、Ge−APDを例に
とつて説明する。第3図はその製造工程の途中か
らを示している。第3図aは第2図aと全く同じ
工程である。次いで前述の条件で二酸化シリコン
誘導体膜25を形成した後(第3図b)600℃の
もとでO2を毎分2.5流量30分間流して、二酸化
シリコン膜25とゲルマニウム基板21との中間
に酸化ゲルマニウム層24を形成し(第3図c)、
全体の不活性化膜厚2300Åにした。次に第2図c
と同様に、Al電極26を形成してGe−APDを完
成させた。(第3図d)。第4図、本発明によらな
い、単に二酸化シリコン膜を形成した場合と、第
2図に示した工程の場合と、本発明による第3図
で示した工程の場合により、それぞれ製造したア
バランシエフオトダイオードの暗電流−電圧特性
を示している。第4図からGe−APDの降伏電圧
VBは約−30Vである。曲線41は本発明によら
ない従来方法で製造したGe−APDの暗電流−電
圧曲線であり、暗電流は0.9VBにおいて0.5〜
0.6μAと非常に多い。第2図で示した比較のため
の、熱酸化法により製造したGe−APDの暗電流
は曲線42に示してあり、0.9VBで0.3〜0.4μAに
低減された。更に本発明による方法を適用して製
造したGe−APDでは暗電流は、曲線43に示す
ように0.9VBで0.1〜0.2μAにまで低減され第1図
に示した結果と矛盾しない結果が得られ、Ge−
APDの特性向上が図れた。 Next, as an example of the present invention, Ge-APD will be described as an example. FIG. 3 shows the manufacturing process from the middle. FIG. 3a shows exactly the same process as FIG. 2a. Next, after forming the silicon dioxide derivative film 25 under the above-mentioned conditions (FIG. 3b), O 2 was flowed at a flow rate of 2.5 per minute at 600° C. for 30 minutes to form a layer between the silicon dioxide film 25 and the germanium substrate 21. forming a germanium oxide layer 24 (FIG. 3c);
The total passivation film thickness was 2300 Å. Next, Figure 2c
Similarly, an Al electrode 26 was formed to complete the Ge-APD. (Figure 3d). FIG. 4 shows an avalanche manufactured by simply forming a silicon dioxide film not according to the present invention, by the process shown in FIG. 2, and by the process shown in FIG. 3 according to the present invention. It shows the dark current-voltage characteristics of a photodiode. From Figure 4, breakdown voltage of Ge-APD
V B is approximately -30V. Curve 41 is a dark current-voltage curve of Ge-APD manufactured by a conventional method not according to the present invention, and the dark current is 0.5 to 0.5 at 0.9V B.
0.6μA, which is extremely high. The dark current of the comparative thermal oxidation-produced Ge-APD shown in FIG. 2 is shown in curve 42 and was reduced to 0.3-0.4 μA at 0.9 V B. Furthermore, in the Ge-APD manufactured by applying the method according to the present invention, the dark current was reduced to 0.1 to 0.2 μA at 0.9 V B, as shown in curve 43, and results consistent with the results shown in Figure 1 were obtained. Ge−
The characteristics of APD were improved.
上記実施例では、誘導体として二酸化シリコン
膜の場合について説明したが、他の誘導体例えば
窒化シリコン膜(Si3N4),窒化ゲルマニウム膜
(Ge3N4),酸化アルミニウム(Al2O3)について
も全く同様の効果が得られた。 In the above embodiment, the case of using silicon dioxide film as the dielectric was explained, but other dielectrics such as silicon nitride film (Si 3 N 4 ), germanium nitride film (Ge 3 N 4 ), and aluminum oxide (Al 2 O 3 ) can also be used. Exactly the same effect was obtained.
以上のように、本発明によれば酸化ゲルマニウ
ム層を外気に接することなく、誘導体とゲルマニ
ウム半導体との界面に形成することができるため
界面準位密度の小さい良好な界面特性が得られる
という利点を有する。 As described above, according to the present invention, it is possible to form a germanium oxide layer at the interface between a dielectric and a germanium semiconductor without exposing it to the outside air, so it has the advantage that good interface characteristics with a small interface state density can be obtained. have
第1図は界面準位密度分布曲線を示す図で、1
は本発明によらない、単に二酸化シリコン膜を形
成した場合、2は比較のための熱酸化による場
合、3は本発明による場合を示す。第2図は比較
のための熱酸化による場合のGe−APDの製造工
程を説明する図である。第3図本発明によるGe
−APDの製造工程を説明する図である。第2図、
第3図において、21はゲルマニウム基板、22
はガードリング層、23は受光部、24は酸化ゲ
ルマニウム層、25は二酸化シリコン膜、26は
Al電極、である。第4図はGe−APDの暗電流−
電圧特性図である。41は単に二酸化シリコン膜
を形成した場合、42は比較のための熱酸化によ
る場合、43は本発明による場合を示す。
Figure 1 shows the interface state density distribution curve.
2 shows the case where a silicon dioxide film was simply formed, which is not according to the present invention, 2 shows the case where thermal oxidation was used for comparison, and 3 shows the case according to the present invention. FIG. 2 is a diagram illustrating the manufacturing process of Ge-APD using thermal oxidation for comparison. Figure 3 Ge according to the present invention
- It is a figure explaining the manufacturing process of APD. Figure 2,
In FIG. 3, 21 is a germanium substrate, 22
23 is a guard ring layer, 23 is a light receiving part, 24 is a germanium oxide layer, 25 is a silicon dioxide film, and 26 is a
It is an Al electrode. Figure 4 shows the dark current of Ge-APD.
It is a voltage characteristic diagram. 41 shows the case where a silicon dioxide film is simply formed, 42 shows the case where thermal oxidation is used for comparison, and 43 shows the case according to the present invention.
Claims (1)
た後、酸素雰囲気にて熱処理を行ない、該誘電体
膜とゲルマニウム半導体との界面に、酸化ゲルマ
ニウムを形成する工程を有することを特徴とする
ゲルマニウム半導体装置の製造方法。1. Manufacture of a germanium semiconductor device, comprising the step of forming a dielectric film on the surface of a germanium semiconductor and then performing heat treatment in an oxygen atmosphere to form germanium oxide at the interface between the dielectric film and the germanium semiconductor. Method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56190325A JPS5891686A (en) | 1981-11-27 | 1981-11-27 | Germanium semiconductor device and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP56190325A JPS5891686A (en) | 1981-11-27 | 1981-11-27 | Germanium semiconductor device and its manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5891686A JPS5891686A (en) | 1983-05-31 |
| JPH0474872B2 true JPH0474872B2 (en) | 1992-11-27 |
Family
ID=16256297
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP56190325A Granted JPS5891686A (en) | 1981-11-27 | 1981-11-27 | Germanium semiconductor device and its manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5891686A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8354148B2 (en) | 2004-05-18 | 2013-01-15 | Fujifilm Corporation | Optical compensation polarizing plate, image display unit and liquid crystal display unit |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2013058566A (en) * | 2011-09-07 | 2013-03-28 | Univ Of Tokyo | Photoelectric conversion element, photodetector, and solar cell |
| GB201814688D0 (en) * | 2018-09-10 | 2018-10-24 | Univ Court Univ Of Glasgow | Single photon avaalanche detector method for use therof and method for it's manufacture |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5111379A (en) * | 1974-07-17 | 1976-01-29 | Matsushita Electric Industrial Co Ltd | Handotaisochino seizohoho |
-
1981
- 1981-11-27 JP JP56190325A patent/JPS5891686A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8354148B2 (en) | 2004-05-18 | 2013-01-15 | Fujifilm Corporation | Optical compensation polarizing plate, image display unit and liquid crystal display unit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5891686A (en) | 1983-05-31 |
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