JPH0475435U - - Google Patents

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Publication number
JPH0475435U
JPH0475435U JP11960590U JP11960590U JPH0475435U JP H0475435 U JPH0475435 U JP H0475435U JP 11960590 U JP11960590 U JP 11960590U JP 11960590 U JP11960590 U JP 11960590U JP H0475435 U JPH0475435 U JP H0475435U
Authority
JP
Japan
Prior art keywords
converter
reference voltage
input
bit
external reference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11960590U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP11960590U priority Critical patent/JPH0475435U/ja
Publication of JPH0475435U publication Critical patent/JPH0475435U/ja
Pending legal-status Critical Current

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  • Analogue/Digital Conversion (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの考案の一実施例によるAD変換装
置を示す機能ブロツク図、第2図は、第1図回路
の変換特性を説明する特性図、第3図及び第4図
はこの考案の他の実施例を示す機能ブロツク図、
第5図は従来のAD変換装置を示す機能ブロツク
図、第6図は、従来の変換特性を示す特性図、第
7図は、従来の装置の問題点を説明する図である
。 図において、1はAD変換器、2は基準電圧設
定回路、3は上端基準電圧、4は下端基準電圧、
5はアナログ入力、6はクロツク、7はデジタル
出力、8はアナログスイツチ、9はデジタル出力
のLSB、10は演算増幅器である。なお、図中
、同一符号は同一、または相当部分を示す。
FIG. 1 is a functional block diagram showing an AD converter according to an embodiment of this invention, FIG. 2 is a characteristic diagram explaining the conversion characteristics of the circuit shown in FIG. 1, and FIGS. A functional block diagram showing an embodiment of
FIG. 5 is a functional block diagram showing a conventional AD conversion device, FIG. 6 is a characteristic diagram showing conventional conversion characteristics, and FIG. 7 is a diagram explaining problems of the conventional device. In the figure, 1 is an AD converter, 2 is a reference voltage setting circuit, 3 is an upper end reference voltage, 4 is a lower end reference voltage,
5 is an analog input, 6 is a clock, 7 is a digital output, 8 is an analog switch, 9 is the LSB of the digital output, and 10 is an operational amplifier. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] nビツトAD(アナログ−デジタル)変換系に
おいて、外部基準電圧入力を有するn+1ビツト
のAD変換器と、前記外部基準電圧入力への入力
電圧値を前記AD変換器の出力データのLSBの
値によつて異なる2組の値に切替える基準電圧設
定回路とを備えたことを特徴とするAD変換装置
In an n-bit AD (analog-to-digital) conversion system, an n+1-bit AD converter has an external reference voltage input, and the input voltage value to the external reference voltage input is determined by the LSB value of the output data of the AD converter. 1. An AD converter comprising: a reference voltage setting circuit that switches between two different sets of values when the voltage is applied.
JP11960590U 1990-11-14 1990-11-14 Pending JPH0475435U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11960590U JPH0475435U (en) 1990-11-14 1990-11-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11960590U JPH0475435U (en) 1990-11-14 1990-11-14

Publications (1)

Publication Number Publication Date
JPH0475435U true JPH0475435U (en) 1992-07-01

Family

ID=31867551

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11960590U Pending JPH0475435U (en) 1990-11-14 1990-11-14

Country Status (1)

Country Link
JP (1) JPH0475435U (en)

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