JPH047894A - Through hole formation method - Google Patents

Through hole formation method

Info

Publication number
JPH047894A
JPH047894A JP11104190A JP11104190A JPH047894A JP H047894 A JPH047894 A JP H047894A JP 11104190 A JP11104190 A JP 11104190A JP 11104190 A JP11104190 A JP 11104190A JP H047894 A JPH047894 A JP H047894A
Authority
JP
Japan
Prior art keywords
hole
substrate
conductive paste
conductor paste
paste film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11104190A
Other languages
Japanese (ja)
Other versions
JPH0777294B2 (en
Inventor
Naoshi Kani
直士 可児
Terunobu Ito
伊藤 照信
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Murata Manufacturing Co Ltd
Original Assignee
Murata Manufacturing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Murata Manufacturing Co Ltd filed Critical Murata Manufacturing Co Ltd
Priority to JP2111041A priority Critical patent/JPH0777294B2/en
Publication of JPH047894A publication Critical patent/JPH047894A/en
Publication of JPH0777294B2 publication Critical patent/JPH0777294B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

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  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To form a through hole in a normal state even when the diameter of the through hole is made small by a method wherein a conductor paste film formed on the inner circumferential face of the through hole is dried in a state that it is vacuum-sucked from the rear surface side of a substrate. CONSTITUTION:In a state that a substrate 1 is vacuum-sucked in the direction of the arrow from its rear surface side, a conductor paste film 2 used to form a prescribed interconnection pattern is screen-printed on the surface of the substrate 1. A conductor paste is sucked into a through hole 3 formed in the substrate 1 by a vacuum suction operation form the rear surface side; a conductor paste film 4 is formed on the inner circumferential face. In this state, the substrate 1 is heated, the conductor paste film 4 is dried together with the conductor paste film 2 and, after that, the conductor paste films are baked. Thereby, the inside of the through hole is not closed with the conductor paste. Even when the diameter of the through hole is small and the conductor paste in large quantities is sucked, the through hole in a normal state can be formed.

Description

【発明の詳細な説明】 (産業上の利用分野) 本発明は、ハイブリッドIC等を構成する基板のスルー
ホールの形成方法に関する。
DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method for forming through holes in a substrate constituting a hybrid IC or the like.

(従来の技術) 従来、ハイブリッドIC等を構成する基板のスルーホー
ルの形成は、次のような方法によりおこなっていた。す
なわち、第5図に示すように、基板lの上面に所定の配
線パターンを形成するための導体ペースト膜2をスクリ
ーン印刷するとき、基板lに形成した貫通孔3の下面側
から矢印方向に真空吸引しておく。そうすると、基板l
の上面側に供給された導体ペーストが貫通孔3内に引き
込まれ、その内周面に導体ペースト膜4が形成される。
(Prior Art) Conventionally, through-holes in a substrate constituting a hybrid IC or the like have been formed by the following method. That is, as shown in FIG. 5, when screen printing the conductor paste film 2 for forming a predetermined wiring pattern on the upper surface of the substrate l, a vacuum is applied from the lower surface side of the through hole 3 formed in the substrate l in the direction of the arrow. Aspirate it. Then, the board l
The conductive paste supplied to the upper surface side is drawn into the through hole 3, and a conductive paste film 4 is formed on the inner peripheral surface thereof.

その後、真空吸引を解除してこの導体ペースト膜4を導
体ペースト膜2とともに乾燥して焼成することにより、
導体ペーストM4は導体膜となりスルーホールが形成さ
れる。導体ペースト膜2は配線パターンとなる。その後
、図示はしていないが、基板lを反転させて上記と同様
の方法で基板lの上面と貫通孔3の内周面とに導体ペー
スト膜を形成して焼成する。この結果、基板1の両面に
形成された配線パターンは、スルーホールを介して接続
されることになる。
After that, by canceling the vacuum suction and drying and baking this conductor paste film 4 together with the conductor paste film 2,
The conductive paste M4 becomes a conductive film and through holes are formed. The conductor paste film 2 becomes a wiring pattern. Thereafter, although not shown, the substrate 1 is reversed, and a conductive paste film is formed on the upper surface of the substrate 1 and the inner peripheral surface of the through hole 3 in the same manner as described above, and then fired. As a result, the wiring patterns formed on both sides of the substrate 1 are connected through the through holes.

(発明が解決しようとする課題) ところが、上記のようなスルーホールの形成方法におい
ては、基板Iに形成した貫通孔3の径が小さい場合や貫
通孔3内に引き込まれる導体ペースト量が多い場合には
、貫通孔3の下面側からの真空吸引を解除すると、導体
ペーストの表面張力により第6図に示すように貫通孔3
内が導体ペーストでふさがってしまうことがある。この
ような状態で導体ペーストを焼成すると、導体ペースト
の厚い部分と薄い部分では収縮割合が異なる等の理由で
、第7図に示すように貫通孔3内の導体膜にクラックが
生じ、正常な状態のスルーホールが形成できないという
問題があった。本発明は、上記の課題に鑑みてなされた
ものであって、貫通孔の径が小さい場合や貫通孔に引き
込まれる導体ペースト量が多い場合でも正常な状態のス
ルーホールを形成することのできるスルーホール形成方
法を提供することを目的とするものである。
(Problem to be Solved by the Invention) However, in the method for forming a through hole as described above, when the diameter of the through hole 3 formed in the substrate I is small or when the amount of conductive paste drawn into the through hole 3 is large, When the vacuum suction from the bottom side of the through hole 3 is released, the surface tension of the conductive paste causes the through hole 3 to open as shown in FIG.
The inside may become clogged with conductive paste. If the conductor paste is fired in such a state, cracks will occur in the conductor film inside the through hole 3 as shown in Figure 7, due to the difference in shrinkage ratio between the thick and thin parts of the conductor paste, and the normal state will deteriorate. There was a problem that a through hole could not be formed. The present invention has been made in view of the above problems, and is capable of forming a through hole in a normal state even when the diameter of the through hole is small or when the amount of conductive paste drawn into the through hole is large. The object of the present invention is to provide a method for forming holes.

(課題を解決するための手段) このような目的を達成するために本発明においては、基
板の上面側に供給した導体ペーストをその下面側から真
空吸引することによって基板に形成した貫通孔の内周面
に導体ペースト膜を形成し、この導体ペースト膜を基板
の下面側から真空吸弓した状態で乾燥し、その後にその
導体ペースト膜を焼成するようにしたことを特徴として
いる。
(Means for Solving the Problems) In order to achieve such an object, in the present invention, conductive paste supplied to the upper surface of the substrate is vacuum-sucked from the lower surface of the substrate to fill the inside of the through hole formed in the substrate. The present invention is characterized in that a conductive paste film is formed on the peripheral surface, the conductive paste film is dried under vacuum suction from the lower surface of the substrate, and then the conductive paste film is fired.

(作用) 貫通孔内周面に形成した導体ペースト膜を基板の下面側
から真空吸引した状態で乾燥するため、貫通孔内が導体
ペーストでふさがることがない。
(Function) Since the conductive paste film formed on the inner circumferential surface of the through hole is dried while being vacuum-suctioned from the lower surface of the substrate, the inside of the through hole is not blocked with conductive paste.

そのため、貫通孔の径が小さい場合や引き込まれる導体
ペーストaが多い場合でも正常な状態のスルーホールを
形成することができる。
Therefore, even when the diameter of the through hole is small or when a large amount of conductive paste a is drawn in, the through hole can be formed in a normal state.

(実施例) 以下、本発明の実施例を図面を参照して詳細に説明する
。第1図において、アルミナ等からなる基板lを図示し
ていないステージ上に置いてその下面側から矢印方向に
真空吸引する。この状態で基板1の上面に所定の配線パ
ターンを形成するための導体ペースト膜2をスクリーン
印刷する。このとき、基板lの上面側に供給された導体
ペーストが下面側からの真空吸引によって基板Iに形成
された貫通孔3内に引き込まれ、その内周面に導体ペー
スト膜4が形成される。ここまでの工程は従来と同様で
ある。次いで、この基板1を図示していない別のステー
ジ上に移し、同様にその下面側から真空吸引して貫通孔
3内周面に形成された導体ペースト膜4が基板lの下面
側に真空吸引された状態を保ち、この状態で基板lを加
熱して導体ペースト膜4を導体ペースト膜2とともに乾
燥する。これを第1段階の乾燥とする。この第1段階の
乾燥は、導体ペースト中の溶剤がたとえばテネピネオー
ル系の場合には、約50℃の温度で約20秒間加熱する
だけでよい。これにより、導体ペースト膜2.4の表面
部分の気化が進み、導体ペーストの表面張力が小さくな
る。したがって、この状態で真空吸引を解除しても貫通
孔3が導体ペーストでふさがることはない。次いで、基
板Iをステージ上から乾燥炉中に移し、たとえば約15
0℃の温度で約10分間加熱して第2段階の乾燥をおこ
なう。この第2段階の乾燥工程により、導体ペースト膜
2.4は十分に乾燥される。なお、上記のような工程を
経て乾燥することが量産工程上好ましいことであるが、
たとえば印刷工程におけるステージ上で第1段階の乾燥
をおこなってもよいし、上記実施例における第1段階の
乾燥工程におけるステージ上で、第1段階の乾燥工程を
省略して真空吸引した状態で直接第2段階の乾燥をおこ
なうようにしてもよい。なお、それぞれの乾燥条件は、
導体ペースト中の溶剤の種類や導体材料の種類等により
適宜の値に設定される。次いで、導体ペースト膜2.4
が十分に乾燥された基板1を焼成炉中に移し、導体ペー
スト膜2.4を所定の条件で焼成する。これにより導体
ペースト膜2.4は第2図に示すようにそれぞれ導体膜
5.6となり、所定の配線パターンとスルーホールとが
形成される。次いで、基板1を配線パターンの形成され
ていない面を上に向けて再び印刷工程におけるステージ
上に置き、第3図に示すようにその下面側から矢印方向
に真空吸引する。この状態で基板lの上面に所定の配線
パターンを形成するための導体ペースト膜7をスクリー
ン印刷する。このとき、導体ペーストが真空吸引によっ
て貫通孔3内に引き込まれ、その内周面に形成された導
体膜6の上に導体ペースト膜8が形成される。その後、
上記と同様の乾燥工程および焼成工程を経て導体ペース
ト膜7.8は、第4図に示すようにそれぞれ導体膜9.
10となり、所定の配線パターンとスルーホールとが形
成される。その結果、基板lの両面に形成された配線パ
ターンがスルーホールを介して接続されたものとなる。
(Example) Hereinafter, an example of the present invention will be described in detail with reference to the drawings. In FIG. 1, a substrate l made of alumina or the like is placed on a stage (not shown), and vacuum suction is applied from the bottom side of the substrate in the direction of the arrow. In this state, a conductive paste film 2 for forming a predetermined wiring pattern is screen printed on the upper surface of the substrate 1. At this time, the conductive paste supplied to the upper surface of the substrate I is drawn into the through hole 3 formed in the substrate I by vacuum suction from the lower surface, and a conductive paste film 4 is formed on the inner peripheral surface thereof. The steps up to this point are the same as conventional ones. Next, this substrate 1 is transferred to another stage (not shown), and the conductor paste film 4 formed on the inner peripheral surface of the through hole 3 is vacuum-suctioned from the lower surface side of the substrate 1. The conductor paste film 4 is dried together with the conductor paste film 2 by heating the substrate l in this state. This is called the first stage of drying. This first step of drying only requires heating at a temperature of about 50° C. for about 20 seconds when the solvent in the conductor paste is, for example, tenepineol. As a result, vaporization of the surface portion of the conductive paste film 2.4 progresses, and the surface tension of the conductive paste decreases. Therefore, even if the vacuum suction is canceled in this state, the through hole 3 will not be blocked by the conductive paste. Next, the substrate I is transferred from the stage into a drying oven, for example, about 15
A second stage of drying is performed by heating at a temperature of 0° C. for about 10 minutes. Through this second drying step, the conductor paste film 2.4 is sufficiently dried. It should be noted that drying through the steps described above is preferable in terms of mass production, but
For example, the first stage of drying may be carried out on the stage in the printing process, or the first stage of drying may be omitted and the drying process may be directly performed on the stage in the first stage of the drying process in the above embodiment under vacuum suction. A second stage of drying may also be performed. The drying conditions for each are as follows:
It is set to an appropriate value depending on the type of solvent in the conductor paste, the type of conductor material, etc. Next, conductor paste film 2.4
The substrate 1, which has been sufficiently dried, is transferred to a firing furnace, and the conductive paste film 2.4 is fired under predetermined conditions. As a result, the conductive paste films 2.4 become conductive films 5.6, respectively, as shown in FIG. 2, and predetermined wiring patterns and through holes are formed. Next, the substrate 1 is again placed on the stage in the printing process with the surface on which the wiring pattern is not formed facing upward, and vacuum suction is applied from the lower surface side in the direction of the arrow as shown in FIG. In this state, a conductive paste film 7 for forming a predetermined wiring pattern is screen printed on the upper surface of the substrate l. At this time, the conductive paste is drawn into the through hole 3 by vacuum suction, and a conductive paste film 8 is formed on the conductive film 6 formed on the inner peripheral surface thereof. after that,
Through the drying process and firing process similar to those described above, conductive paste films 7.8 are formed into conductive paste films 9.8 and 9.8, respectively, as shown in FIG.
10, and a predetermined wiring pattern and through holes are formed. As a result, the wiring patterns formed on both sides of the substrate l are connected via through holes.

なお、上記の実施例においては、基板lの両面に配線パ
ターンを形成するにあたり、それぞれの面ごとに焼成す
るようにしているが、一方の面に導体ペースト膜を印刷
して乾燥のみをおこない、その状態で他方の面に導体ペ
ースト膜を印刷して乾燥し、その後に両面の導体ペース
ト膜を同時に焼成するようにしてもよい。この場合、貫
通孔3内の2層の導体ペースト膜も当然のこと同時に焼
成されることになる。また、基板lの一方の面のみにし
か配線パターンを必要としない場合は、第2図に示す状
態でスルーホールの形成は完了することになる。
In the above example, when forming wiring patterns on both sides of the substrate l, baking is performed on each side, but a conductive paste film is printed on one side and only dried. In this state, a conductive paste film may be printed on the other side and dried, and then the conductive paste films on both sides may be fired at the same time. In this case, the two layers of conductive paste films inside the through hole 3 are naturally fired at the same time. Furthermore, if a wiring pattern is required only on one side of the substrate 1, the formation of the through holes will be completed in the state shown in FIG.

(発明の効果) 以上説明したことから明らかなように本発明によれば、
貫通孔の内周面に形成した導体ペースト膜を基板の下面
側から真空吸引した状態で乾燥するようにしたので、貫
通孔の径が小さい場合や貫通孔内に引き込まれる導体ペ
ースト量が多い場合でも正常な状態のスルーホールを形
成することができる。また、貫通孔の径を小さくしても
正常な状態のスルーホールが形成できるため、貫通孔を
径を小さくして基板の小型化を図ることが可能となる。
(Effects of the Invention) As is clear from the above explanation, according to the present invention,
The conductive paste film formed on the inner circumferential surface of the through-hole is dried by vacuum suction from the bottom side of the board, so it can be used when the diameter of the through-hole is small or when a large amount of conductive paste is drawn into the through-hole. However, a normal through hole can be formed. Further, since a normal through hole can be formed even if the diameter of the through hole is reduced, it is possible to reduce the diameter of the through hole and downsize the substrate.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図ないし第4図は本発明の実施例のスルーホールの
形成方法を説明するための基板の要部断面図である。第
5図ないし第7図は従来例のスルーホールの形成方法を
説明するための基板の要部断面図である。 l・・・基板、2.4.7.8・・・導体ペースト膜、
3・・・貫通孔、5.6.9、IOl・・・導体膜。
1 to 4 are sectional views of essential parts of a substrate for explaining a method of forming through holes according to an embodiment of the present invention. 5 to 7 are sectional views of essential parts of a substrate for explaining a conventional method of forming through holes. l...Substrate, 2.4.7.8...Conductor paste film,
3... Through hole, 5.6.9, IOl... Conductor film.

Claims (1)

【特許請求の範囲】[Claims] (1)基板の上面側に供給した導体ペーストをその下面
側から真空吸引することによって基板に形成した貫通孔
の内周面に導体ペースト膜を形成し、この導体ペースト
膜を基板の下面側から真空吸引した状態で乾燥し、その
後にその導体ペースト膜を焼成するようにしたことを特
徴とするスルーホールの形成方法。
(1) A conductive paste film is formed on the inner peripheral surface of the through hole formed in the board by vacuum suctioning the conductive paste supplied to the top side of the board from the bottom side of the board, and this conductive paste film is applied from the bottom side of the board. A method for forming a through hole, characterized by drying the conductive paste film under vacuum suction, and then firing the conductive paste film.
JP2111041A 1990-04-25 1990-04-25 Through hole formation method Expired - Lifetime JPH0777294B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2111041A JPH0777294B2 (en) 1990-04-25 1990-04-25 Through hole formation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2111041A JPH0777294B2 (en) 1990-04-25 1990-04-25 Through hole formation method

Publications (2)

Publication Number Publication Date
JPH047894A true JPH047894A (en) 1992-01-13
JPH0777294B2 JPH0777294B2 (en) 1995-08-16

Family

ID=14550913

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2111041A Expired - Lifetime JPH0777294B2 (en) 1990-04-25 1990-04-25 Through hole formation method

Country Status (1)

Country Link
JP (1) JPH0777294B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014058264A1 (en) * 2012-10-12 2014-04-17 주식회사 잉크테크 Printed circuit board printing apparatus for forming conduction line on circuit pattern and inside through-hole

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6074597A (en) * 1983-09-30 1985-04-26 富士通株式会社 Method of printing thick film
JPH01184996A (en) * 1988-01-20 1989-07-24 Matsushita Electric Ind Co Ltd Through-hole printer

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6074597A (en) * 1983-09-30 1985-04-26 富士通株式会社 Method of printing thick film
JPH01184996A (en) * 1988-01-20 1989-07-24 Matsushita Electric Ind Co Ltd Through-hole printer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014058264A1 (en) * 2012-10-12 2014-04-17 주식회사 잉크테크 Printed circuit board printing apparatus for forming conduction line on circuit pattern and inside through-hole

Also Published As

Publication number Publication date
JPH0777294B2 (en) 1995-08-16

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