JPH0479536A - Time division time compression multiplex mobile object communication equipment - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application J] The present invention relates to a mobile communication device using time division time compression multiplexed signals. More specifically, in a mobile radio device that uses a signal with a time slot configuration that is time-divisionally compressed, a time-compressed audio signal is sent from the transmitting side as a temporally inverted signal for each time slot. It is an object of the present invention to provide a mobile communication device that can obtain high privacy by transmitting in space.

[Prior art] In time-division time compression multiplexing mobile communication using a small zone method, an audio signal is temporally compressed for each fixed interval and then transmitted, and on the receiving side, the signal is compressed between demodulated BLLs. Multiplexing of signals is achieved by restoring the signal to its original pitch.

At this time, the audio signal spatially transmitted from the transmitting side is a temporally compressed allilog signal, and this signal is transmitted discretely at a certain period. Therefore, communication (
Unlike current car telephones and the [trace telephone system], even if a third party intercepted the communication signal, it was difficult to understand the content of the communication, making it confidential.

[Problems to be Solved by the Invention] However, in the case of the conventional method, the audio signal becomes 11 times distorted at regular time intervals, but since the original signal is compressed on the time axis, Although it has a high degree of privacy compared to normal non-time compressed communications, there is an unresolved problem in that it is less secure when compared to digital communications.

[Means for Solving the Problems] The present invention is a means for converting the speed of signals on the time axis, by converting signals from analog to digital (A/D) at regular time intervals and writing them into a memory. In mobile communication using time-division time compression multiplexed signals using a method of converting digital-to-analog (D/A) signals after changing the clock frequency and reading them out, the A/A data written in memory is
When reading the D'-converted 1 time thrower 1 to minute data, the data is read in the reverse order from when it was written, D/A converted, and transmitted, and the signal speed is restored on the receiving side. In the (time expansion) operation as well, the original signal is restored by reversing the order of writing to and reading from the mail register.

[Operation] With this configuration, the signal transmitted in space is not only divided into certain time slots and compressed in time, but also the content of the signal in each time slot is reversed in time. This improves confidentiality compared to the case of simple time compression, and even if the radio waves are intercepted, there is less chance that the content of the communication will be heard by a third party.

[Embodiment] An embodiment of the present invention will be described with reference to FIGS. 18 to 1C.

FIG. 1A is a conceptual diagram of the configuration of a communication system used in carrying out the present invention, where 30 is a wireless base station, a communication network]O, and n mobile radios 100-1 to 1oo.
-n is made possible by time division time compression multiplexing. The radio base station 30 is a mobile radio 1100-1.
In communication with 100-n, n time slots consisting of analog signals separated and time-compressed are sent. ") time slots constitute one frame. n mobile radios 1001 to 100
-n, each one time slot is allocated and communication is performed.

An example of the circuit configuration of mobile radio 1100 is shown in FIG. 1B-1.

First, the transmission operation will be explained. The signal output from the telephone unit 10 is sampled at regular time intervals and time-compressed by the speed conversion circuit 131. This time compression rate needs to be smaller than the reciprocal of the number n of time slots included in one frame of the signal used with the radio base station 30, taking into consideration the synchronization signal and the protection time described below. be.

The signal time-compressed by the speed conversion circuit 131 is applied to the signal allocation circuit 129, and is added with a synchronization signal using the time slot allocated for interim communication between the mobile radio device 100 and the radio base station 30. It is transmitted via the wireless transmission circuit 132.

This synchronization signal is generated by a clock generator 141 that receives a signal from a radio base 830 at a radio reception circuit 135, extracts a synchronization signal from the received signal, and generates a clock. It is something that was given.

In FIG. 2A (a), time slots SU1.5IJ2, . Time slots SD1, SD2, .

In the timing generator 142 (Fig. 1B-1), the control section 1
40 and the clock from the clock generator 141, the time slot assigned to the mobile radio 100, for example, the period switch 122-2 of SUl, is connected to the output side of the synthesizer 121-2, and a predetermined The compressed signal is transmitted from the wireless transmission circuit 132 at a radio frequency during the designated time slot 5tJ1. This time signal, for example SU1, includes a synchronization signal and a control signal or a compressed speech signal, as shown in FIG. 2A (a).

FIG. 1B-2 shows the circuit configuration of the speed conversion circuit 131 that time-compresses the signal from the telephone unit 101 (FIG. 1B-1). In FIGS. 1B and 2, the input signal from the telephone unit 101 is converted into an A/D converter 201a.
The data is converted into D and written to the memory 202a as transmission data. The transmission data written in the memory 202a is read out, D/A converted by the D7/Δ converter 203a, and output. A/D converters 201a and D here
/A converter 203a performs conversion operation and memory 202a according to clocks of different frequencies supplied to each.
Performs one write/read operation.

In other words, in order to time compress the input signal, A/
The conversion operation of the D converter 201a and the write operation to the memory 202a are performed according to the low-speed clock from the low-speed clock generator 204a, and the read operation from the memory 202a and the conversion operation of the D/A converter 203a are performed according to the high-speed clock generation. This is done according to the high-speed clock from the device 205a.

Here, the low-speed clock generator 204a and the high-speed clock generator 205a are connected to the timing generator 142 (first B-
Each clock is generated based on the timing supplied from Figure 1). The above A/D converter 201
a and the conversion operation of the D/A converter 203a and the memory 20
If it is necessary to stop the write/read operation of 2a, it is sufficient to stop supplying timing from the timing generator 142 to the speed conversion circuit 131.

Next, the reception operation of the mobile radio device 100 (FIG. 1B-1) will be explained.

In FIG. 1B-1, the signal demodulated by the radio receiving circuit 135 is input to the signal selection circuit 139, where the signal is sent from the radio base station 30 to a plurality of mobile radio devices 100-1 to 100-1.
Among the time slot signals addressed to 100-n, only the signal for itself is extracted and sent to the speed restoration circuit 138. The speed restoration circuit 138 time-expands the input signal.

FIG. 1B-3 shows the circuit configuration of this speed restoration circuit 11380. In FIG. 1B-3, the A/D converter 20
1b's conversion operation and the operation of writing the received data to the memory 202b are performed according to the high-speed clock from the high-speed clock generator 205b, and the reading operation of the received data from the memory 202b and the conversion operation of the D/A converter 203b are performed at low speed. Time expansion of the signal is achieved by following the low-speed clock from the clock generator 204b. Note that if it is necessary to stop these operations, the timing generator 142 (1st B) to the speed restoration circuit 138
It is sufficient to stop supplying the timing from Figure 1).

The circuit configuration of the speed restoration circuit 138 described above and the circuit configuration of the speed conversion circuit 131 described above are similar. Therefore, if the low-speed clock generator 204 and the high-speed clock generator 205 are shared by the speed conversion circuit 131 and the speed restoration circuit 138 as shown in FIG. 1B-4, the circuit configuration can be simplified.

Next, the speed conversion circuit 131 and the speed restoration circuit 138
The temporal inversion of the signal for one time slot will be explained using FIG. 1B-5. Here 1B-5
The figure represents the memory map of each memory 202a, 202b shown in Figures 1B-2 through 1B-4.

In FIG. 1B-5, when writing one time slot's worth of data A/D converted on the transmitting side to memo 1 202a, for example, from a low address (Adl) to a high address (Ad-n>), If data is written sequentially, when data is read from the memory 202a and subjected to D/A conversion, the data is written from the high address (Ad-n> to the low address (△d-1)
If the data is read out sequentially toward 1 time slot 1, the time slot will be reversed in terms of time. On the other hand, the high-level address (
Even if data is written from the lower address (Ad-n> to the lower address (Adi) and read from the lower address (Ad-1) to the higher address (Ad-n>), the result will always be exactly the same. The data for one time slot that has been temporally compressed and inverted is transmitted and expanded in time on the receiving side.
If you read the data in the reverse order of writing to b,
The original signal will be restored because it is reversed again in time.

The state of signal compression/inversion → expansion/re-inversion by the speed conversion circuit 131 and speed restoration circuit 138 described above is shown in 1B-
This will be explained in more detail using FIG.

First, FIG. 2A shows the temporal change in the level of the output signal E from the telephone unit 101 to be transmitted. to
, tl , t2. t3. . . . is the time of each break when time-compressing the signal, and each time-compressed time becomes a time slot forming a frame structure.

(b) of the same figure shows the output waveform of the speed conversion circuit 131 when the original signal E of (a) is time-compressed and inverted. For example, time t in (a). The signal "-11" indicates that it is temporally compressed and output as a signal [1, between times t1 to t1a, and is temporally inverted.

In the same figure (C> is each compressed and transmitted signal [1
a'' Elc is demodulated on the receiving side and time-expanded to the original pitch, which represents the waveform V, that is, the waveform obtained by restoring the received signal at the radio base station 30. For example, from time t1 to (b>)
The signal E1a at t1a is output between times ``la'' and t2b, and during this time expansion, the signals in each time slot are simultaneously inverted again in time, resulting in (
The original signal ``a)'' will be restored.

In the above explanation, for example, the signal E from time t0 to t1 in (a,) is time-compressed and the output starts immediately from time t1. However, until the time-compressed signal is output, Even if a delay time exists between these two times, there is no problem in applying the present invention. (more on this delay time later)
Yes.

Next, another example of application of the present invention that further enhances confidentiality will be described with reference to FIG. 1B-7.

In Figure 1B-7, (a) corresponds to the waveform and temporal division in Figure 1B-6 (a>), and F is the waveform of the original signal (waveform before time compression), to, tl ,
t2. t3 is a temporal division (equivalent to one frame in terms of time) which is a unit of time compression.

In the same figure, (b> represents a waveform obtained by time-compressing and time-reversing the signal [a> at fixed time intervals.

Here, the signal ``at time t.-tl of (a> is time compressed and inverted, and the signal @E2 is
b, the signal E from time t1 to t2 is from time t6 to t6f.
as the signal E2c between times t2 and t3.
are shown to be output as a signal E2a between times t4 and t4d, respectively. In other words, the transmitted signal is reversed in time, and the order of the frames is also changed.

(C) in the same figure represents the waveform obtained by temporally expanding and restoring each signal [2, to E2C in (b) on the receiving side. (
At time b), the signal E2a at ~1:4d is time expanded and re-inverted, and at time t10'' tll in (C), signal E2a at time t5.
~"5e signal [2b is at time t8~t, time ↑6~
1 [Six signals F2C are output from time t9 to time t10, respectively. In other words, here, the signal is again temporally inverted and the frame order is swapped so that the signal ``<a>]3 ]4 is restored.
The waveforms in Figures <b> and (C) are <a> to (b), (
For convenience of explanation, the delay time between b) to (C) is ignored in the illustration.

In the above, the frame replacement is 3 frames to 1 frame.
Although the description has been given as an example of a case where the processing is performed as one unit, the number of frames serving as a unit is not limited to three frames, and may be any number of frames. However, as the number of frames that are the unit of frame replacement increases, the delay time described later increases, so this needs to be taken into consideration. The rules for exchanging frames must be determined by the staking system (
Good luck. To create such a system, the capacity of each memory 202a, 202b (FIGS. 1B-2 to 1B-4) included in the speed conversion circuit 131 and the speed restoration circuit 138 (FIG. 1B1) must be determined in advance by the frame. There is no need to make any changes to the hardware other than the need to prepare the number of frames that are the unit of replacement, and it is possible to do this by simply changing the rough 1 to the hardware of the control unit 140. Rough 1 - If you change the wear and replace the frame,
Confidentiality can be greatly improved compared to when frame replacement is not performed.

FIG. 1C shows the circuit configuration of the wireless base station 30.

The communication @ processing section 31 is connected to the telephone network 10, and signals addressed to the n mobile radio devices 100 from the telephone network 10 are sent to signal speed conversion circuits 51-1, 51-2. ....

It is applied to the signal speed conversion circuit group 51 including 51-n.

The signals addressed to each of the n mobile radio devices 100 are modulo-pulled at fixed time intervals in the signal rate conversion circuit group 51 and roughly time-compressed, and the time-compressed signals are sent to the signal allocation circuit 52-1.52. -2. . It is transmitted via the wireless transmission circuit 32 according to the time slot configuration shown in b).

The uplink radio signal from each mobile radio device 100 is received by the radio reception circuit 35, and the received signal is transmitted to the signal selection circuit 3.
9-1, 391-2. .
Selectively separates the signals sent by. Since each of the selectively separated signals is time-compressed, these signals are converted into signal speed restoration circuits 38-1, 38-2. ...,
38r], where each signal is time-stretched to its original pitch, and transmitted to the telephone network 10 via the signal processing section 31. Note that the signal speed conversion circuits 50-1, 51-2, . . . , 51-n and the signal speed restoration circuits 38-1, 38-2. ..., 3
The configuration and operation of 8-n are based on the speed conversion circuit 131 and speed restoration circuit 138, which are components of the mobile radio device 100.
are the same as each other.

As explained in FIG. 1B-6, the time compression according to the present invention is performed, for example, at time t in (a). Since the signal E of -11 is time-compressed and output after time t1, a corresponding delay time occurs. In addition, since the time-compressed signal is time-stretched to the same pitch as the re-string on the receiving side, a delay time will occur here as well, but it is clear that these delay times according to the present invention do not coincide at all in practice. , illustrated by FIG. 2B and the following calculations.

FIG. 2B is a time chart for explaining the delay time τ, and (a) shows samples of one voice or control signal from the transmitter side sampled at a period T (one frame period). .A3゜..., and time-compressed to T/n is expressed as 81.B2... and shown in (b), and the time-compressed and transmitted signal is time-expanded on the receiving side. The signal restored with the original pitch (C)
It is shown in

Here, the protection time tg is a time difference because the distance between the radio base station 30 and each mobile radio device '100 is different.
This is required in B to prevent overlapping and dispersion of slots. The delay time τ is τ-Ding 1/n +tg-(1-+-1/n) XT
It is expressed as -1-tgku1〉. Here, n is the multiplicity of communication (the number of time slots in one frame).

For example, the communication multiplicity is n-10, the period of one frame is T
= 10m5. t g= 1/30m5 (Assuming that the difference in distance between the wireless base station 30 and each mobile radio device 100 is the same distance as the maximum zone radius of a car phone currently in use, @10KIn, the propagation time difference is 10x 10 -3
/3x108=1/30m5), τ is 111113 from equation (1), but since a response is actually expected from the other party, this time needs to be taken into account for the round trip, so the delay time requires τ=22m5.

This value is sufficiently small compared to the case of satellite communication (approximately 250 m5), and it can be seen that this system has sufficient practicality. Furthermore, as explained using Fig. 1B-7, in order to further improve confidentiality, in a device that changes the order of frames, even if frames are changed in units of 5 frames, for example, the delay time is 22X.
5=110 ms, which is still less than half of the time required for satellite communication.

In order to further reduce this delay time τ, the period T of one frame may be shortened. In addition, there are delays in the radio transmitting circuit, radio receiving circuit, wired transmission system, etc. connected to the radio base station 30 and mobile radio device 100, and delay time in the radio wave propagation path, but these are all small. Since it is a value, it can be ignored.

[Effects of the Invention] As is clear from the above description, according to the present invention, in time-division time compression multiplexing mobile communication using a small zone system, time is divided into fixed time slots in which signals transmitted in space are accommodated. Not only is it compressed, but the contents of the signals from each time thrower 1 are temporally reversed, so compared to the case of simple time compression, the structure is simpler and the confidentiality is higher. Even if radio waves are intercepted, there is less chance that the contents of the communication will be heard by a third party. Therefore, the effects of the present invention are extremely large.

[Brief explanation of the drawing]

Figure 1A is a conceptual diagram of the configuration of a communication system used in implementing the present invention, Figure 1B-1 is a circuit diagram of a mobile radio device used in implementing the present invention, and Figure 1B-2 is Figure 1B-1. Figure 1B-3 is a circuit configuration diagram of a speed conversion circuit that is a component of the circuit of the mobile radio shown in Figure 1B-1. 1B-4 is a circuit configuration diagram when a low-speed clock generator and a high-speed clock generator are shared in the speed conversion circuit shown in FIG. 1B-2 and the speed restoration circuit shown in FIG. 1B-3. , Figure 1B-5 is an address diagram for explaining write/read operations of the memory which is a component of the speed conversion circuit shown in Figure 1B-2, and Figure 1B-6 is an address diagram shown in Figure 1B-2. FIG. 1B-7 is a waveform diagram for explaining the operation of the speed conversion circuit and speed restoration circuit shown in FIG. 1B-3, FIG. 1B-7 is a waveform diagram for explaining another application example of the present invention, and FIG. 1C is 2A is a circuit configuration diagram of a radio base station used in implementing the present invention, FIG. 2A is a time slot configuration diagram of signals transmitted and received between a mobile radio device and a radio base station, and FIG. 2B is a diagram of a radio base station and This is a time chart to explain the delay time that occurs with mobile radio equipment. 30...Radio base station 32...Radio transmitting circuit O...Telephone network 1...Signal processing section 5...Radio receiving circuit 8...Signal speed restoration circuit group 8-1 to 3 B- n...Signal speed restoration circuit 9...
Signal selection circuit group 39-1 to 39-n...Signal selection circuit 40...Control section 41...Clock generator 42...Timing generator 51...To signal speed conversion circuit group 51-1 -5) n...Signal speed conversion circuit 52...
Signal assignment circuit groups 52-1 to 52-n...signal assignment circuits 100, 100
-'1~100-n-...Mobile radio device 101...
Telephone unit 120...Reference crystal oscillator 1211.
121-2...Thin upper 1 noiser 122-1.122-
2...Switch 123...Transmission/reception intermittent vIvIA device 129...Signal allocation circuit 131...Speed conversion circuit 132...Wireless transmission circuit 135...Wireless transmission circuit 138...Speed restoration circuit 139. ...Signal selection circuit 140...Control unit 141...Clock generator 142...Timing generator 201...A/D converter 202...Memory 203
...D/Δ converter 20=1...Low speed clock generator 205...High speed clock generator.

Claims (1)

[Claims] For transmitting temporally compressed and segmented signals for communication between a radio base means (30) and a plurality of mobile radio means (100), each of which can be a transmitter and a receiver. In a mobile communication device that uses a large number of time slots with a frame structure divided into a plurality of frames, and uses one specific time slot for communication with a specific mobile radio means, the transmitting side: A signal to be transmitted is sampled at regular time intervals, analog-digital converted, and written as transmission data in a first memory means every predetermined number of time slots, and the data is written in the first memory means. The signal to be transmitted is time-compressed by reading out the transmission data in the reverse order to the order in which the transmission data was written in the first memory means using a clock frequency faster than the writing speed and converting the transmission data from digital to analog. The receiving side receives a signal included in the temporally compressed and divided time slots, demodulates the signal, converts it from analog to digital, and converts the signal into a predetermined number of time slots. writing the received signal into a second memory means as received data, and writing the received data written into the second memory means into the second memory means at a clock frequency slower than the writing speed. A time division time compression multiplexing mobile communication device comprising speed restoration means for time expanding and restoring the temporally compressed and segmented signals by reading them out in an order opposite to the order in which they were received and performing digital-to-analog conversion.