JPH0480068U - - Google Patents
Info
- Publication number
- JPH0480068U JPH0480068U JP12561590U JP12561590U JPH0480068U JP H0480068 U JPH0480068 U JP H0480068U JP 12561590 U JP12561590 U JP 12561590U JP 12561590 U JP12561590 U JP 12561590U JP H0480068 U JPH0480068 U JP H0480068U
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- semiconductor integrated
- circuit device
- blocks
- supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000000872 buffer Substances 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Description
第１図はこの考案の一実施例である半導体集積
回路装置の平面図、第２図はこの考案の他の実施
例を示す半導体集積回路装置の平面図、第３図は
従来の半導体集積回路装置の平面図である。
図において、１は半導体チツプ、２は通常ブロ
ツク、３，３ａ，３ｂは分離ブロツク、４ａ〜４
ｃはＶＤＤ、５ａ〜５ｃはＶＳＳ、７ａ〜７ｉは
入出力端子、８ａ〜８ｄはバツフアを示す。なお
、図中、同一符号は同一、または相当部分を示す
。
FIG. 1 is a plan view of a semiconductor integrated circuit device that is an embodiment of this invention, FIG. 2 is a plan view of a semiconductor integrated circuit device that is another embodiment of this invention, and FIG. 3 is a conventional semiconductor integrated circuit. FIG. 2 is a plan view of the device. In the figure, 1 is a semiconductor chip, 2 is a normal block, 3, 3a, 3b are separation blocks, 4a to 4
c represents VDD, 5a to 5c represent VSS, 7a to 7i represent input/output terminals, and 8a to 8d represent buffers. In addition, in the figures, the same reference numerals indicate the same or equivalent parts.
Claims (1)
線工程によりユーザカスタム作成するゲートアレ
イ等の半導体集積回路装置において、２つ以上の
機能に分離したブロツクを備え、各々の前記ブロ
ツクに対し任意に能動電力を供給できるようにし
たことを特徴とする半導体集積回路装置。 In a semiconductor integrated circuit device such as a gate array, which is custom-made by the user by forming active regions such as transistors in advance and using a wiring process, the device is equipped with blocks separated into two or more functions, and an active power supply is arbitrarily applied to each of the blocks. A semiconductor integrated circuit device characterized by being able to supply.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12561590U JPH0480068U (en) | 1990-11-27 | 1990-11-27 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12561590U JPH0480068U (en) | 1990-11-27 | 1990-11-27 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0480068U true JPH0480068U (en) | 1992-07-13 |
Family
ID=31873207
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12561590U Pending JPH0480068U (en) | 1990-11-27 | 1990-11-27 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0480068U (en) |
-
1990
- 1990-11-27 JP JP12561590U patent/JPH0480068U/ja active Pending