JPH0485732U - - Google Patents
Info
- Publication number
- JPH0485732U JPH0485732U JP12889390U JP12889390U JPH0485732U JP H0485732 U JPH0485732 U JP H0485732U JP 12889390 U JP12889390 U JP 12889390U JP 12889390 U JP12889390 U JP 12889390U JP H0485732 U JPH0485732 U JP H0485732U
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- logic circuit
- semiconductor device
- basic
- basic cells
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 2
- 238000010586 diagram Methods 0.000 description 1
Landscapes
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Description
第1図はこの考案の一実施例であるNANDゲ
ートのレイアウトを示す平面図、第2図は従来お
よびこの考案共通のNANDゲートの回路図、第
3図、第4図は従来のNANDゲートのレイアウ
トを示す平面図である。
図において、6は配線を示す。なお、図中、同
一符号は同一、または相当部分を示す。
Figure 1 is a plan view showing the layout of a NAND gate that is an embodiment of this invention, Figure 2 is a circuit diagram of a NAND gate common to the conventional and this invention, and Figures 3 and 4 are of a conventional NAND gate. FIG. 3 is a plan view showing the layout. In the figure, 6 indicates wiring. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.
Claims (1)
プの中央部に配置された論理回路領域と、この論
理回路領域の外側に配置された入出力バツフア領
域を備え、前記基本セル相互間及び素子相互を配
線によつて結線し、所定の機能を有する大規模集
積回路を形成するセミカスタム方式の半導体装置
において、 駆動能力が大きい基本セルのセル内出力トラン
ジスタに係る配線が、他の配線より太くしたこと
を特徴とする半導体装置。[Claims for Utility Model Registration] A chip includes a logic circuit area in which basic cells necessary for constructing a logic circuit are arranged in the center of the chip, and an input/output buffer area arranged outside this logic circuit area, In the semi-custom semiconductor device in which the basic cells and elements are connected by wiring to form a large-scale integrated circuit having a predetermined function, wiring related to the in-cell output transistor of the basic cell with a large drive capacity. A semiconductor device characterized in that the wiring is thicker than other wiring.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12889390U JPH0485732U (en) | 1990-11-29 | 1990-11-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12889390U JPH0485732U (en) | 1990-11-29 | 1990-11-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0485732U true JPH0485732U (en) | 1992-07-24 |
Family
ID=31876331
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12889390U Pending JPH0485732U (en) | 1990-11-29 | 1990-11-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0485732U (en) |
-
1990
- 1990-11-29 JP JP12889390U patent/JPH0485732U/ja active Pending
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